2f5a116cf7
If we have legal f16 instructions but no f16 med3, we can save one instruction by expanding out the min/max sequence compared to casting to f32 and casting back.
32 lines
1.2 KiB
C++
32 lines
1.2 KiB
C++
//=== lib/CodeGen/GlobalISel/AMDGPUCombinerHelper.h -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This contains common combine transformations that may be used in a combine
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/// pass.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/Combiner.h"
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#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
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using namespace llvm;
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class AMDGPUCombinerHelper : public CombinerHelper {
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public:
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using CombinerHelper::CombinerHelper;
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bool matchFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo);
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void applyFoldableFneg(MachineInstr &MI, MachineInstr *&MatchInfo);
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bool matchExpandPromotedF16FMed3(MachineInstr &MI, Register Src0,
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Register Src1, Register Src2);
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void applyExpandPromotedF16FMed3(MachineInstr &MI, Register Src0,
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Register Src1, Register Src2);
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};
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