Noah Goldstein 809b1d834d [KnownBits] Return 0 for poison {s,u}div inputs ...

It seems consistent to always return zero for known poison rather than
varying the value. We do the same elsewhere.

Differential Revision: https://reviews.llvm.org/D150922

2023-06-06 15:14:10 -05:00

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AArch64

[AArch64][SVE] Add one-use-check to EitherVSelectOrPassthruPatFrags

2023-06-06 21:10:32 +01:00

AMDGPU

[AMDGPU] Remove extract_subvector patterns

2023-06-06 14:04:50 +01:00

ARC

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ARM

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

AVR

[AVR][NFC][test] Supplement more tests of 8-bit rotation

2023-06-06 11:24:18 +08:00

BPF

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CSKY

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DirectX

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Generic

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Hexagon

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

Inputs

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Lanai

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LoongArch

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M68k

[m68k] Add TLS Support

2023-06-03 19:09:47 +08:00

Mips

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MIR

[AMDGPU] Use resource base for buffer instruction MachineMemOperands

2023-06-05 17:06:57 +00:00

MLRegalloc

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MSP430

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NVPTX

[NVPTX] fixed vector-compare test.

2023-06-05 12:49:12 -07:00

PowerPC

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

RISCV

[RISCV] Add special case to selectImm for constants that can be created with (ADD (SLLI C, 32), C).

2023-06-06 11:59:12 -07:00

SPARC

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SPIRV

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SystemZ

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

Thumb

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Thumb2

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

VE

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WebAssembly

[KnownBits] Return 0 for poison {s,u}div inputs

2023-06-06 15:14:10 -05:00

WinCFGuard

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WinEH

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X86

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

XCore

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