Simon Pilgrim a279a09ab9 Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets ...

Reverting while we address an existing issue exposed by this (Issue #63108)

2023-06-06 18:44:24 +01:00

..

AMX

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

avx512-shuffles

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

GC

[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm

2023-05-17 17:03:15 +02:00

GlobalISel

[GlobalISel][X86] Add G_IMPLICIT_DEF / G_CONSTANT legalization handling

2023-06-06 11:45:22 +01:00

Inputs

[FS-AFDO] Load pseudo probe profile on MIR

2023-05-10 11:29:37 -07:00

3addr-16bit.ll

[X86] Replace X32 test check prefix with X86

2023-05-31 13:01:51 +01:00

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3dnow-intrinsics.ll

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8bit_cmov_of_trunc_promotion.ll

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2003-08-03-CallArgLiveRanges.ll

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2003-08-23-DeadBlockTest.ll

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2004-02-13-FrameReturnAddress.ll

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2006-01-19-ISelFoldingBug.ll

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2006-04-04-CrossBlockCrash.ll

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2006-05-17-VectorArg.ll

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2006-10-02-BoolRetCrash.ll

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2006-10-10-FindModifiedNodeSlotBug.ll

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2006-10-13-CycleInDAG.ll

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2006-10-19-SwitchUnnecessaryBranching.ll

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2006-11-12-CSRetCC.ll

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2006-11-27-SelectLegalize.ll

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2006-12-19-IntelSyntax.ll

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2007-01-08-InstrSched.ll

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2007-01-08-X86-64-Pointer.ll

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2007-01-13-StackPtrIndex.ll

[MachineSink] Don't reject sinking because of dead def in isProfitableToSinkTo().

2023-05-16 10:00:44 +02:00

2007-01-29-InlineAsm-ir.ll

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2007-02-04-OrAddrMode.ll

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2007-02-19-LiveIntervalAssert.ll

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2007-02-23-DAGCombine-Miscompile.ll

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2007-02-25-FastCCStack.ll

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2007-03-24-InlineAsmVectorOp.ll

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2007-03-24-InlineAsmXConstraint.ll

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2007-03-26-CoalescerBug.ll

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2007-04-08-InlineAsmCrash.ll

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2007-04-11-InlineAsmVectorResult.ll

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2007-04-17-LiveIntervalAssert.ll

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2007-04-24-Huge-Stack.ll

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2007-04-24-VectorCrash.ll

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2007-04-27-InlineAsm-IntMemInput.ll

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2007-05-05-Personality.ll

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2007-05-05-VecCastExpand.ll

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2007-05-14-LiveIntervalAssert.ll

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2007-06-04-X86-64-CtorAsmBugs.ll

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2007-06-28-X86-64-isel.ll

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2007-06-29-DAGCombinerBug.ll

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2007-06-29-VecFPConstantCSEBug.ll

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2007-07-03-GR64ToVR64.ll

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2007-07-10-StackerAssert.ll

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2007-07-18-Vector-Extract.ll

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2007-08-01-LiveVariablesBug.ll

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2007-08-10-SignExtSubreg.ll

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2007-09-05-InvalidAsm.ll

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2007-09-06-ExtWeakAliasee.ll

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2007-09-27-LDIntrinsics.ll

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2007-10-04-AvoidEFLAGSCopy.ll

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2007-10-12-CoalesceExtSubReg.ll

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2007-10-12-SpillerUnfold1.ll

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2007-10-12-SpillerUnfold2.ll

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2007-10-28-inlineasm-q-modifier.ll

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2007-10-29-ExtendSetCC.ll

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2007-10-31-extractelement-i64.ll

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2007-11-03-x86-64-q-constraint.ll

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2007-11-04-LiveIntervalCrash.ll

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2007-11-04-LiveVariablesBug.ll

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2007-11-04-rip-immediate-constant.ll

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2007-11-06-InstrSched.ll

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2007-11-07-MulBy4.ll

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2007-11-30-LoadFolding-Bug.ll

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2007-12-16-BURRSchedCrash.ll

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2008-01-08-SchedulerCrash.ll

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2008-01-09-LongDoubleSin.ll

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2008-01-16-FPStackifierAssert.ll

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2008-01-16-InvalidDAGCombineXform.ll

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2008-02-14-BitMiscompile.ll

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2008-02-18-TailMergingBug.ll

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2008-02-20-InlineAsmClobber.ll

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2008-02-22-LocalRegAllocBug.ll

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2008-02-25-InlineAsmBug.ll

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2008-02-25-X86-64-CoalescerBug.ll

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2008-02-26-AsmDirectMemOp.ll

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2008-02-27-DeadSlotElimBug.ll

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2008-02-27-PEICrash.ll

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2008-03-06-frem-fpstack.ll

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2008-03-07-APIntBug.ll

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2008-03-10-RegAllocInfLoop.ll

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2008-03-12-ThreadLocalAlias.ll

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2008-03-13-TwoAddrPassCrash.ll

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2008-03-14-SpillerCrash.ll

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2008-03-19-DAGCombinerBug.ll

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2008-03-23-DarwinAsmComments.ll

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2008-03-25-TwoAddrPassBug.ll

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2008-03-31-SpillerFoldingBug.ll

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2008-04-02-unnamedEH.ll

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2008-04-09-BranchFolding.ll

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2008-04-15-LiveVariableBug.ll

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2008-04-16-ReMatBug.ll

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2008-04-24-MemCpyBug.ll

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2008-04-26-Asm-Optimize-Imm.ll

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2008-04-28-CyclicSchedUnit.ll

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2008-05-01-InvalidOrdCompare.ll

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2008-05-09-PHIElimBug.ll

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2008-05-12-tailmerge-5.ll

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2008-06-13-NotVolatileLoadStore.ll

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2008-07-23-VSetCC.ll

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2008-08-06-CmpStride.ll

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2008-08-06-RewriterBug.ll

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2008-08-17-UComiCodeGenBug.ll

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2008-08-23-64Bit-maskmovq.ll

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2008-08-31-EH_RETURN32.ll

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2008-08-31-EH_RETURN64.ll

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2008-09-05-sinttofp-2xi32.ll

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2008-09-09-LinearScanBug.ll

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2008-09-11-CoalescerBug2.ll

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2008-09-26-FrameAddrBug.ll

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2008-12-19-EarlyClobberBug.ll

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2009-01-13-DoubleUpdate.ll

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2009-02-09-ivs-different-sizes.ll

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2009-02-11-codegenprepare-reuse.ll

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2009-02-12-DebugInfoVLA.ll

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2009-02-12-InlineAsm-nieZ-constraints.ll

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2009-02-21-ExtWeakInitializer.ll

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2009-02-25-CommuteBug.ll

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2009-02-26-MachineLICMBug.ll

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2009-03-03-BitcastLongDouble.ll

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2009-03-03-BTHang.ll

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2009-03-05-burr-list-crash.ll

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2009-03-12-CPAlignBug.ll

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2009-03-13-PHIElimBug.ll

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2009-03-16-PHIElimInLPad.ll

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2009-03-23-LinearScanBug.ll

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2009-03-23-MultiUseSched.ll

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2009-03-25-TestBug.ll

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2009-03-26-NoImplicitFPBug.ll

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2009-04-12-FastIselOverflowCrash.ll

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2009-04-12-picrel.ll

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2009-04-13-2AddrAssert-2.ll

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2009-04-13-2AddrAssert.ll

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2009-04-14-IllegalRegs.ll

[IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data

2023-05-23 09:49:57 -07:00

2009-04-16-SpillerUnfold.ll

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2009-04-24.ll

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2009-04-27-CoalescerAssert.ll

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2009-04-27-LiveIntervalsAssert2.ll

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2009-04-27-LiveIntervalsAssert.ll

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2009-04-29-IndirectDestOperands.ll

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2009-04-29-LinearScanBug.ll

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2009-04-29-RegAllocAssert.ll

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2009-04-scale.ll

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2009-05-08-InlineAsmIOffset.ll

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2009-05-11-tailmerge-crash.ll

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2009-05-19-SingleElementExtractElement.ll

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2009-05-23-available_externally.ll

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2009-05-30-ISelBug.ll

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2009-06-02-RewriterBug.ll

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2009-06-03-Win64DisableRedZone.ll

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2009-06-03-Win64SpillXMM.ll

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2009-06-04-VirtualLiveIn.ll

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2009-06-05-sitofpCrash.ll

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2009-06-05-VZextByteShort.ll

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2009-06-06-ConcatVectors.ll

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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll

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2009-06-15-not-a-tail-call.ll

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2009-06-18-movlp-shuffle-register.ll

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2009-07-06-TwoAddrAssert.ll

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2009-07-07-SplitICmp.ll

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2009-07-09-ExtractBoolFromVector.ll

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2009-07-16-CoalescerBug.ll

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2009-07-19-AsmExtraOperands.ll

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2009-07-20-DAGCombineBug.ll

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2009-08-06-branchfolder-crash.ll

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2009-08-08-CastError.ll

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2009-08-14-Win64MemoryIndirectArg.ll

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2009-08-23-SubRegReuseUndo.ll

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2009-09-19-earlyclobber.ll

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2009-09-21-NoSpillLoopCount.ll

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2009-09-23-LiveVariablesBug.ll

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2009-10-16-Scope.ll

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2009-10-19-atomic-cmp-eflags.ll

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2009-10-19-EmergencySpill.ll

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2009-10-25-RewriterBug.ll

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2009-11-13-VirtRegRewriterBug.ll

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2009-11-16-MachineLICM.ll

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2009-11-16-UnfoldMemOpBug.ll

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2009-11-17-UpdateTerminator.ll

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2010-01-05-ZExt-Shl.ll

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2010-01-07-ISelBug.ll

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2010-01-08-Atomic64Bug.ll

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2010-01-11-ExtraPHIArg.ll

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2010-01-13-OptExtBug.ll

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2010-01-15-SelectionDAGCycle.ll

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2010-01-19-OptExtBug.ll

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2010-02-01-DbgValueCrash.ll

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2010-02-01-TaillCallCrash.ll

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2010-02-03-DualUndef.ll

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2010-02-04-SchedulerBug.ll

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2010-02-11-NonTemporal.ll

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2010-02-12-CoalescerBug-Impdef.ll

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2010-02-15-ImplicitDefBug.ll

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2010-02-19-TailCallRetAddrBug.ll

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2010-02-23-DAGCombineBug.ll

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2010-02-23-DIV8rDefinesAX.ll

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2010-02-23-RematImplicitSubreg.ll

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2010-02-23-SingleDefPhiJoin.ll

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2010-03-04-Mul8Bug.ll

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2010-03-05-ConstantFoldCFG.ll

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2010-04-13-AnalyzeBranchCrash.ll

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2010-04-30-LocalAlloc-LandingPad.ll

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2010-05-03-CoalescerSubRegClobber.ll

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2010-05-05-LocalAllocEarlyClobber.ll

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2010-05-06-LocalInlineAsmClobber.ll

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2010-05-07-ldconvert.ll

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2010-05-10-DAGCombinerBug.ll

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2010-05-12-FastAllocKills.ll

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2010-05-16-nosseconversion.ll

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2010-05-25-DotDebugLoc.ll

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2010-06-09-FastAllocRegisters.ll

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2010-06-15-FastAllocEarlyCLobber.ll

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2010-06-24-g-constraint-crash.ll

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2010-06-28-FastAllocTiedOperand.ll

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2010-06-28-matched-g-constraint.ll

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2010-07-02-asm-alignstack.ll

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2010-07-02-UnfoldBug.ll

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2010-07-06-asm-RIP.ll

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2010-07-11-FPStackLoneUse.ll

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2010-07-13-indirectXconstraint.ll

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2010-07-29-SetccSimplify.ll

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2010-08-04-MaskedSignedCompare.ll

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2010-08-04-MingWCrash.ll

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2010-08-04-StackVariable.ll

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2010-09-01-RemoveCopyByCommutingDef.ll

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2010-09-16-asmcrash.ll

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2010-09-16-EmptyFilename.ll

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2010-09-17-SideEffectsInChain.ll

[IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data

2023-05-23 09:49:57 -07:00

2010-09-30-CMOV-JumpTable-PHI.ll

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2010-10-08-cmpxchg8b.ll

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2010-11-02-DbgParameter.ll

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2010-11-09-MOVLPS.ll

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2010-11-18-SelectOfExtload.ll

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2011-01-07-LegalizeTypesCrash.ll

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2011-01-10-DagCombineHang.ll

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2011-01-24-DbgValue-Before-Use.ll

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2011-02-04-FastRegallocNoFP.ll

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2011-02-12-shuffle.ll

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2011-02-21-VirtRegRewriter-KillSubReg.ll

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2011-02-23-UnfoldBug.ll

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2011-02-27-Fpextend.ll

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2011-03-02-DAGCombiner.ll

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2011-03-08-Sched-crash.ll

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2011-06-14-mmx-inlineasm.ll

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2011-06-14-PreschedRegalias.ll

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2011-07-13-BadFrameIndexDisplacement.ll

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2011-08-29-BlockConstant.ll

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2011-10-11-SpillDead.ll

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2011-10-12-MachineCSE.ll

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2011-10-18-FastISel-VectorParams.ll

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2011-10-19-LegelizeLoad.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

2011-10-19-widen_vselect.ll

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2011-10-21-widen-cmp.ll

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2011-10-27-tstore.ll

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2011-11-07-LegalizeBuildVector.ll

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2011-12-08-AVXISelBugs.ll

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2011-12-15-vec_shift.ll

…

2011-12-26-extractelement-duplicate-load.ll

…

2011-12-28-vselecti8.ll

…

2011-20-21-zext-ui2fp.ll

…

2012-1-10-buildvector.ll

…

2012-01-10-UndefExceptionEdge.ll

…

2012-01-11-split-cv.ll

…

2012-01-12-extract-sv.ll

…

2012-01-16-mfence-nosse-flags.ll

…

2012-01-18-vbitcast.ll

…

2012-02-12-dagco.ll

…

2012-02-14-scalar.ll

…

2012-02-23-mmx-inlineasm.ll

…

2012-02-29-CoalescerBug.ll

…

2012-03-15-build_vector_wl.ll

…

2012-03-20-LargeConstantExpr.ll

…

2012-03-26-PostRALICMBug.ll

…

2012-04-09-TwoAddrPassBug.ll

…

2012-04-26-sdglue.ll

…

2012-05-17-TwoAddressBug.ll

…

2012-05-19-CoalescerCrash.ll

…

2012-07-10-extload64.ll

…

2012-07-10-shufnorm.ll

…

2012-07-15-broadcastfold.ll

…

2012-07-15-BuildVectorPromote.ll

…

2012-07-15-tconst_shl.ll

…

2012-07-15-vshl.ll

…

2012-07-16-fp2ui-i1.ll

…

2012-07-16-LeaUndef.ll

…

2012-07-17-vtrunc.ll

…

2012-07-23-select_cc.ll

…

2012-08-07-CmpISelBug.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

2012-08-16-setcc.ll

…

2012-08-17-legalizer-crash.ll

…

2012-08-28-UnsafeMathCrash.ll

…

2012-09-13-dagco-fneg.ll

…

2012-09-28-CGPBug.ll

…

2012-10-02-DAGCycle.ll

…

2012-10-03-DAGCycle.ll

…

2012-10-18-crash-dagco.ll

…

2012-11-28-merge-store-alias.ll

…

2012-12-1-merge-multiple.ll

…

2012-12-12-DAGCombineCrash.ll

…

2012-12-14-v8fp80-crash.ll

…

2012-12-19-NoImplicitFloat.ll

…

2013-01-09-DAGCombineBug.ll

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2013-03-13-VEX-DestReg.ll

…

2013-05-06-ConactVectorCrash.ll

…

2013-10-14-FastISel-incorrect-vreg.ll

…

2014-05-29-factorial.ll

…

2014-08-29-CompactUnwind.ll

Revert "[RFC][MC][MachO]Only emits compact-unwind format for "canonical" personality symbols. For the rest, use DWARFs."

2023-05-19 09:40:54 -04:00

2020_12_02_decrementing_loop.ll

…

2023-02-22-combineMinNumMaxNum.ll

…

9601.ll

…

20090313-signext.ll

…

20210831-inlineasm.ll

…

abds-vector-128.ll

…

abds-vector-256.ll

…

abds-vector-512.ll

…

abds.ll

…

abdu-vector-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

abdu-vector-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

abdu-vector-512.ll

…

abdu.ll

…

abi-isel.ll

…

abs.ll

…

absolute-bit-mask-fastisel.ll

…

absolute-bit-mask.ll

…

absolute-bt.ll

…

absolute-cmp.ll

…

absolute-constant.ll

…

absolute-rotate.ll

…

add32ri8.ll

…

add_shl_constant.ll

…

add-and-not.ll

…

add-cmov.ll

…

add-ext.ll

…

add-i64.ll

…

add-of-carry.ll

…

add-of-mul.ll

…

add-sub-bool.ll

…

add-sub-nsw-nuw.ll

…

add.ll

…

addcarry2.ll

…

addcarry.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

addr-label-difference.ll

…

addr-mode-matcher-2.ll

…

addr-mode-matcher.ll

…

addr-of-ret-addr.ll

…

address-type-promotion-constantexpr.ll

…

addrsig.ll

…

addsub-constant-folding.ll

…

adx-commute.mir

…

adx-intrinsics-upgrade.ll

…

adx-intrinsics.ll

…

aes_intrinsics.ll

…

alias-gep.ll

…

alias-static-alloca.ll

…

aliases.ll

…

align-basic-block-sections.mir

…

align-branch-boundary-default.ll

…

align-branch-boundary-noautopadding.ll

…

align-branch-boundary-suppressions-tls.ll

…

align-branch-boundary-suppressions.ll

…

align-down-const.ll

…

align-down.ll

…

aligned-comm.ll

…

aligned-variadic.ll

…

alignment-2.ll

…

alignment.ll

…

all-ones-vector.ll

…

alldiv-divdi3.ll

…

alloca-align-rounding-32.ll

…

alloca-align-rounding.ll

…

alloca-overaligned.ll

…

allrem-moddi3.ll

…

amx_fp16_intrinsics.ll

…

and-encoding.ll

…

and-load-fold.ll

…

and-or-fold.ll

…

and-shift.ll

…

and-sink.ll

…

and-su.ll

…

and-with-overflow.ll

…

andimm8.ll

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any_extend_vector_inreg_of_broadcast_from_memory.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

any_extend_vector_inreg_of_broadcast.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

anyext.ll

…

anyregcc-crash.ll

…

anyregcc.ll

…

apm.ll

…

AppendingLinkage.ll

…

arg_returned_bitcast.ll

…

arg-cast.ll

…

arg-copy-elide-win64.ll

…

arg-copy-elide.ll

…

arithmetic_fence2.ll

…

arithmetic_fence.ll

…

asan-check-memaccess-add.ll

…

asan-check-memaccess-or.ll

…

asm-block-labels2.ll

…

asm-block-labels.ll

…

asm-dialect.ll

…

asm-global-imm.ll

…

asm-indirect-mem.ll

…

asm-invalid-register-class-crasher.ll

…

asm-label2.ll

…

asm-label.ll

…

asm-mismatched-types.ll

…

asm-modifier2.ll

…

asm-modifier-error.ll

…

asm-modifier-P.ll

…

asm-modifier.ll

…

asm-reg-type-mismatch-avx512.ll

…

asm-reg-type-mismatch.ll

…

asm-reject-reg-type-mismatch-avx.ll

…

asm-reject-reg-type-mismatch.ll

…

asm-reject-rex.ll

…

asm-reject-vk32-vk64.ll

…

asm-reject-x87-int.ll

…

asm-reject-xmm16.ll

…

assertzext-demanded.ll

…

atom-call-reg-indirect-foldedreload32.ll

…

atom-call-reg-indirect-foldedreload64.ll

…

atom-call-reg-indirect.ll

…

atom-cmpb.ll

…

atom-fixup-lea1.ll

…

atom-fixup-lea2.ll

…

atom-fixup-lea3.ll

…

atom-fixup-lea4.ll

…

atom-lea-addw-bug.ll

…

atom-lea-sp.ll

…

atom-pad-short-functions.ll

…

atom-sched.ll

…

atom-shuf.ll

…

atomic8.ll

…

atomic16.ll

…

atomic32.ll

…

atomic64.ll

…

atomic128.ll

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atomic6432.ll

…

atomic-add.ll

…

atomic-bit-test.ll

[X86] Lower used (atomicrmw xor p, SignBit) as (atomicrmw add p, SignBit)

2023-05-07 19:11:53 -05:00

atomic-dagsched.ll

…

atomic-eflags-reuse.ll

…

atomic-flags.ll

…

atomic-fp.ll

…

atomic-idempotent.ll

…

atomic-load-store-wide.ll

…

atomic-load-store.ll

…

atomic-mi.ll

…

atomic-minmax-i6432.ll

…

atomic-monotonic.ll

…

atomic-non-integer-fp128.ll

…

atomic-non-integer.ll

…

atomic-op.ll

…

atomic-ops-ancient-64.ll

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atomic-or.ll

…

atomic-pointer.ll

…

atomic-rm-bit-test-64.ll

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atomic-rm-bit-test.ll

…

atomic-unordered.ll

…

atomic-xor.ll

[X86] Lower used (atomicrmw xor p, SignBit) as (atomicrmw add p, SignBit)

2023-05-07 19:11:53 -05:00

atomicf128.ll

…

atomicrmw-uinc-udec-wrap.ll

…

Atomics-64.ll

…

attr-dontcall.ll

…

attr-function-return.ll

…

attr-function-return.mir

…

attribute-sections.ll

…

avg-mask.ll

…

avg.ll

[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

avoid_complex_am.ll

…

avoid-lea-scale2.ll

…

avoid-loop-align-2.ll

…

avoid-loop-align.ll

…

avoid-sfb-g-no-change2.mir

…

avoid-sfb-g-no-change3.mir

…

avoid-sfb-g-no-change.mir

…

avoid-sfb-kill-flags.mir

…

avoid-sfb-offset.mir

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avoid-sfb-overlaps.ll

…

avoid-sfb.ll

…

avx1-logical-load-folding.ll

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avx2-arith.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx2-cmp.ll

[X86] Replace X32 test check prefix with X86 + add common CHECK prefix

2023-06-05 14:41:40 +01:00

avx2-conversions.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

avx2-fma-fneg-combine.ll

[X86] Replace X32 test check prefix with X86 + add common CHECK prefix

2023-06-05 14:41:40 +01:00

avx2-gather.ll

…

avx2-intrinsics-canonical.ll

…

avx2-intrinsics-fast-isel.ll

…

avx2-intrinsics-x86-upgrade.ll

…

avx2-intrinsics-x86.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

avx2-logic.ll

[X86] Replace X32 test check prefix with X86 + add common CHECK prefix

2023-06-05 14:41:40 +01:00

avx2-masked-gather.ll

…

avx2-nontemporal.ll

…

avx2-phaddsub.ll

…

avx2-pmovxrm.ll

[X86] Replace X32 test check prefix with X86 + add common CHECK prefix

2023-06-05 14:41:40 +01:00

avx2-shift.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx2-vbroadcast.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

avx2-vbroadcasti128.ll

[X86] Replace X32 test check prefix with X86 + add common CHECK prefix

2023-06-05 14:41:40 +01:00

avx2-vector-shifts.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx2-vperm.ll

…

avx512-adc-sbb.ll

…

avx512-any_extend_load.ll

…

avx512-arith.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx512-broadcast-arith.ll

…

avx512-broadcast-unfold.ll

…

avx512-bugfix-23634.ll

…

avx512-bugfix-25270.ll

…

avx512-bugfix-26264.ll

…

avx512-build-vector.ll

…

avx512-calling-conv.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

avx512-cmp-kor-sequence.ll

…

avx512-cmp-mask.ll

…

avx512-cmp.ll

…

avx512-cvt.ll

…

avx512-cvttp2i.ll

…

avx512-ext.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

avx512-extract-subvector-load-store.ll

…

avx512-extract-subvector.ll

…

avx512-f16c-v16f16-fadd.ll

…

avx512-fma-commute.ll

…

avx512-fma-intrinsics-upgrade.ll

…

avx512-fma-intrinsics.ll

…

avx512-fma.ll

…

avx512-fsel.ll

…

avx512-gather-scatter-intrin-deprecated.ll

…

avx512-gather-scatter-intrin.ll

…

avx512-gfni-intrinsics.ll

…

avx512-hadd-hsub.ll

…

avx512-i1test.ll

…

avx512-inc-dec.ll

…

avx512-insert-extract_i1.ll

…

avx512-insert-extract.ll

[SDAG] Fix incorrect use of undef for boolean contents (PR63055)

2023-06-01 15:19:22 +02:00

avx512-intel-ocl.ll

…

avx512-intrinsics-canonical.ll

…

avx512-intrinsics-fast-isel.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx512-intrinsics-upgrade.ll

…

avx512-intrinsics-x86_64.ll

…

avx512-intrinsics.ll

…

avx512-load-store.ll

…

avx512-load-trunc-store-i1.ll

…

avx512-logic.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

avx512-mask-op.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

avx512-mask-spills.ll

…

avx512-mask-zext-bugfix.ll

…

avx512-masked_memop-16-8.ll

…

avx512-masked-memop-64-32.ll

…

avx512-memfold.ll

…

avx512-mov.ll

…

avx512-movmsk.ll

…

avx512-nontemporal.ll

…

avx512-pmovxrm.ll

…

avx512-regcall-Mask.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

avx512-regcall-NoMask.ll

…

avx512-rndscale.ll

…

avx512-rotate.ll

…

avx512-scalar_mask.ll

…

avx512-scalar.ll

…

avx512-scalarIntrinsics.ll

…

avx512-select.ll

…

avx512-shift.ll

…

avx512-skx-insert-subvec.ll

…

avx512-skx-v32f16-fadd.ll

…

avx512-trunc.ll

…

avx512-unsafe-fp-math.ll

…

avx512-vbroadcast.ll

…

avx512-vbroadcasti128.ll

…

avx512-vbroadcasti256.ll

…

avx512-vec3-crash.ll

…

avx512-vec-cmp.ll

…

avx512-vpclmulqdq.ll

…

avx512-vpermv3-commute.ll

…

avx512-vpternlog-commute.ll

…

avx512-vselect-crash.ll

…

avx512-vselect.ll

…

avx512bf16-intrinsics-upgrade.ll

…

avx512bf16-intrinsics.ll

…

avx512bf16-mov.ll

…

avx512bf16-vl-intrinsics-upgrade.ll

…

avx512bf16-vl-intrinsics.ll

[X86][BF16] Fix 2 crashes with vector broadcast

2023-06-01 13:38:47 +08:00

avx512bw-arith.ll

…

avx512bw-intrinsics-canonical.ll

…

avx512bw-intrinsics-fast-isel.ll

…

avx512bw-intrinsics-upgrade.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

avx512bw-intrinsics.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx512bw-mask-op.ll

…

avx512bw-mov.ll

…

avx512bw-vec-cmp.ll

…

avx512bw-vec-test-testn.ll

…

avx512bwvl-arith.ll

…

avx512bwvl-intrinsics-canonical.ll

…

avx512bwvl-intrinsics-fast-isel.ll

…

avx512bwvl-intrinsics-upgrade.ll

…

avx512bwvl-intrinsics.ll

…

avx512bwvl-mov.ll

…

avx512bwvl-vec-cmp.ll

…

avx512bwvl-vec-test-testn.ll

…

avx512cd-intrinsics-fast-isel.ll

…

avx512cd-intrinsics-upgrade.ll

…

avx512cd-intrinsics.ll

…

avx512cdvl-intrinsics-upgrade.ll

…

avx512cdvl-intrinsics.ll

…

avx512cfma-intrinsics.ll

…

avx512cfmul-intrinsics.ll

…

avx512cfmulsh-instrinsics.ll

…

avx512dq-intrinsics-fast-isel.ll

…

avx512dq-intrinsics-upgrade.ll

…

avx512dq-intrinsics.ll

…

avx512dq-mask-op.ll

…

avx512dqvl-intrinsics-fast-isel.ll

…

avx512dqvl-intrinsics-upgrade.ll

…

avx512dqvl-intrinsics.ll

…

avx512er-intrinsics.ll

…

avx512f-256-set0.mir

…

avx512f-vec-test-testn.ll

[X86] fold select to mask instructions.

2023-05-26 21:53:03 +08:00

avx512fp16-arith-intrinsics.ll

…

avx512fp16-arith-vl-intrinsics.ll

…

avx512fp16-arith.ll

…

avx512fp16-combine-vfmac-fadd.ll

…

avx512fp16-combine-vfmulc-fadd.ll

…

avx512fp16-combine-xor-vfmulc-fadd.ll

…

avx512fp16-combine-xor-vfmulc.ll

…

avx512fp16-cvt-ph-w-intrinsics.ll

…

avx512fp16-cvt-ph-w-vl-intrinsics.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

avx512fp16-cvt.ll

…

avx512fp16-fma-commute.ll

…

avx512fp16-fma-intrinsics.ll

…

avx512fp16-fmaxnum.ll

…

avx512fp16-fminimum-fmaximum.ll

…

avx512fp16-fminnum.ll

…

avx512fp16-fold-load-binops.ll

…

avx512fp16-fold-xmm-zero.ll

…

avx512fp16-fp-logic.ll

…

avx512fp16-frem.ll

…

avx512fp16-insert-extract.ll

…

avx512fp16-intrinsics.ll

…

avx512fp16-machine-combiner.ll

…

avx512fp16-mov.ll

…

avx512fp16-mscatter.ll

…

avx512fp16-rndscale.ll

…

avx512fp16-scalar.ll

…

avx512fp16-subv-broadcast-fp16.ll

…

avx512fp16-unsafe-fp-math.ll

…

avx512fp16vl-fma-intrinsics.ll

…

avx512fp16vl-intrinsics.ll

…

avx512ifma-intrinsics-fast-isel.ll

…

avx512ifma-intrinsics-upgrade.ll

…

avx512ifma-intrinsics.ll

…

avx512ifmavl-intrinsics-fast-isel.ll

…

avx512ifmavl-intrinsics-upgrade.ll

…

avx512ifmavl-intrinsics.ll

…

avx512vbmi2-funnel-shifts.ll

…

avx512vbmi2-intrinsics-fast-isel.ll

…

avx512vbmi2-intrinsics-upgrade.ll

…

avx512vbmi2-intrinsics.ll

…

avx512vbmi2vl-funnel-shifts.ll

…

avx512vbmi2vl-intrinsics-fast-isel.ll

…

avx512vbmi2vl-intrinsics-upgrade.ll

…

avx512vbmi2vl-intrinsics.ll

…

avx512vbmi-intrinsics-fast-isel.ll

…

avx512vbmi-intrinsics-upgrade.ll

…

avx512vbmi-intrinsics.ll

…

avx512vbmivl-intrinsics-fast-isel.ll

…

avx512vbmivl-intrinsics-upgrade.ll

…

avx512vbmivl-intrinsics.ll

…

avx512vl_vnni-intrinsics-upgrade.ll

…

avx512vl_vnni-intrinsics.ll

…

avx512vl-arith.ll

…

avx512vl-intrinsics-canonical.ll

…

avx512vl-intrinsics-fast-isel.ll

…

avx512vl-intrinsics-upgrade.ll

…

avx512vl-intrinsics.ll

…

avx512vl-logic.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

avx512vl-mov.ll

…

avx512vl-nontemporal.ll

…

avx512vl-vbroadcast.ll

…

avx512vl-vec-cmp.ll

…

avx512vl-vec-masked-cmp.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

avx512vl-vec-test-testn.ll

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avx512vl-vpclmulqdq.ll

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avx512vlcd-intrinsics-fast-isel.ll

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avx512vlvp2intersect-intrinsics.ll

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avx512vnni-combine.ll

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avx512vnni-intrinsics-upgrade.ll

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avx512vnni-intrinsics.ll

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avx512vnni.ll

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avx512vp2intersect-intrinsics.ll

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avx512vpopcntdq-intrinsics.ll

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avx_vnni-intrinsics.ll

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avx-arith.ll

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avx-basic.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

avx-bitcast.ll

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avx-brcond.ll

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avx-cast.ll

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avx-cmp.ll

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avx-cvt-2.ll

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avx-cvt-3.ll

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avx-cvt.ll

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avx-cvttp2si.ll

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avx-fp2int.ll

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avx-gfni-intrinsics.ll

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avx-ifma-intrinsics.ll

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avx-insertelt.ll

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avx-intel-ocl.ll

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avx-intrinsics-fast-isel.ll

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avx-intrinsics-x86_64.ll

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avx-intrinsics-x86-upgrade.ll

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avx-intrinsics-x86.ll

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avx-isa-check.ll

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avx-load-store.ll

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avx-logic.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx-minmax.ll

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avx-select.ll

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avx-shift.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

avx-shuffle-x86_32.ll

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avx-splat.ll

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avx-trunc.ll

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avx-unpack.ll

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avx-varargs-x86_64.ll

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avx-vbroadcast.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

avx-vbroadcastf128.ll

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avx-vextractf128.ll

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avx-vinsertf128.ll

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avx-vpclmulqdq.ll

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avx-vperm2x128.ll

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avx-vzeroupper.ll

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avx-win64-args.ll

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avx-win64.ll

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avx.ll

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avxneconvert-intrinsics-shared.ll

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avxneconvert-intrinsics.ll

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avxvnni-combine.ll

[X86] Add schedule module for SapphireRapids

2023-06-02 15:23:50 +08:00

avxvnni.ll

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avxvnniint8-intrinsics.ll

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backpropmask.ll

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bad-tls-fold.mir

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barrier-sse.ll

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barrier.ll

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base-pointer-and-cmpxchg.ll

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base-pointer-and-mwaitx.ll

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basic-block-labels-mir-parse.mir

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basic-block-sections_2.ll

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basic-block-sections-blockaddress-taken.ll

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basic-block-sections-clusters-branches.ll

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basic-block-sections-clusters-eh.ll

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basic-block-sections-clusters-error.ll

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basic-block-sections-clusters.ll

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basic-block-sections-cold.ll

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basic-block-sections-directjumps.ll

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basic-block-sections-eh.ll

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basic-block-sections-labels-empty-function.ll

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basic-block-sections-labels-functions-sections.ll

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basic-block-sections-labels.ll

[Propeller] Add HasIndirectBranch to BBEntry::Metadata.

2023-05-24 02:15:38 +00:00

basic-block-sections-list.ll

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basic-block-sections-listbb.ll

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basic-block-sections-mir-parse.mir

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basic-block-sections-mir-print.ll

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basic-block-sections-named-section.ll

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basic-block-sections-pragma-sections.ll

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basic-block-sections-source-drift.ll

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basic-block-sections-unreachable.ll

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basic-block-sections.ll

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basic-promote-integers.ll

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bb_rotate.ll

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bc-extract.ll

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bfloat.ll

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bigstructret2.ll

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bigstructret.ll

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bit_ceil.ll

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bit-piece-comment.ll

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bit-test-shift.ll

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bitcast2.ll

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bitcast-and-setcc-128.ll

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bitcast-and-setcc-256.ll

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bitcast-and-setcc-512.ll

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bitcast-i256.ll

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bitcast-int-to-vector-bool-sext.ll

[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

bitcast-int-to-vector-bool-zext.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

bitcast-int-to-vector-bool.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

bitcast-int-to-vector.ll

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bitcast-mmx.ll

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bitcast-setcc-128.ll

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bitcast-setcc-256.ll

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bitcast-setcc-512.ll

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bitcast-vector-bool.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

bitcast.ll

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bitcnt-false-dep.ll

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bitreverse.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

bitselect.ll

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bittest-intrin.ll

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blend-of-shift.ll

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block_set.ll

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block-placement.ll

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block-placement.mir

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bmi2-x86_64.ll

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bmi2.ll

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bmi-intrinsics-fast-isel-x86_64.ll

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bmi-intrinsics-fast-isel.ll

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bmi-out-of-order.ll

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bmi-x86_64.ll

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bmi.ll

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bool-ext-inc.ll

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bool-math.ll

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bool-simplify.ll

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bool-vector.ll

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bool-zext.ll

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br-fold.ll

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branchfolding-catchpads.ll

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branchfolding-debug-invariant.mir

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branchfolding-debugloc.ll

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branchfolding-ehpad.mir

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branchfolding-landingpads.ll

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branchfolding-undef.mir

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brcond.ll

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break-anti-dependencies.ll

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break-false-dep-crash.mir

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break-false-dep.ll

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broadcast-elm-cross-splat-vec.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

broadcastm-lowering.ll

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bss_pagealigned.ll

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bswap_tree2.ll

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bswap_tree.ll

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bswap-inline-asm.ll

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bswap-rotate.ll

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bswap-vector.ll

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bswap-wide-int.ll

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bswap.ll

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bt.ll

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btc_bts_btr.ll

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btq.ll

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bug37521.ll

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bug47278-eflags-error.mir

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bug47278.mir

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bug80500.ll

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build_fp16_constant_vector.ll

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build-vector-128.ll

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build-vector-256.ll

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build-vector-512.ll

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buildvec-extract.ll

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buildvec-insertvec.ll

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bypass-slow-division-32.ll

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bypass-slow-division-64.ll

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bypass-slow-division-tune.ll

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byref.ll

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byval2.ll

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byval3.ll

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byval4.ll

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byval5.ll

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byval6.ll

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byval7.ll

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byval-align.ll

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byval-callee-cleanup.ll

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byval.ll

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cache-intrinsic.ll

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call-imm.ll

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call-push.ll

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call-rv-marker.ll

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call-site-info-output.ll

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call-structfp.ll

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callbr-asm-bb-exports.ll

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callbr-asm-blockplacement.ll

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callbr-asm-branch-folding.ll

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callbr-asm-destinations.ll

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callbr-asm-instr-scheduling.ll

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callbr-asm-kill.mir

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callbr-asm-label-addr.ll

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callbr-asm-obj-file.ll

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callbr-asm-outputs-indirect-isel-m32.ll

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callbr-asm-outputs-indirect-isel.ll

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callbr-asm-outputs-pred-succ.ll

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callbr-asm-outputs-regallocfast.mir

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callbr-asm-outputs.ll

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callbr-asm-phi-placement.ll

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callbr-asm-sink.ll

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callbr-asm.ll

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callbr-codegenprepare.ll

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cas.ll

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cast-vsel.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

catch.ll

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catchpad-dynamic-alloca.ll

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catchpad-lifetime.ll

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catchpad-realign-savexmm.ll

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catchpad-regmask.ll

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catchpad-reuse.ll

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catchpad-weight.ll

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catchret-empty-fallthrough.ll

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catchret-fallthrough.ll

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catchret-regmask.ll

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cet_endbr_imm_enhance.ll

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cf-opt-memops.mir

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cfguard-checks-funclet.ll

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cfguard-checks.ll

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cfguard-module-flag.ll

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cfguard-x86-64-vectorcall.ll

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cfguard-x86-vectorcall.ll

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cfi-basic-block-sections-1.ll

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cfi-epilogue-with-return.mir

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cfi-epilogue-without-return.mir

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cfi-inserter-basic-block-sections-callee-save-registers.ll

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cfi-inserter-callee-save-register-2.mir

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cfi-inserter-callee-save-register.mir

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cfi-inserter-cfg-with-merge.mir

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cfi-inserter-check-order.ll

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cfi-inserter-noreturnblock.mir

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cfi-inserter-verify-inconsistent-csr.mir

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cfi-inserter-verify-inconsistent-loc.mir

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cfi-inserter-verify-inconsistent-offset.mir

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cfi-inserter-verify-inconsistent-register.mir

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cfi-xmm.ll

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

cfi.ll

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cfstring.ll

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cgp-usubo.ll

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chain_order.ll

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change-compare-stride-1.ll

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change-compare-stride-trickiness-0.ll

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change-compare-stride-trickiness-1.ll

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change-compare-stride-trickiness-2.ll

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change-unsafe-fp-math.ll

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cldemote-intrinsic.ll

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cleanuppad-inalloca.ll

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cleanuppad-large-codemodel.ll

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cleanuppad-realign.ll

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clear_upper_vector_element_bits.ll

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clear-bitfield.ll

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clear-highbits.ll

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clear-lowbits.ll

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clflush.ll

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clflushopt.ll

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clwb.ll

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clz.ll

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clzero.ll

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cmov-double.ll

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cmov-fp.ll

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cmov-into-branch.ll

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cmov-promotion.ll

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cmov.ll

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cmovcmov.ll

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cmp-bool.ll

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cmp-concat.ll

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cmp-fast-isel.ll

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cmp-merge.ll

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cmp.ll

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cmpccxadd-intrinsics.ll

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cmpxchg8b_alloca_regalloc_handling.ll

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cmpxchg8b.ll

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cmpxchg-clobber-flags.ll

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cmpxchg-i1.ll

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cmpxchg-i128-i1.ll

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coal-sections.ll

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coalesce_commute_movsd.ll

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coalesce_commute_subreg.ll

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coalesce-dbg-value-subreg-rewrite.mir

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coalesce-dead-lanes.mir

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coalesce-esp.ll

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coalesce-implicitdef.ll

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coalescer-commute1.ll

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coalescer-commute2.ll

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coalescer-commute3.ll

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coalescer-commute4.ll

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coalescer-commute5.ll

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coalescer-cross.ll

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coalescer-dce2.ll

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coalescer-dce.ll

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coalescer-identity.ll

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coalescer-remat.ll

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coalescer-subreg.ll

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coalescer-win64.ll

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code_placement_align_all.ll

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code_placement_cold_loop_blocks.ll

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code_placement_eh.ll

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code_placement_ext_tsp_large.ll

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code_placement_ext_tsp.ll

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code_placement_ignore_succ_in_inner_loop.ll

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code_placement_loop_rotation2.ll

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code_placement_loop_rotation3.ll

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code_placement_loop_rotation.ll

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code_placement_no_header_change.ll

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code_placement.ll

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code-model-elf-memset.ll

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code-model-elf-sections.ll

[X86] Use "l" prefix for data sections under medium/large code model

2023-05-31 12:31:08 -07:00

code-model-elf.ll

[test] Add zero size global test to code-model-elf.ll

2023-05-31 13:04:15 -07:00

code-model-kernel.ll

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codegen-prepare-addrmode-sext.ll

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codegen-prepare-cast.ll

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codegen-prepare-collapse.ll

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codegen-prepare-crash.ll

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codegen-prepare-extload.ll

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codegen-prepare-oob-shl.ll

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codegen-prepare-replacephi2.mir

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codegen-prepare-replacephi.mir

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codegen-prepare-uaddo.ll

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codegen-prepare.ll

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codemodel.ll

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coff-alias-type.ll

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coff-comdat2.ll

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coff-comdat3.ll

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coff-comdat.ll

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coff-exclude.ll

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coff-feat00.ll

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coff-fp-section-name.ll

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coff-linkonce.ll

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coff-no-dead-strip.ll

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coff-weak.ll

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coldcc64.ll

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combine-64bit-vec-binop.ll

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combine-abs.ll

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combine-adc.ll

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combine-add-ssat.ll

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combine-add-usat.ll

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combine-add.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-addo.ll

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combine-adx.ll

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combine-and.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

combine-andintoload.ll

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combine-avx2-intrinsics.ll

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combine-avx-intrinsics.ll

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combine-bextr.ll

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combine-bitreverse.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-bitselect.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-bswap.ll

[DAGCombiner] Add bswap(logic_op(bswap(x), y)) optimization

2023-05-16 18:58:07 -05:00

combine-concatvectors.ll

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combine-fabs.ll

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combine-fcopysign.ll

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combine-lds.ll

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combine-mask-with-shuffle.ll

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combine-movmsk-avx.ll

[X86] Pre-commit test case for D152227.

2023-06-06 14:56:45 +08:00

combine-movmsk.ll

[X86] Add test cases for D152227.

2023-06-06 14:24:46 +08:00

combine-mul.ll

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combine-mulo.ll

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combine-multiplies.ll

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combine-or.ll

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combine-pavg.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-pmadd.ll

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combine-pmuldq.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-ptest-256.ll

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combine-ptest.ll

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combine-rotates.ll

[X86] fold select to mask instructions.

2023-05-26 21:53:03 +08:00

combine-sbb.ll

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combine-sdiv.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

combine-select.ll

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combine-sext-in-reg.ll

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combine-shl.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-smax.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-smin.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-sra-load.ll

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combine-sra.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-srem.ll

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combine-srl.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-sse41-intrinsics.ll

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combine-sub-ssat.ll

[DAG] visitSUBSAT - fold subsat(x,y) -> sub(x,y) if it never overflows

2023-05-06 15:55:04 +01:00

combine-sub-usat.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combine-sub.ll

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combine-subo.ll

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combine-testm-and.ll

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combine-testpd.ll

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combine-testps.ll

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combine-udiv.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

combine-umax.ll

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combine-umin.ll

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combine-undef-index-mscatter.ll

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combine-urem.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

combineIncDecVector-crash.ll

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comi-flags.ll

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commandline-metadata.ll

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commute-3dnow.ll

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commute-blend-avx2.ll

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commute-blend-sse41.ll

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commute-clmul.ll

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commute-fcmp.ll

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commute-intrinsic.ll

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commute-two-addr.ll

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commute-vpclmulqdq-avx512.ll

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commute-vpclmulqdq-avx.ll

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commute-xop.ll

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commuted-blend-mask.ll

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compact-unwind.ll

Revert "[RFC][MC][MachO]Only emits compact-unwind format for "canonical" personality symbols. For the rest, use DWARFs."

2023-05-19 09:40:54 -04:00

compare_folding.ll

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compare-add.ll

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compare-global.ll

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compare-inf.ll

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compiler_used.ll

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complex-asm.ll

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complex-fastmath.ll

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complex-fca.ll

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compress-undef-float-passthrough.ll

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computeKnownBits_urem.ll

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concat-cast.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

conditional-indecrement.ll

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conditional-tailcall-pgso.ll

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conditional-tailcall-samedest.mir

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conditional-tailcall.ll

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consecutive-load-shuffle.ll

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const-base-addr.ll

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const-shift-of-constmasked.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

constant-combines.ll

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constant-hoisting-and.ll

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constant-hoisting-bfi.ll

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constant-hoisting-cmp.ll

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constant-hoisting-optnone.ll

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constant-hoisting-shift-immediate.ll

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constant-pool-remat-0.ll

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constant-pool-sharing.ll

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constpool.ll

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constrained-fp80-trunc-ext.ll

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constructor.ll

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convert-2-addr-3-addr-inc64.ll

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convertphitype.ll

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copy-eflags-liveinlists.mir

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copy-eflags.ll

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copy-low-subvec-elt-to-high-subvec-elt.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

copy-propagation.ll

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copysign-constant-magnitude.ll

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cpus-amd-no-x86_64.ll

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cpus-amd.ll

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cpus-intel-no-x86_64.ll

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cpus-intel.ll

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cpus-no-x86_64.ll

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cpus-other.ll

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crash-lre-eliminate-dead-def.ll

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crash-nosse.ll

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crash-O0.ll

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crash.ll

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crc32-intrinsics-fast-isel-x86_64.ll

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crc32-intrinsics-fast-isel-x86.ll

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crc32-intrinsics-x86_64.ll

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crc32-intrinsics-x86.ll

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crc32-target-feature.ll

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critical-anti-dep-breaker.ll

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cse-add-with-overflow.ll

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cse-two-preds.mir

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csr-split.ll

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cstring.ll

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ctor-priority-coff.ll

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ctpop-combine.ll

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cvt16-2.ll

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cvt16.ll

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cvtv2f32.ll

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cxx_tlscc64.ll

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cycle-info.mir

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dag-fmf-cse.ll

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dag-merge-fast-accesses.ll

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dag-optnone.ll

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dag-rauw-cse.ll

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dag-update-nodetomatch.ll

[MachineSink] Don't reject sinking because of dead def in isProfitableToSinkTo().

2023-05-16 10:00:44 +02:00

dagcombine-and-setcc.ll

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dagcombine-buildvector.ll

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dagcombine-cse.ll

[DAG] computeOverflowForUnsignedAdd - use ConstantRange::unsignedAddMayOverflow as fallback

2023-05-06 22:03:38 +01:00

dagcombine-dead-store.ll

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dagcombine-select.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

dagcombine-shifts.ll

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dagcombine-tokenfactor-limit-crash.ll

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dagcombine-unsafe-math.ll

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darwin-bzero.ll

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darwin-no-dead-strip.ll

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darwin-preemption.ll

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darwin-quote.ll

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darwin-tls.ll

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dbg-baseptr.ll

Revert "[X86] Use the CFA as the DWARF frame base for better variable locations around calls."

2023-05-15 16:53:52 +01:00

dbg-changes-codegen-branch-folding2.mir

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dbg-changes-codegen-branch-folding.ll

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dbg-changes-codegen.ll

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dbg-combine.ll

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dbg-distringtype-uint.ll

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dbg-line-0-no-discriminator.ll

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dbg-list-dependencies.ll

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dbg-value-func-arg.ll

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dbg-value-superreg-copy2.mir

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dbg-value-superreg-copy.mir

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DbgValueOtherTargets.test

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debug-loclists-lto.ll

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debug-loclists.ll

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debug-nodebug-crash.ll

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debuginfo-locations-dce.ll

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debugloc-argsize.ll

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debugloc-no-line-0.ll

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delete-dead-instrs-with-live-uses.mir

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deopt-bundles.ll

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deopt-intrinsic-cconv.ll

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deopt-intrinsic.ll

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disable-debug-info-print-codeview.ll

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disable-shrink-store.ll

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disable-tail-calls.ll

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discontiguous-loops.ll

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discriminate-mem-ops-missing-info.ll

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discriminate-mem-ops-skip-pfetch.ll

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discriminate-mem-ops.ll

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distancemap.mir

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div8.ll

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div-rem-pair-recomposition-signed.ll

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div-rem-pair-recomposition-unsigned.ll

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div-rem-simplify.ll

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divide-by-constant.ll

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divide-windows-itanium.ll

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divmod128.ll

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divrem8_ext.ll

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divrem.ll

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dllexport-x86_64.ll

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dllexport.ll

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dllimport-x86_64.ll

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dllimport.ll

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dollar-name.ll

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domain-reassignment-implicit-def.ll

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domain-reassignment-test.ll

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domain-reassignment.mir

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dont-remove-empty-preheader.ll

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dont-trunc-store-double-to-float.ll

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dpbusd_const.ll

[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

dpbusd_i4.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

dpbusd.ll

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dropped_constructor.ll

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dso_local_equivalent_errors.ll

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dso_local_equivalent.ll

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dtor-priority-coff.ll

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dup-cost.ll

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dwarf_eh_resume.ll

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dwarf-aranges-available-externally.ll

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dwarf-aranges-zero-size.ll

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dwarf-comp-dir.ll

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dwarf-eh-prepare-dbg.ll

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dwarf-eh-prepare.ll

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dwarf-headers.ll

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dwarf-split-line-1.ll

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dwarf-split-line-2.ll

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dyn_alloca_aligned.ll

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dyn-stackalloc.ll

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dynamic-alloca-in-entry.ll

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dynamic-alloca-lifetime.ll

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dynamic-allocas-VLAs-stack-align.ll

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dynamic-allocas-VLAs.ll

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dynamic-regmask-preserve-all.ll

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dynamic-regmask-preserve-most.ll

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dynamic-regmask.ll

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DynamicCalleeSavedRegisters.ll

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early-cfi-sections.ll

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early-ifcvt-crash.ll

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early-ifcvt-remarks.ll

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early-ifcvt.ll

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eh_frame.ll

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eh-frame-unreachable.ll

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eh-label.ll

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eh-nolandingpads.ll

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eh-null-personality.ll

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eh-unknown.ll

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ehcontguard.ll

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eip-addressing-i386.ll

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element-wise-atomic-memory-intrinsics.ll

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elementwise-store-of-scalar-splat.ll

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elf-associated-discarded.ll

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elf-associated.ll

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elf-comdat2.ll

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elf-comdat.ll

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elf-exclude.ll

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elf-group.ll

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elf-retain.ll

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elf-unique-sections-by-flags.ll

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embed-bitcode.ll

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emit-big-cst.ll

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empty-function.ll

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empty-functions.ll

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empty-struct-return-type.ll

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emutls_generic.ll

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emutls-pic.ll

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emutls-pie.ll

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emutls.ll

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enqcmd-intrinsics.ll

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epilogue-cfi-fp.ll

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epilogue-cfi-no-fp.ll

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epilogue.ll

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equiv_with_fndef.ll

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equiv_with_vardef.ll

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evex-to-vex-compress.mir

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exception-label.ll

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exedeps-movq.ll

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exedepsfix-broadcast.ll

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expand-call-rvmarker.mir

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expand-integer-x86_64-intrinsic-error.ll

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expand-large-div-rem-sdiv129.ll

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expand-large-div-rem-srem129.ll

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expand-large-div-rem-udiv129.ll

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expand-large-div-rem-urem129.ll

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expand-large-fp-convert-fptosi129.ll

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expand-large-fp-convert-fptoui129.ll

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expand-large-fp-convert-si129tofp.ll

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expand-large-fp-convert-ui129tofp.ll

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expand-opaque-const.ll

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expand-post-ra-pseudo.mir

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expand-vp-fp-intrinsics.ll

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expand-vp-int-intrinsics.ll

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expand-vr64-gr64-copy.mir

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explicit-section-mergeable.ll

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extend-set-cc-uses-dbg.ll

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

extend.ll

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extended-fma-contraction.ll

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extern_weak.ll

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extmul64.ll

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extmul128.ll

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extract-bits.ll

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extract-combine.ll

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extract-concat.ll

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extract-extract.ll

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extract-fp.ll

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extract-insert.ll

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extract-lowbits.ll

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extract-store.ll

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extractelement-fp.ll

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extractelement-from-arg.ll

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extractelement-index.ll

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extractelement-legalization-cycle.ll

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extractelement-legalization-store-ordering.ll

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extractelement-load.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

extractelement-shuffle.ll

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extractps.ll

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f16c-intrinsics-fast-isel.ll

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f16c-intrinsics-upgrade.ll

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f16c-intrinsics.ll

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fabs.ll

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fadd-combines.ll

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fast-cc-callee-pops.ll

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fast-cc-merge-stack-adj.ll

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fast-cc-pass-in-regs.ll

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fast-isel-abort-warm.ll

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fast-isel-agg-constant.ll

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fast-isel-args-fail2.ll

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fast-isel-args-fail.ll

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fast-isel-args.ll

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fast-isel-atomic.ll

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fast-isel-avoid-unnecessary-pic-base.ll

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fast-isel-bail.ll

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fast-isel-bc.ll

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fast-isel-bitcast-crash.ll

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fast-isel-bitcasts-avx512.ll

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fast-isel-bitcasts-avx.ll

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fast-isel-bitcasts.ll

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fast-isel-branch_weights.ll

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fast-isel-call-bool.ll

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fast-isel-call-cleanup.ll

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fast-isel-call.ll

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fast-isel-cmp-branch2.ll

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fast-isel-cmp-branch3.ll

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fast-isel-cmp-branch.ll

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fast-isel-cmp.ll

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fast-isel-constpool.ll

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fast-isel-constrain-store-indexreg.ll

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fast-isel-deadcode.ll

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fast-isel-disable-tail-calls.ll

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fast-isel-divrem-x86-64.ll

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fast-isel-divrem.ll

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fast-isel-double-half-convertion.ll

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fast-isel-emutls.ll

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fast-isel-expect.ll

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fast-isel-extract.ll

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fast-isel-float-half-convertion.ll

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fast-isel-fneg.ll

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fast-isel-fold-mem.ll

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fast-isel-fptrunc-fpext.ll

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fast-isel-freeze.ll

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fast-isel-gc-intrinsics.ll

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fast-isel-gep.ll

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fast-isel-gv.ll

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fast-isel-i1.ll

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fast-isel-int-float-conversion-x86-64.ll

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fast-isel-int-float-conversion.ll

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fast-isel-load-bitcast-fold.ll

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fast-isel-load-i1.ll

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fast-isel-mem.ll

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fast-isel-movsbl-indexreg.ll

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fast-isel-nontemporal.ll

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fast-isel-noplt-pic.ll

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fast-isel-prolog-dbgloc.ll

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fast-isel-ret-ext.ll

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fast-isel-select-cmov2.ll

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fast-isel-select-cmov.ll

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fast-isel-select-cmp.ll

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fast-isel-select-pseudo-cmov.ll

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fast-isel-select-sse.ll

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fast-isel-select.ll

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fast-isel-sext-zext.ll

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fast-isel-sext.ll

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fast-isel-shift.ll

[X86] Remove patterns for shift/rotate with immediate 1 and optimize during MC lowering

2023-05-17 19:55:44 +08:00

fast-isel-sse12-fptoint.ll

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fast-isel-stackcheck.ll

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fast-isel-store.ll

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fast-isel-tailcall.ll

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fast-isel-tls.ll

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fast-isel-trunc-kill-subreg.ll

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fast-isel-uint-float-conversion-x86-64.ll

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fast-isel-uint-float-conversion.ll

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fast-isel-undef-fp.ll

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fast-isel-vecload.ll

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fast-isel-x32.ll

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fast-isel-x86-64.ll

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fast-isel-x86.ll

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fast-isel.ll

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fast-regalloc-live-out-debug-values.mir

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

fastcall-correct-mangling.ll

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fastcc3struct.ll

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fastcc-2.ll

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fastcc-byval.ll

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fastcc-sret.ll

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fastcc.ll

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fastisel-gep-promote-before-add.ll

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fastisel-memset-flush.ll

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fastisel-softfloat.ll

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fastmath-float-half-conversion.ll

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fastregalloc-selfloop.mir

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fastregalloc-tied-undef.mir

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fcmove.ll

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fcmp-constant.ll

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fcmp-logic.ll

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fdiv-combine-vec.ll

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fdiv-combine.ll

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fdiv.ll

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fentry-ibt.ll

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fentry-insertion.ll

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field-extract-use-trunc.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

fildll.ll

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file-directive.ll

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file-source-filename.ll

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finite-libcalls.ll

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fixed-stack-di-mir.ll

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fixup-bw-copy.ll

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fixup-bw-copy.mir

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fixup-bw-inst.ll

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fixup-bw-inst.mir

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fixup-lea.ll

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flags-copy-lowering.mir

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float-asmprint.ll

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float-conv-elim.ll

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float-strict-powi-convert.ll

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floor-soft-float.ll

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flt-rounds.ll

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fltused_function_pointer.ll

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fltused_math.ll

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fltused.ll

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fma4-commute-x86.ll

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fma4-fneg-combine.ll

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fma4-intrinsics-x86_64-folded-load.ll

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fma4-intrinsics-x86-upgrade.ll

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fma4-intrinsics-x86.ll

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fma4-scalar-memfold.ll

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fma_patterns_wide.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fma_patterns.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fma-commute-loop.ll

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fma-commute-x86.ll

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fma-do-not-commute.ll

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fma-fneg-combine-2.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fma-fneg-combine.ll

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fma-intrinsics-canonical.ll

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fma-intrinsics-fast-isel.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fma-intrinsics-phi-213-to-231.ll

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fma-intrinsics-x86-upgrade.ll

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fma-intrinsics-x86.ll

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fma-phi-213-to-231.ll

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fma-scalar-combine.ll

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fma-scalar-memfold.ll

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fma-signed-zero.ll

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fma.ll

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fmaddsub-combine.ll

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fmaxnum.ll

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fmf-flags.ll

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fmf-propagation.ll

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fmf-reduction.ll

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fminimum-fmaximum.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fminnum.ll

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fmsubadd-combine.ll

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fmul-combines.ll

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fnabs.ll

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fold-add.ll

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fold-and-shift-x86_64.ll

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fold-and-shift.ll

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fold-call-2.ll

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fold-call-3.ll

[CodeGen][ShrinkWrap] Enable PostShrinkWrap by default

2023-05-25 13:56:29 +05:30

fold-call-oper.ll

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fold-call.ll

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fold-imm.ll

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fold-load-binops.ll

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fold-load-unops.ll

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fold-load-vec.ll

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fold-load.ll

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fold-masked-merge.ll

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fold-mul-lohi.ll

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fold-pcmpeqd-1.ll

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fold-pcmpeqd-2.ll

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fold-push.ll

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fold-rmw-ops.ll

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fold-select.ll

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fold-sext-trunc.ll

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fold-tied-op.ll

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fold-vector-bv-crash.ll

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fold-vector-sext-crash2.ll

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fold-vector-sext-crash.ll

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fold-vector-sext-zext.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fold-vector-shl-crash.ll

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fold-vector-shuffle-crash.ll

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fold-vector-trunc-sitofp.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fold-vex.ll

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fold-xmm-zero.ll

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fold-zext-trunc.ll

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fops-windows-itanium.ll

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force-align-stack-alloca.ll

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force-align-stack.ll

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fp2sint.ll

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fp80-strict-libcalls.ll

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fp80-strict-scalar-cmp.ll

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fp80-strict-scalar.ll

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fp128-calling-conv.ll

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fp128-cast-strict.ll

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fp128-cast.ll

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fp128-compare.ll

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fp128-extract.ll

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fp128-g.ll

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fp128-i128.ll

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fp128-libcalls-strict.ll

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fp128-libcalls.ll

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fp128-load.ll

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fp128-select.ll

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fp128-store.ll

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fp_constant_op.ll

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fp_load_cast_fold.ll

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fp_load_fold.ll

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fp-arith.ll

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fp-cvt.ll

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fp-double-rounding.ll

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fp-elim-and-no-fp-elim.ll

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fp-elim.ll

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fp-fast.ll

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fp-fold.ll

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fp-i129.ll

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fp-immediate-shorten.ll

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fp-in-intregs.ll

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fp-intrinsics-flags-x86_64.ll

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fp-intrinsics-flags.ll

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fp-intrinsics-fma.ll

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fp-intrinsics.ll

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fp-load-trunc.ll

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fp-logic-replace.ll

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fp-logic.ll

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fp-round.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

fp-roundeven.ll

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fp-select-cmp-and.ll

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fp-stack-2results.ll

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fp-stack-compare.ll

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fp-stack-direct-ret.ll

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fp-stack-O0-crash.ll

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fp-stack-O0.ll

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fp-stack-ret-conv.ll

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fp-stack-ret-store.ll

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fp-stack-ret.ll

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fp-stack-retcopy.ll

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fp-stack-set-st1.ll

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fp-stack.ll

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fp-strict-libcalls-msvc32.ll

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fp-strict-scalar-cmp-fp16.ll

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fp-strict-scalar-cmp.ll

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fp-strict-scalar-fp16.ll

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fp-strict-scalar-fptoint-fp16.ll

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fp-strict-scalar-fptoint.ll

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fp-strict-scalar-inttofp-fp16.ll

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fp-strict-scalar-inttofp.ll

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fp-strict-scalar-round-fp16.ll

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fp-strict-scalar-round.ll

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fp-strict-scalar.ll

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fp-trunc.ll

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fp-undef.ll

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fp-une-cmp.ll

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fpclamptosat_vec.ll

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fpclamptosat.ll

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fpcmp-soft-fp.ll

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fpenv-combine.ll

[FPEnv] Get rid of extra moves in fpenv calls

2023-06-06 14:54:52 +07:00

fpenv.ll

[FPEnv] Get rid of extra moves in fpenv calls

2023-06-06 14:54:52 +07:00

fpstack-debuginstr-kill.ll

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fptosi-constant.ll

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fptosi-sat-scalar.ll

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fptosi-sat-vector-128.ll

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fptoui-may-overflow.ll

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fptoui-sat-scalar.ll

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fptoui-sat-vector-128.ll

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frame-base.ll

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frame-lowering-debug-intrinsic-2.ll

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frame-lowering-debug-intrinsic.ll

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frame-order.ll

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frameaddr.ll

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frameregister.ll

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freeze-binary.ll

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freeze-combine.ll

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freeze-constant-fold.ll

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freeze-legalize.ll

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freeze-unary.ll

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freeze-vector.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

freeze.ll

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frem-libcall.ll

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frem-msvc32.ll

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frem.ll

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fsafdo_probe2.ll

[FS-AFDO] Fix a pseudo probe test issue.

2023-05-10 15:32:47 -07:00

fsafdo_probe.ll

[FS-AFDO] Clean up non-zero discriminator for pseudo probes at the first FS discriminator pass.

2023-05-16 21:35:17 -07:00

fsafdo_test1.ll

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fsafdo_test2.ll

[FS-AFDO] Do not load non-FS profile in MIR loader.

2023-05-10 16:38:49 -07:00

fsafdo_test3.ll

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fsafdo_test4.ll

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fsetcc.ll

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fsgsbase.ll

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fshl-splat-undef.ll

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fshl.ll

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fshr.ll

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fsxor-alignment.ll

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ftrunc.ll

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full-lsr.ll

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func-sanitizer.ll

-fsanitize=function: use type hashes instead of RTTI objects

2023-05-20 08:24:20 -07:00

funclet-layout.ll

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function-alias.ll

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function-subtarget-features-2.ll

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function-subtarget-features.ll

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funnel-shift-logic-fold.ll

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funnel-shift-rot.ll

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funnel-shift.ll

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ga-offset2.ll

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ga-offset.ll

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gather-addresses.ll

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gather-scatter-opaque-ptr-2.ll

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gather-scatter-opaque-ptr.ll

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gcc_except_table_bb_sections_ehpad_groups_with_cold.ll

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gcc_except_table_bb_sections_nolpads.ll

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gcc_except_table_bb_sections.ll

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gcc_except_table_functions.ll

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gcc_except_table-multi.ll

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gcc_except_table.ll

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gep-expanded-vector.ll

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getelementptr.ll

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getmant-false-deps.ll

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gfni-funnel-shifts.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

gfni-intrinsics.ll

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gfni-rotates.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

gfni-shifts.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

ghc-cc64.ll

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ghc-cc.ll

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global-access-pie.ll

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global-fill.ll

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global-sections-comdat.ll

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global-sections-tls.ll

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global-sections.ll

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gnu-eh-alternative.ll

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gnu-seh-nolpads.ll

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gpr-to-mask.ll

[X86] Remove patterns for shift/rotate with immediate 1 and optimize during MC lowering

2023-05-17 19:55:44 +08:00

gs-fold.ll

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h-register-addressing-32.ll

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h-register-addressing-64.ll

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h-register-store.ll

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h-registers-0.ll

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h-registers-1.ll

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h-registers-2.ll

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h-registers-3.ll

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haddsub-2.ll

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haddsub-3.ll

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haddsub-4.ll

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haddsub-broadcast.ll

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haddsub-shuf-undef-operand.ll

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haddsub-shuf.ll

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haddsub-undef.ll

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haddsub.ll

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half-constrained.ll

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half-darwin.ll

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half-fp80-darwin.ll

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half.ll

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handle-move.ll

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heap-alloc-markers.mir

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hidden-vis-2.ll

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hidden-vis-3.ll

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hidden-vis-4.ll

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hidden-vis-pic.ll

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hidden-vis.ll

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hipe-cc64.ll

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hipe-cc.ll

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hipe-prologue.ll

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hoist-and-by-const-from-lshr-in-eqcmp-zero.ll

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hoist-and-by-const-from-shl-in-eqcmp-zero.ll

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hoist-common.ll

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hoist-invariant-load.ll

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hoist-spill-lpad.ll

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hoist-spill.ll

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horizontal-reduce-add.ll

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horizontal-reduce-fadd.ll

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horizontal-reduce-smax.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

horizontal-reduce-smin.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

horizontal-reduce-umax.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

horizontal-reduce-umin.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

horizontal-shuffle-2.ll

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horizontal-shuffle-3.ll

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horizontal-shuffle-4.ll

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horizontal-shuffle-demanded.ll

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horizontal-shuffle.ll

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horizontal-sum.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

hot-unlikely-section-prefix.ll

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huge-stack-offset2.ll

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huge-stack-offset.ll

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i1narrowfail.ll

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i2k.ll

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i16lshr8pat.ll

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i64-mem-copy.ll

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i64-to-float.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

i128-add.ll

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i128-and-beyond.ll

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i128-fpconv-win64-strict.ll

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i128-fpconv-win64.ll

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i128-immediate.ll

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i128-mul.ll

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i128-ret.ll

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i128-sdiv.ll

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i128-udiv.ll

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i256-add.ll

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i386-baseptr.ll

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i386-setjmp-pic.ll

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i386-shrink-wrapping.ll

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i386-tlscall-fastregalloc.ll

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i486-fence-loop.ll

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i686-win-shrink-wrapping.ll

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iabs.ll

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icall-branch-funnel.ll

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icmp-abs-C-vec.ll

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icmp-abs-C.ll

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icmp-opt.ll

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icmp-pow2-diff.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

icmp-pow2-logic-npow2.ll

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icmp-shift-opt.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

ident-metadata.ll

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ifunc-asm.ll

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illegal-bitfield-loadstore.ll

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illegal-insert.ll

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illegal-vector-args-return.ll

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immediate_merging64.ll

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immediate_merging.ll

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implicit-faultmap.ll

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implicit-null-check-negative.ll

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implicit-null-check.ll

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implicit-null-checks.mir

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implicit-null-chk-reg-rewrite.mir

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implicit-use-spill.mir

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imul-lea-2.ll

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imul-lea.ll

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imul.ll

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inalloca-ctor.ll

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inalloca-invoke.ll

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inalloca-regparm.ll

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inalloca-stdcall.ll

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inalloca.ll

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inc-of-add.ll

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inconsistent_landingpad.ll

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indirect-branch-tracking-cm-lager.ll

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indirect-branch-tracking-eh2.ll

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indirect-branch-tracking-eh.ll

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indirect-branch-tracking-r2.ll

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indirect-hidden.ll

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init-priority.ll

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inline-0bh.ll

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inline-asm-2addr.ll

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inline-asm-A-constraint.ll

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inline-asm-avx512f-v-constraint.ll

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inline-asm-avx512f-x-constraint.ll

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inline-asm-avx512vl-v-constraint-32bit.ll

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inline-asm-avx-v-constraint.ll

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inline-asm-default-clobbers.ll

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inline-asm-e-constraint.ll

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inline-asm-error.ll

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inline-asm-flag-clobber.ll

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inline-asm-flag-output.ll

[ShrinkWrap] Conservatively treat MIs without memory operands.

2023-05-12 16:11:01 +01:00

inline-asm-fpstack.ll

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inline-asm-function-call-pic.ll

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inline-asm-h.ll

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inline-asm-i-constraint-i1.ll

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inline-asm-imm-out-of-range.ll

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inline-asm-modifier-c.ll

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inline-asm-modifier-n.ll

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inline-asm-modifier-q.ll

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inline-asm-modifier-V.ll

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inline-asm-mrv.ll

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inline-asm-multilevel-gep.ll

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inline-asm-n-constraint.ll

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inline-asm-out-regs.ll

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inline-asm-p-constraint.ll

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inline-asm-pic.ll

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inline-asm-ptr-cast.ll

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inline-asm-q-regs.ll

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inline-asm-R-constraint.ll

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inline-asm-sp-clobber-memcpy.ll

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inline-asm-stack-realign2.ll

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inline-asm-stack-realign3.ll

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inline-asm-stack-realign.ll

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inline-asm-tied.ll

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inline-asm-x-i128.ll

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inline-asm-x-scalar.ll

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inline-asm.ll

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inline-sse.ll

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inlineasm-sched-bug.ll

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innermost-loop-alignment.ll

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inreg.ll

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ins_split_regalloc.ll

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ins_subreg_coalesce-1.ll

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ins_subreg_coalesce-2.ll

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ins_subreg_coalesce-3.ll

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insert-into-constant-vector.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

insert-loaded-scalar.ll

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insert-positions.ll

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insert-prefetch-inline.afdo

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insert-prefetch-inline.ll

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insert-prefetch-invalid-instr.afdo

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insert-prefetch-invalid-instr.ll

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insert-prefetch-other.afdo

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insert-prefetch.afdo

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insert-prefetch.ll

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insertelement-copytoregs.ll

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insertelement-duplicates.ll

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insertelement-legalize.ll

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insertelement-ones.ll

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insertelement-shuffle.ll

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insertelement-var-index.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

insertelement-zero.ll

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insertps-combine.ll

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insertps-from-constantpool.ll

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insertps-O0-bug.ll

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insertps-unfold-load-bug.ll

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instr-symbols.mir

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int-intrinsic.ll

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intersect-fma-fmf.ll

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interval-update-remat.ll

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invalid-liveness.mir

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invalid-shift-immediate.ll

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invpcid-intrinsic.ll

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ipra-inline-asm.ll

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ipra-local-linkage.ll

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ipra-reg-alias.ll

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ipra-reg-usage.ll

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ipra-transform.ll

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is_fpclass-fp80.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

is_fpclass.ll

[X86] Remove patterns for shift/rotate with immediate 1 and optimize during MC lowering

2023-05-17 19:55:44 +08:00

isel-blendi-gettargetconstant.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

isel-optnone.ll

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isel-postprocessing-test-fold-memop.ll

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isel-sink2.ll

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isel-sink3.ll

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isel-sink.ll

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isint.ll

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isnan2.ll

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isnan.ll

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ispositive.ll

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jcc-indirect-thunk-kernel.ll

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jump_sign.ll

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kcfi-patchable-function-prefix.ll

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kcfi.ll

[CodeGen][KCFI] Move cfi-type lowering to TargetLowering

2023-05-09 18:38:54 +00:00

keylocker-intrinsics-fast-isel.ll

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keylocker-intrinsics.ll

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known-bits-vector.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

known-bits.ll

[X86] Replace X32 test check prefix with X86

2023-06-05 14:41:40 +01:00

known-signbits-vector.ll

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knownbits-div.ll

[SelectionDAG] Improve computeKnownBits implementations of sdiv and udiv

2023-05-16 18:58:13 -05:00

kshift.ll

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label-annotation.ll

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label-heapallocsite.ll

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label-redefinition.ll

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lack-of-signed-truncation-check.ll

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lakemont.ll

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large-code-model-isel.ll

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large-constants.ll

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large-gep-chain.ll

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large-gep-scale.ll

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large-global.ll

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large-pic-string.ll

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late-address-taken.ll

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late-remat-update-2.mir

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late-remat-update.mir

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ldzero.ll

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lea-2.ll

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lea-3.ll

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lea-4.ll

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lea-5.ll

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lea-opt2.ll

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lea-opt-cse1.ll

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lea-opt-cse3.ll

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lea-opt-cse4.ll

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lea-opt-memop-check-1.ll

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lea-opt-memop-check-2.ll

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lea-opt-with-debug.mir

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lea-opt.ll

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lea-recursion.ll

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lea.ll

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leaf-fp-elim.ll

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leaFixup32.mir

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

leaFixup64.mir

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

legalize-fmp-oeq-vector-select.ll

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legalize-libcalls.ll

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legalize-shift-64.ll

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legalize-shift.ll

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legalize-shl-vec.ll

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legalize-sub-zero-2.ll

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legalize-sub-zero.ll

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legalize-types-remapid.ll

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legalize-vaarg.ll

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legalize-vec-assertzext.ll

[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure

2023-05-24 10:17:08 +08:00

legalizedag_vec.ll

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licm-dominance.ll

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licm-nested.ll

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licm-regpressure.ll

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licm-symbol.ll

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lifetime-alias.ll

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limit-split-cost.mir

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

limited-prec.ll

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line-zero-prologue-end.ll

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linux-preemption.ll

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lit.local.cfg

[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm

2023-05-17 17:03:15 +02:00

live-out-reg-info.ll

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live-range-nosubreg.ll

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liveness-local-regalloc.ll

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llc-override-mcpu-mattr.ll

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llc-start-stop-instance.ll

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llrint-conv.ll

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llround-conv.ll

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load-chain.ll

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load-combine-dbg.ll

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load-combine.ll

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load-local-v3i1.ll

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load-local-v3i129.ll

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load-local-v4i5.ll

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load-partial-dot-product.ll

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load-partial.ll

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load-scalar-as-vector.ll

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load-slice.ll

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loadStore_vectorizer.ll

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loc-remat.ll

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local_stack_symbol_ordering.ll

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localescape.ll

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log2_not_readnone.ll

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logic-shift.ll

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logical-load-fold.ll

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long-double-abi-align.ll

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long-setcc.ll

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longlong-deadload.ll

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loop-blocks.ll

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loop-hoist.ll

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loop-rotate.ll

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loop-search.ll

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loop-strength-reduce2.ll

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loop-strength-reduce4.ll

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loop-strength-reduce5.ll

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loop-strength-reduce6.ll

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loop-strength-reduce7.ll

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loop-strength-reduce8.ll

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loop-strength-reduce-2.ll

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loop-strength-reduce-3.ll

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loop-strength-reduce-crash.ll

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loop-strength-reduce.ll

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lower-bitcast.ll

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lower-ptrmask.ll

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lower-vec-shift-2.ll

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lower-vec-shift.ll

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lower-vec-shuffle-bug.ll

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lrint-conv-i32.ll

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lrint-conv-i64.ll

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lround-conv-i32.ll

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lround-conv-i64.ll

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lrshrink.ll

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lsr-addrecloops.ll

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lsr-crash-empty-uses.ll

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lsr-delayed-fold.ll

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lsr-i386.ll

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lsr-interesting-step.ll

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lsr-loop-exit-cond.ll

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lsr-negative-stride.ll

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lsr-nonaffine.ll

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lsr-normalization.ll

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lsr-overflow.ll

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lsr-quadratic-expand.ll

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lsr-redundant-addressing.ll

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lsr-reuse-trunc.ll

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lsr-reuse.ll

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lsr-sort.ll

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lsr-static-addr.ll

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lsr-wrap.ll

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lvi-hardening-gadget-graph.ll

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lvi-hardening-indirectbr.ll

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lvi-hardening-inline-asm.ll

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lvi-hardening-loads.ll

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lvi-hardening-ret.ll

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lwp-intrinsics-x86_64.ll

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lwp-intrinsics.ll

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lzcnt-cmp.ll

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lzcnt-tzcnt.ll

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lzcnt-zext-cmp.ll

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lzcnt.ll

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macCatalyst.ll

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machine-combiner-dbg.mir

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machine-combiner-int-vec.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

machine-combiner-int.ll

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machine-combiner.ll

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machine-copy-dbgvalue.mir

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machine-copy-prop.mir

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machine-cp-debug.mir

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machine-cp-mask-reg.mir

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machine-cp.ll

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machine-cse.ll

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machine-function-splitter.ll

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machine-outliner-cfi-tail-some.mir

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machine-outliner-cfi-tail.mir

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machine-outliner-debuginfo.ll

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machine-outliner-disubprogram.ll

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machine-outliner-noredzone.ll

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machine-outliner-tailcalls.ll

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machine-outliner.ll

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machine-region-info.mir

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machine-sink-and-implicit-null-checks.ll

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machine-sink.ll

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machine-trace-metrics-crash.ll

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machine-trace-metrics-entryBB-critpath.ll

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MachineBranchProb.ll

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MachineSink-CritEdge.ll

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MachineSink-DbgValue.ll

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machinesink-debug-inv-0.mir

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

MachineSink-eflags.ll

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machinesink-merge-debuginfo.ll

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machinesink-null-debuginfo.ll

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MachineSink-PHIUse.ll

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MachineSink-SubReg.ll

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macho-comdat.ll

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macho-trap.ll

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madd.ll

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mangle-question-mark.ll

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mask-negated-bool.ll

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masked_compressstore_isel.ll

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masked_compressstore.ll

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masked_expandload.ll

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masked_gather_scatter_widen.ll

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masked_gather_scatter.ll

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masked_gather.ll

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masked_load.ll

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masked_loadstore_split.ll

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masked_store_trunc_ssat.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

masked_store_trunc_usat.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

masked_store_trunc.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

masked_store.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

masked-iv-safe.ll

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masked-iv-unsafe.ll

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maskmovdqu.ll

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materialize.ll

[X86] Move encoding optimization for PUSH32i, PUSH64i to MC lowering, NFCI

2023-05-20 17:59:43 +08:00

matrix-multiply.ll

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mature-mc-support.ll

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mbp-false-cfg-break.ll

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mcinst-avx-lowering.ll

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mcinst-lowering.ll

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mcu-abi.ll

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mem-intrin-base-reg.ll

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mem-promote-integers.ll

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membarrier.ll

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memcmp-constant.ll

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memcmp-mergeexpand.ll

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memcmp-minsize-x32.ll

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memcmp-minsize.ll

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memcmp-more-load-pairs-x32.ll

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memcmp-more-load-pairs.ll

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memcmp-optsize-x32.ll

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memcmp-optsize.ll

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memcmp-pgso-x32.ll

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memcmp-pgso.ll

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memcmp-x32.ll

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memcmp.ll

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memcpy-2.ll

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memcpy-from-string.ll

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memcpy-inline-fsrm.ll

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memcpy-inline.ll

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memcpy-light-avx.ll

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memcpy-scoped-aa.ll

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memcpy-struct-by-value.ll

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memcpy.ll

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mempcpy-32.ll

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mempcpy.ll

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memset64-on-x86-32.ll

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memset-2.ll

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memset-3.ll

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memset-inline.ll

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memset-minsize.ll

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memset-nonzero.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

memset-sse-stack-realignment.ll

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memset-vs-memset-inline.ll

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memset-zero.ll

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memset.ll

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merge_store_duplicated_loads.ll

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merge_store.ll

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merge-consecutive-loads-128.ll

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merge-consecutive-loads-256.ll

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merge-consecutive-loads-512.ll

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merge-consecutive-stores-i1.ll

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merge-consecutive-stores-nt.ll

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merge-consecutive-stores.ll

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merge-sp-update-lea.ll

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merge-sp-updates-cfi.ll

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merge-store-constants.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

merge-store-dependency.ll

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merge-store-partially-alias-loads.ll

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merge-vector-stores-scale-idx-crash.ll

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MergeConsecutiveStores.ll

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mfence.ll

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midpoint-int-vec-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

midpoint-int-vec-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

midpoint-int-vec-512.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

midpoint-int.ll

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min-legal-vector-width.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

mingw-alloca.ll

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mingw-comdats-xdata.ll

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mingw-comdats.ll

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mingw-hidden.ll

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mingw-refptr.ll

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misaligned-memset.ll

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misched_phys_reg_assign_order.ll

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misched-aa-colored.ll

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misched-aa-mmos.ll

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misched-balance.ll

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misched-code-difference-with-debug.ll

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misched-copy.ll

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misched-crash.ll

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misched-fusion.ll

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misched-ilp.ll

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misched-matmul.ll

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misched-matrix.ll

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misched-new.ll

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mixed-ptr-sizes-i686.ll

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mixed-ptr-sizes.ll

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mmx-arg-passing-x86-64.ll

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mmx-arg-passing.ll

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mmx-arith.ll

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mmx-bitcast-fold.ll

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mmx-bitcast.ll

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mmx-build-vector.ll

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mmx-coalescing.ll

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mmx-copy-gprs.ll

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mmx-cvt.ll

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mmx-fold-load.ll

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mmx-fold-zero.ll

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mmx-intrinsics.ll

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mmx-only.ll

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morestack-decl.ll

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mov-zero-to-xor.ll

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movbe.ll

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movddup-load-fold.ll

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movdir-intrinsic-x86_64.ll

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movdir-intrinsic-x86.ll

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move_latch_to_loop_top.ll

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movfs.ll

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movgs.ll

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movmsk-cmp.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

movmsk.ll

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movntdq-no-avx.ll

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movpc32-check.ll

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movtopush64.ll

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movtopush-stack-align.ll

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movtopush.ll

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movtopush.mir

[X86] Move encoding optimization for PUSH32i, PUSH64i to MC lowering, NFCI

2023-05-20 17:59:43 +08:00

ms-inline-asm-array.ll

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ms-inline-asm-avx512.ll

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ms-inline-asm-functions.ll

[X86][CodeGen] Do not add offset for memory reference using symbol

2023-05-09 00:07:40 +08:00

ms-inline-asm-PR44272.ll

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ms-inline-asm-redundant-clobber.ll

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ms-inline-asm-variables-x64-1-reg.ll

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ms-inline-asm-variables-x64-2-regs.ll

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ms-inline-asm-variables-x64-nopic.ll

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ms-inline-asm-variables-x86-1-reg.ll

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ms-inline-asm-variables-x86-2-regs.ll

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ms-inline-asm.ll

[X86][CodeGen] Do not add offset for memory reference using symbol

2023-05-09 00:07:40 +08:00

mul64.ll

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mul128_sext_loop.ll

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mul128.ll

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mul-cmp.ll

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mul-constant-i8.ll

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mul-constant-i16.ll

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mul-constant-i32.ll

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mul-constant-i64.ll

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mul-constant-result.ll

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mul-demand.ll

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mul-i256.ll

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mul-i512.ll

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mul-i1024.ll

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mul-legalize.ll

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mul-remat.ll

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mul-shift-reassoc.ll

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mulc-false-deps.ll

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mulfix_combine.ll

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mulo-pow2.ll

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muloti.ll

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mult-alt-generic-i686.ll

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mult-alt-generic-x86_64.ll

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mult-alt-x86.ll

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multiple-loop-post-inc.ll

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multiple-return-values-cross-block.ll

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mulvi32.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

mulx32.ll

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mulx64.ll

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musttail-fastcall.ll

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musttail-inalloca.ll

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musttail-indirect.ll

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musttail-tailcc.ll

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musttail-varargs.ll

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musttail.ll

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mwaitx.ll

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mxcsr-reg-usage.ll

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named-reg-alloc.ll

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named-reg-notareg.ll

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named-vector-shuffle-reverse.ll

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narrow_op-1.ll

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narrow-shl-cst.ll

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narrow-shl-load.ll

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neg_cmp.ll

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neg_fp.ll

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neg-abs.ll

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neg-of-3ops-lea.ll

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neg-shl-add.ll

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negate-add-zero.ll

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negate-i1.ll

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negate-shift.ll

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negate.ll

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negative_zero.ll

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negative-offset.ll

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negative-sin.ll

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negative-stride-fptosi-user.ll

[CodeGen][ShrinkWrap] Enable PostShrinkWrap by default

2023-05-25 13:56:29 +05:30

negative-subscript.ll

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new-remat.ll

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newline-and-quote.ll

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no-and8ri8.ll

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no-cmov.ll

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no-non-zero-debug-loc-prologue.ll

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no-plt-libcalls.ll

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no-plt.ll

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no-prolog-kill.ll

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no-ret-in-x87-reg.ll

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no-sse2-avg.ll

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no-sse-win64.ll

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no-sse-x86.ll

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no-stack-arg-probe.ll

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no-wide-load.ll

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nobt.ll

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nocf_check.ll

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nocfivalue.ll

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nocx16.ll

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nomerge.ll

[CodeGen] Fix nomerge attribute not working in tail calls.

2023-05-10 14:25:11 -04:00

nomovtopush.ll

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non-lazy-bind.ll

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non-unique-sections.ll

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non-value-mem-operand.mir

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nontemporal-2.ll

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nontemporal-3.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

nontemporal-loads-2.ll

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nontemporal-loads.ll

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nontemporal.ll

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noreturn-call-linux.ll

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noreturn-call-win64.ll

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noreturn-call.ll

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norex-subreg.ll

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nosse-error1.ll

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nosse-vector.ll

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not-and-simplify.ll

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not-of-dec.ll

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not-shift.ll

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note-cet-property.ll

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note-sections.ll

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null-mcstreamer.ll

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null-streamer.ll

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O0-pipeline.ll

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objc-gc-module-flags.ll

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oddshuffles.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

oddsubvector.ll

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offload_sections.ll

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offset-operator.ll

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omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll

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opaque-constant-asm.ll

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opaque-ptr.ll

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opt_phis2.mir

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opt_phis.mir

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opt-ext-uses.ll

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opt-pipeline.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

opt-shuff-tstore.ll

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optimize-compare.mir

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

optimize-max-0.ll

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optimize-max-1.ll

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optimize-max-2.ll

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optimize-max-3.ll

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or-address.ll

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or-branch.ll

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or-lea.ll

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or-with-overflow.ll

[X86] or-with-overflow.ll - adjust or_i64_ri constant to not constant fold the icmp

2023-05-06 22:42:14 +01:00

oss-fuzz-25184.ll

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osx-private-labels.ll

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overflow-intrinsic-optimizations.ll

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overflow-intrinsic-setcc-fold.ll

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overflow.ll

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overflowing-iv-codegen.ll

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overflowing-iv.ll

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overlap-shift.ll

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packed_struct.ll

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packss.ll

[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

paddus.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

palignr.ll

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parity-vec.ll

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parity.ll

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partial-fold32.ll

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partial-fold64.ll

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partial-tail-dup.ll

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partition.ll

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pass-three.ll

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patchable-function-entry-ibt.ll

-fsanitize=function: use type hashes instead of RTTI objects

2023-05-20 08:24:20 -07:00

patchable-function-entry.ll

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patchable-prologue-debuginfo.ll

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patchable-prologue.ll

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patchpoint-invoke.ll

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patchpoint-verifiable.mir

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patchpoint-webkit_jscc.ll

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patchpoint.ll

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pause.ll

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pcsections-atomics.ll

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pcsections-memops.ll

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pcsections.ll

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peep-setb.ll

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peep-test-0.ll

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peep-test-1.ll

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peep-test-2.ll

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peep-test-3.ll

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peep-test-4.ll

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peep-test-5.ll

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peephole-cvt-sse.ll

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peephole-fold-movsd.ll

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peephole-fold-testrr.mir

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

peephole-multiple-folds.ll

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peephole-na-phys-copy-folding.ll

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peephole-nofold-tpoff-x86_64.mir

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peephole-nofold-tpoff-x86.mir

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peephole-recurrence.mir

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peephole-test-after-add.mir

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peephole.mir

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perm.avx2-false-deps.ll

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perm.avx512-false-deps.ll

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personality_size.ll

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personality.ll

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phaddsub-extract.ll

[X86] narrowShuffle - only narrow from legal vector types

2023-05-12 16:41:20 +01:00

phaddsub-undef.ll

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phaddsub.ll

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phi-bit-propagation.ll

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phi-immediate-factoring.ll

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phielim-split.ll

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phielim-undef.mir

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phys_subreg_coalesce-2.ll

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phys_subreg_coalesce-3.ll

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phys_subreg_coalesce.ll

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phys-reg-local-regalloc.ll

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physreg-pairs-error.ll

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physreg-pairs.ll

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pic_jumptable.ll

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pic-load-remat.ll

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pic.ll

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pie.ll

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pku.ll

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pmaddubsw.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

pmovext.ll

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pmovsx-inreg.ll

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pmul.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

pmulh.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

pmulld.ll

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pmullq-false-deps.ll

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pointer-vector.ll

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poison-ops.ll

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pop-stack-cleanup-msvc.ll

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pop-stack-cleanup.ll

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popcnt.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

post-ra-sched-with-debug.mir

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post-ra-sched.ll

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postalloc-coalescing.ll

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postra-ignore-dbg-instrs.mir

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postra-licm.ll

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pow-libcall.ll

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pow.75.ll

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pow.ll

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powi-int32min.ll

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powi-windows.ll

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powi.ll

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pr1462.ll

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[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

pr30290.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

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Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

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Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

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Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

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Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

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[CodeGen][ShrinkWrap] Enable PostShrinkWrap by default

2023-05-25 13:56:29 +05:30

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pr44976.ll

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pr45067.ll

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pr45378.ll

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pr45443.ll

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pr45563-2.ll

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pr45563.ll

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pr45833.ll

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pr45995-2.ll

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pr45995.ll

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pr46004.ll

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pr46189.ll

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pr46315.ll

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pr46455.ll

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pr46527.ll

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pr46532.ll

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pr46585.ll

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pr46820.ll

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pr46827.ll

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

pr46877.ll

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pr47000.ll

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pr47024.ll

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pr47299.ll

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pr47482.ll

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pr47517.ll

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pr47857.ll

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pr47874.ll

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pr48064.mir

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pr48215.ll

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pr48458.ll

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pr48727.ll

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pr48888.ll

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pr49028.ll

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pr49076.ll

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pr49087.ll

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pr49162.ll

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pr49393.ll

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pr49451.ll

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pr49466.ll

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pr49467.ll

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pr49587.ll

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pr50254.ll

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pr50374.ll

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pr50431.ll

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pr50609.ll

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pr50709.ll

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pr50782.ll

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pr50823.ll

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pr50907.ll

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pr51175.ll

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pr51281.ll

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pr51371.ll

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pr51615.ll

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pr51878_computeAliasing.ll

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pr51903.mir

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pr52567.ll

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pr53243-tail-call-fastisel.ll

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pr53247.ll

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pr53419.ll

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pr53842.ll

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pr53990-incorrect-machine-sink.ll

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pr54369.ll

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pr55158.ll

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pr55271.ll

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pr55648.ll

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pr55846.ll

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pr56103.ll

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pr56170.ll

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pr56351.ll

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pr57283.ll

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pr57340.ll

[SelectionDAG] Correct AddNodeIDCustom for MemIntrinsicSDNodes.

2023-05-11 16:28:47 -07:00

pr57402.ll

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pr57474.ll

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pr57554.ll

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pr57576.ll

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pr57658.ll

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pr57673.ll

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pr57673.mir

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pr58538.ll

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pr58685.ll

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pr58914.mir

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pr59258.ll

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pr59305.ll

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pr59980.ll

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pr61038.ll

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pr61348.ll

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pr61384.ll

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pr61524.ll

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pr61923.ll

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pr61964.ll

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pr62014.ll

[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

pr62242.ll

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pr62286.ll

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pr62653.ll

[X86] narrowShuffle - only narrow from legal vector types

2023-05-12 16:41:20 +01:00

pr63091.ll

[X86] canonicalizeShuffleWithBinOps - ensure a binary shuffle of binops have the same value type

2023-06-05 11:18:28 +01:00

PR34565.ll

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PR37310.mir

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PR40322.ll

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pre-coalesce-2.ll

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pre-coalesce.ll

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pre-coalesce.mir

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pre-ra-sched.ll

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preallocated-nocall.ll

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preallocated-x64.ll

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preallocated.ll

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prefer-avx256-lzcnt.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

prefer-avx256-mask-extend.ll

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prefer-avx256-mask-shuffle.ll

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prefer-avx256-mulo.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

prefer-avx256-popcnt.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

prefer-avx256-shift.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

prefer-avx256-trunc.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

prefer-avx256-wide-mul.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

prefer-fpext-splat.ll

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prefetch.ll

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prefetchi.ll

[X86] Don't crash on instruction prefetch intrinsics without PREFETCHI support.

2023-05-21 21:31:21 -07:00

prefixdata.ll

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preserve_allcc64-ret-double.ll

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preserve_allcc64.ll

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preserve_mostcc64-ret-double.ll

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preserve_mostcc64-sret.ll

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preserve_mostcc64.ll

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private-2.ll

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private.ll

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probe-stack-eflags.ll

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probe-stack-x32.ll

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prolog-push-seq.ll

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prologepilog_deref_size.mir

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prologue-epilogue-remarks.mir

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prologuedata.ll

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promote-assert-zext.ll

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promote-cmp.ll

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promote-i16.ll

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promote-sra-by-itself.ll

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promote-trunc.ll

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promote-vec3.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

promote.ll

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ps4-noreturn.ll

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ps4-ssp-nop.ll

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psadbw.ll

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pseudo_cmov_lower1.ll

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pseudo_cmov_lower2.ll

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pseudo_cmov_lower-fp16.ll

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pseudo_cmov_lower.ll

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pshufb-mask-comments.ll

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pshufd-combine-crash.ll

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psubus.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

ptest.ll

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ptr-rotate.ll

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ptrtoint-constexpr-invalid.ll

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ptrtoint-constexpr.ll

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ptrtoint-narrow.ll

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ptwrite32-intrinsic.ll

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ptwrite64-intrinsic.ll

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pull-binop-through-shift.ll

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pull-conditional-binop-through-shift.ll

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push-cfi-debug.ll

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push-cfi-obj.ll

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push-cfi.ll

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

ragreedy-bug.ll

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ragreedy-hoist-spill.ll

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ragreedy-last-chance-recoloring.ll

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range-false-deps.ll

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raoint-intrinsics-32.ll

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raoint-intrinsics-64.ll

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rd-mod-wr-eflags.ll

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rdpid.ll

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rdpmc.ll

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rdpru.ll

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rdrand-x86_64.ll

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rdrand.ll

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rdseed-x86_64.ll

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rdseed.ll

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rdtsc-upgrade.ll

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rdtsc.ll

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read-fp-no-frame-pointer.ll

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reassociate-add.ll

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recip-fastmath2.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

recip-fastmath.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

recip-pic.ll

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red-zone2.ll

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red-zone.ll

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reduce-trunc-shl.ll

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regalloc-advanced-split-cost.ll

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regalloc-copy-hints.mir

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regalloc-fast-missing-live-out-spill.mir

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regalloc-reconcile-broken-hints.ll

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regalloc-spill-at-ehpad.ll

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regalloc-tight-invoke.ll

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regcall-no-plt.ll

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reghinting.ll

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regparm.ll

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regpressure.ll

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relocimm-small-model.ll

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relptr-rodata.ll

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rem_crash.ll

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rem.ll

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remarks-section.ll

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remat-constant.ll

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remat-fold-load.ll

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remat-mov-0.ll

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remat-phys-dead.ll

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remat-scalar-zero.ll

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replace_unsupported_masked_mem_intrin.ll

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replace-load-and-with-bzhi.ll

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ret-addr.ll

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ret-i64-0.ll

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ret-mmx.ll

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retpoline-external.ll

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retpoline-regparm.ll

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retpoline.ll

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return_zeroext_i2.ll

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return-ext.ll

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returned-trunc-tail-calls.ll

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rev16.ll

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reverse_branches.ll

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rip-rel-address.ll

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rip-rel-lea.ll

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rodata-relocs.ll

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rot16.ll

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rot32.ll

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rot64.ll

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rotate2.ll

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rotate4.ll

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rotate5.ll

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rotate_vec.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

rotate-extract-vector.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

rotate-extract.ll

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rotate-multi.ll

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rotate.ll

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rounding-ops.ll

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rrlist-livereg-corrutpion.ll

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rtm.ll

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sad_variations.ll

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sad.ll

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sadd_sat_plus.ll

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sadd_sat_vec.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

sadd_sat.ll

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saddo-redundant-add.ll

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safestack_inline.ll

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safestack_ssp.ll

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safestack.ll

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sandybridge-loads.ll

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sar_fold64.ll

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sar_fold.ll

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sat-add.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

sbb-false-dep.ll

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sbb-zero-idiom.ll

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sbb.ll

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scalar_sse_minmax.ll

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scalar_widen_div.ll

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scalar-extract.ll

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scalar-fp-to-i32.ll

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scalar-fp-to-i64.ll

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scalar-int-to-fp.ll

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scalar-min-max-fill-operand.ll

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scalarize-bitcast.ll

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scalarize-fp.ll

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scatter-schedule.ll

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scavenger.mir

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scev-interchange.ll

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scheduler-asm-moves.mir

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scheduler-backtracking.ll

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sdiv_fix_sat.ll

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sdiv_fix.ll

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sdiv-exact.ll

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sdiv-pow2.ll

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section_mergeable_size.ll

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segmented-stacks-dynamic.ll

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segmented-stacks-standalone.ll

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segmented-stacks.ll

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seh-catch-all-win32.ll

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seh-except-finally.ll

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seh-except-restore.ll

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seh-exception-code.ll

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seh-filter-no-personality.ll

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seh-no-invokes.ll

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seh-safe-div-win32.ll

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seh-safe-div.ll

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seh-stack-realign.ll

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seh-unwind-inline-asm-codegen.ll

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select_const.ll

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select_meta.ll

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select-1-or-neg1.ll

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select-constant-lea.ll

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select-constant-xor.ll

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select-ext.ll

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select-lea.ll

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select-mmx.ll

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select-of-fp-constants.ll

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select-of-half-constants.ll

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select-optimize.ll

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select-prof-codegen.ll

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select-smin-smax.ll

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select-sra.ll

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select-testb-volatile-load.ll

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select-with-and-or.ll

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select.ll

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selectcc-to-shiftand.ll

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selectiondag-crash.ll

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selectiondag-cse.ll

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selectiondag-debug-loc.ll

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selectiondag-order.ll

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selectiondag-patchpoint-legalize.ll

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selectiondag-stackmap-legalize.ll

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semantic-interposition-asm.ll

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serialize-intrinsic.ll

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setcc-combine.ll

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setcc-freeze.ll

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setcc-fsh.ll

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setcc-logic.ll

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setcc-lowering.ll

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setcc-narrowing.ll

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setcc-non-simple-type.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

setcc-wide-types.ll

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setcc.ll

[SDAG] Fix incorrect use of undef for boolean contents (PR63055)

2023-06-01 15:19:22 +02:00

setjmp-spills.ll

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setoeq.ll

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setuge.ll

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sext-i1.ll

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sext-load.ll

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sext-ret-val.ll

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sext-setcc-self.ll

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sext-subreg.ll

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sext-trunc.ll

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sext-vsetcc.ll

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sha.ll

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shadow-stack.ll

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shift_minsize.ll

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shift-amount-mod.ll

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shift-and-x86_64.ll

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shift-and.ll

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shift-avx2-crash.ll

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shift-bmi2.ll

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shift-by-signext.ll

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shift-coalesce.ll

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shift-codegen.ll

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shift-combine-crash.ll

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shift-combine.ll

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shift-double-x86_64.ll

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shift-double.ll

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shift-folding.ll

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shift-i128.ll

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shift-i256.ll

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shift-logic.ll

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shift-mask.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

shift-one.ll

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shift-pair.ll

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shift-parts.ll

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shift-pcmp.ll

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shl_elim.ll

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shl_undef.ll

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shl-anyext.ll

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shl-crash-on-legalize.ll

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shl-i64.ll

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shrink_vmul_sse.ll

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shrink_vmul.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

shrink_wrap_dbg_value.mir

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shrink-compare-pgso.ll

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shrink-compare.ll

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shrink-const.ll

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shrink-fp-const1.ll

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shrink-fp-const2.ll

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shrink-wrap-chkstk-x86_64.ll

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shrink-wrap-chkstk.ll

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shrink-wrapping-vla.ll

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shrinkwrap-callbr.ll

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shrinkwrap-hang.ll

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shuffle-as-shifts.ll

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shuffle-blendw.ll

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shuffle-combine-crash-2.ll

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shuffle-combine-crash-3.ll

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shuffle-combine-crash-4.ll

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shuffle-combine-crash.ll

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shuffle-extract-subvector.ll

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shuffle-of-insert.ll

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shuffle-of-shift.ll

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shuffle-of-splat-multiuses.ll

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shuffle-strided-with-offset-128.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

shuffle-strided-with-offset-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

shuffle-strided-with-offset-512.ll

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shuffle-vs-trunc-128.ll

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shuffle-vs-trunc-256.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

shuffle-vs-trunc-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

sibcall-2.ll

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sibcall-3.ll

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sibcall-4.ll

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sibcall-5.ll

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sibcall-6.ll

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sibcall-byval.ll

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sibcall-win64.ll

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sibcall.ll

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signbit-shift.ll

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signbit-test.ll

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signed-truncation-check.ll

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simple-register-allocation-read-undef.mir

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simple-zext.ll

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sincos-opt.ll

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sincos.ll

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single_elt_vector_memory_operation.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

sink-addsub-of-const.ll

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sink-blockfreq.ll

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sink-down-undef-use.mir

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sink-gep-before-mem-inst.ll

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sink-hoist.ll

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sink-local-value.ll

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sink-out-of-loop.ll

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sitofp.ll

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sjlj-baseptr.ll

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sjlj-eh-musttail.ll

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sjlj-eh.ll

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sjlj-shadow-stack-liveness.mir

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sjlj-unwind-inline-asm-codegen.ll

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sjlj.ll

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slow-incdec.ll

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slow-pmulld.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

slow-unaligned-mem.ll

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small-byval-memcpy.ll

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smax.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

smin.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

smul_fix_sat_constants.ll

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smul_fix_sat.ll

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smul_fix.ll

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smul-with-overflow.ll

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smulo-128-legalisation-lowering.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

soft-fp-legal-in-HW-reg.ll

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soft-fp.ll

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soft-sitofp.ll

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speculation-hardening-sls.ll

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speculative-execution-side-effect-suppression.ll

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speculative-load-hardening-call-and-ret.ll

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speculative-load-hardening-gather.ll

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speculative-load-hardening-indirect.ll

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speculative-load-hardening-no-spill.ll

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speculative-load-hardening.ll

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splat-const.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

splat-for-size.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

split-eh-lpad-edges.ll

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split-extend-vector-inreg.ll

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split-store.ll

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split-vector-bitcast.ll

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split-vector-rem.ll

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sqrt-fastmath-mir.ll

[X86] Regenerate sqrt-fastmath-mir.ll

2023-05-30 17:21:53 +01:00

sqrt-fastmath-tune.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

sqrt-fastmath-tunecpu-attr.ll

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sqrt-fastmath.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

sqrt-partial.ll

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sqrt.ll

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srem-lkk.ll

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srem-seteq-illegal-types.ll

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srem-seteq-optsize.ll

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srem-seteq-vec-nonsplat.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

srem-seteq-vec-splat.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

srem-seteq.ll

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srem-vector-lkk.ll

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sret-implicit.ll

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sse1-fcopysign.ll

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sse1.ll

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sse2-intrinsics-canonical.ll

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sse2-intrinsics-fast-isel-x86_64.ll

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sse2-intrinsics-fast-isel.ll

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sse2-intrinsics-x86_64-upgrade.ll

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sse2-intrinsics-x86_64.ll

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sse2-intrinsics-x86-upgrade.ll

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sse2-intrinsics-x86.ll

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sse2-vector-shifts.ll

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sse2.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

sse3-avx-addsub-2.ll

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sse3-avx-addsub.ll

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sse3-intrinsics-fast-isel.ll

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sse3-intrinsics-x86.ll

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Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

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Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

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[IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data

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Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

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Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

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Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

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Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

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Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

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Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

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uadd_sat_vec.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

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uint_to_fp-2.ll

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uint_to_fp-3.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 13:01:50 +01:00

uint_to_fp.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 13:01:50 +01:00

uintr-intrinsics.ll

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umax.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

umin.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

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undef-eflags.mir

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undo-mul-and.ll

[X86] Invert transforming (x * (Pow2_Ceil(C1) - (1 << C0))) & C1 -> (-x << C0) & C1

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Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

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unfoldMemoryOperand.mir

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unknown-location.ll

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unreachable-loop-sinking.ll

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Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

update-terminator.mir

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Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

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Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

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urem-seteq-vec-tautological.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

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usub_sat_vec.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

usub_sat.ll

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utf8.ll

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utf16-cfstrings.ll

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Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

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vaes-intrinsics-avx512vl-x86.ll

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vaes-intrinsics-avx-x86.ll

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var-permute-128.ll

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var-permute-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

var-permute-512.ll

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vararg_no_start.ll

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vararg_tailcall.ll

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vararg-callee-cleanup.ll

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varargs-softfloat.ll

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variable-sized-darwin-bzero.ll

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variadic-node-pic.ll

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vastart-defs-eflags.ll

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vbinop-simplify-bug.ll

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vec3-setcc-crash.ll

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vec3.ll

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vec_align_i256.ll

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vec_align.ll

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vec_anyext.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vec_call.ll

…

vec_cast2.ll

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vec_cast3.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec_cast.ll

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vec_cmp_sint-128.ll

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vec_cmp_uint-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec_compare-sse4.ll

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vec_compare.ll

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vec_ctbits.ll

…

vec_ext_inreg.ll

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vec_extract-avx.ll

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vec_extract-mmx.ll

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vec_extract-sse4.ll

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vec_extract.ll

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vec_fabs.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vec_floor.ll

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vec_fneg.ll

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vec_fp_to_int.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vec_fpext.ll

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vec_fptrunc.ll

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vec_i64.ll

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vec_ins_extract-1.ll

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vec_ins_extract.ll

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vec_insert-2.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 12:08:02 +01:00

vec_insert-3.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 12:08:02 +01:00

vec_insert-4.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 12:08:02 +01:00

vec_insert-5.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 12:08:02 +01:00

vec_insert-7.ll

…

vec_insert-8.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 12:08:02 +01:00

vec_insert-9.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 12:08:02 +01:00

vec_insert-mmx.ll

[X86] Replace X32 test check prefixes with X86

2023-05-31 12:08:02 +01:00

vec_int_to_fp.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vec_loadsingles.ll

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vec_logical.ll

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vec_minmax_match.ll

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vec_minmax_sint.ll

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vec_minmax_uint.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec_no-common-bits.ll

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vec_partial.ll

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vec_reassociate.ll

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vec_return.ll

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vec_saddo.ll

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vec_sdiv_to_shift.ll

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vec_set-2.ll

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vec_set-3.ll

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vec_set-4.ll

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vec_set-6.ll

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vec_set-7.ll

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vec_set-8.ll

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vec_set-A.ll

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vec_set-B.ll

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vec_set-C.ll

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vec_set-D.ll

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vec_set-F.ll

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vec_set-H.ll

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vec_set.ll

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vec_setcc-2.ll

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vec_setcc.ll

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vec_shift2.ll

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vec_shift3.ll

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vec_shift4.ll

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vec_shift5.ll

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vec_shift6.ll

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vec_shift7.ll

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vec_shift.ll

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vec_shuf-insert.ll

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vec_smulo.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec_split.ll

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vec_ss_load_fold.ll

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vec_ssubo.ll

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vec_trunc_sext.ll

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vec_uaddo.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec_uint_to_fp-fastmath.ll

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vec_uint_to_fp.ll

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vec_umulo.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec_unsafe-fp-math.ll

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vec_usubo.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec_zero_cse.ll

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vec_zero-2.ll

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vec_zero.ll

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vec-copysign-avx512.ll

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vec-copysign.ll

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vec-libcalls.ll

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vec-loadsingles-alignment.ll

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vec-strict-128-fp16.ll

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vec-strict-128.ll

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vec-strict-256-fp16.ll

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vec-strict-256.ll

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vec-strict-512-fp16.ll

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vec-strict-512.ll

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vec-strict-cmp-128-fp16.ll

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vec-strict-cmp-128.ll

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vec-strict-cmp-256-fp16.ll

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vec-strict-cmp-256.ll

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vec-strict-cmp-512-fp16.ll

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vec-strict-cmp-512.ll

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vec-strict-cmp-sub128.ll

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vec-strict-fptoint-128-fp16.ll

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vec-strict-fptoint-128.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vec-strict-fptoint-256-fp16.ll

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vec-strict-fptoint-256.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vec-strict-fptoint-512-fp16.ll

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vec-strict-fptoint-512.ll

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vec-strict-inttofp-128-fp16.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vec-strict-inttofp-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vec-strict-inttofp-256-fp16.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vec-strict-inttofp-256.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vec-strict-inttofp-512-fp16.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vec-strict-inttofp-512.ll

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vec-strict-round-128.ll

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vec-trunc-store.ll

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vecloadextract.ll

Revert "Revert "[X86] Remove patterns for ADC/SBB with immediate 8 and optimize during MC lowering, NFCI""

2023-05-19 22:21:56 +08:00

vector_splat-const-shift-of-constmasked.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-bitreverse.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-blend.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-bo-select-avx512.ll

[X86] fold select to mask instructions.

2023-05-26 21:53:03 +08:00

vector-bo-select.ll

[X86] fold select to mask instructions.

2023-05-26 21:53:03 +08:00

vector-compare-all_of.ll

…

vector-compare-any_of.ll

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vector-compare-combines.ll

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vector-compare-results.ll

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vector-compare-simplify.ll

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vector-constrained-fp-intrinsics-flags.ll

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vector-constrained-fp-intrinsics-fma.ll

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vector-constrained-fp-intrinsics.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-ext-logic.ll

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vector-extend-inreg.ll

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vector-fshl-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshl-256.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-fshl-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshl-rot-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshl-rot-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshl-rot-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshl-rot-sub128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshr-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshr-256.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-fshr-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshr-rot-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshr-rot-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshr-rot-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-fshr-rot-sub128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-gep.ll

…

vector-half-conversions.ll

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vector-idiv-sdiv-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-idiv-sdiv-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-idiv-sdiv-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-idiv-udiv-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-idiv-udiv-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-idiv-udiv-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-idiv-v2i32.ll

…

vector-idiv.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleave.ll

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vector-interleaved-load-i8-stride-2.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i8-stride-3.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i8-stride-4.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i8-stride-5.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i8-stride-6.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i8-stride-7.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i8-stride-8.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i16-stride-2.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-load-i16-stride-3.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i16-stride-4.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i16-stride-5.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i16-stride-6.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i16-stride-7.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i16-stride-8.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i32-stride-2.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-load-i32-stride-3.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-load-i32-stride-4.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-load-i32-stride-5.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-load-i32-stride-6.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-load-i32-stride-7.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-load-i32-stride-8.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i64-stride-2.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-load-i64-stride-3.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-load-i64-stride-4.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-load-i64-stride-5.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-load-i64-stride-6.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i64-stride-7.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-load-i64-stride-8.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i8-stride-2.ll

…

vector-interleaved-store-i8-stride-3.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i8-stride-4.ll

…

vector-interleaved-store-i8-stride-5.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i8-stride-6.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i8-stride-7.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i8-stride-8.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i16-stride-2.ll

…

vector-interleaved-store-i16-stride-3.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i16-stride-4.ll

…

vector-interleaved-store-i16-stride-5.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i16-stride-6.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i16-stride-7.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i16-stride-8.ll

…

vector-interleaved-store-i32-stride-2.ll

…

vector-interleaved-store-i32-stride-3.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-store-i32-stride-4.ll

…

vector-interleaved-store-i32-stride-5.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-store-i32-stride-6.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-store-i32-stride-7.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-store-i32-stride-8.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-interleaved-store-i64-stride-2.ll

…

vector-interleaved-store-i64-stride-3.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-store-i64-stride-4.ll

…

vector-interleaved-store-i64-stride-5.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-interleaved-store-i64-stride-6.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i64-stride-7.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-interleaved-store-i64-stride-8.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-intrinsics.ll

…

vector-lzcnt-128.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-lzcnt-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-lzcnt-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-lzcnt-sub128.ll

…

vector-merge-store-fp-constants.ll

…

vector-mul.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-mulfix-legalize.ll

…

vector-narrow-binop.ll

…

vector-pack-128.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-pack-256.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-pack-512.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-partial-undef.ll

…

vector-pcmp.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-popcnt-128-ult-ugt.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-popcnt-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-popcnt-256-ult-ugt.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-popcnt-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-popcnt-512-ult-ugt.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-popcnt-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-reduce-add-mask.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-reduce-add-sext.ll

…

vector-reduce-add-zext.ll

…

vector-reduce-add.ll

…

vector-reduce-and-bool.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-reduce-and-cmp.ll

…

vector-reduce-and-scalar.ll

…

vector-reduce-and.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-reduce-fadd-fast.ll

…

vector-reduce-fadd.ll

…

vector-reduce-fmax-fmin-fast.ll

…

vector-reduce-fmax-nnan.ll

…

vector-reduce-fmax.ll

…

vector-reduce-fmin-nnan.ll

…

vector-reduce-fmin.ll

…

vector-reduce-fmul-fast.ll

…

vector-reduce-fmul.ll

…

vector-reduce-mul.ll

…

vector-reduce-or-bool.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-reduce-or-cmp.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-reduce-or.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-reduce-smax.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-reduce-smin.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-reduce-umax.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-reduce-umin.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-reduce-xor-bool.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-reduce-xor.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-rem.ll

…

vector-replicaton-i1-mask.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-rotate-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-rotate-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-rotate-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-sext.ll

[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

vector-shift-ashr-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-ashr-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-ashr-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-ashr-sub128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-by-select-loop.ll

…

vector-shift-lshr-128.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-shift-lshr-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-lshr-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-lshr-sub128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-shl-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-shl-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-shl-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shift-shl-sub128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-128-unpck.ll

…

vector-shuffle-128-v2.ll

…

vector-shuffle-128-v4.ll

…

vector-shuffle-128-v8.ll

[X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size

2023-05-27 14:05:44 +01:00

vector-shuffle-128-v16.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-256-v4.ll

…

vector-shuffle-256-v8.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-shuffle-256-v16.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-256-v32.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-shuffle-512-v8.ll

…

vector-shuffle-512-v16.ll

[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds

2023-05-23 10:58:17 +01:00

vector-shuffle-512-v32.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-512-v64.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-avx512.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-shuffle-combining-avx2.ll

[X86] printConstant - fix asm comment issue when broadcasting from a wider constant pool entry

2023-05-31 12:28:17 +01:00

vector-shuffle-combining-avx512bw.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-combining-avx512bwvl.ll

…

vector-shuffle-combining-avx512f.ll

…

vector-shuffle-combining-avx512vbmi.ll

…

vector-shuffle-combining-avx.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-shuffle-combining-sse4a.ll

…

vector-shuffle-combining-sse41.ll

…

vector-shuffle-combining-ssse3.ll

…

vector-shuffle-combining-xop.ll

…

vector-shuffle-combining.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-shuffle-concatenation.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-shuffle-fast-per-lane.ll

…

vector-shuffle-masked.ll

…

vector-shuffle-mmx.ll

…

vector-shuffle-sse1.ll

…

vector-shuffle-sse4a.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-shuffle-sse41.ll

…

vector-shuffle-v1.ll

…

vector-shuffle-v48.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-v192.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-shuffle-variable-128.ll

…

vector-shuffle-variable-256.ll

…

vector-sqrt.ll

…

vector-trunc-math.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-trunc-packus.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-trunc-ssat.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-trunc-usat.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-trunc.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vector-truncate-combine.ll

…

vector-tzcnt-128.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-tzcnt-256.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-tzcnt-512.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-unsigned-cmp.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vector-variable-idx2.ll

…

vector-variable-idx.ll

…

vector-width-store-merge.ll

…

vector-zext.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

vector-zmov.ll

…

vector.ll

…

vectorcall.ll

…

version_directive.ll

…

vfcmp.ll

…

viabs.ll

…

virtreg-physreg-def-regallocfast.mir

…

virtual-registers-cleared-in-machine-functions-liveins.ll

…

visibility2.ll

…

visibility.ll

…

vmaskmov-offset.ll

…

vmovq.ll

…

volatile-memstores-nooverlapping-load-stores.ll

…

volatile.ll

…

vortex-bug.ll

…

vp2intersect_multiple_pairs.ll

…

vpshufbitqbm-intrinsics-upgrade.ll

…

vpshufbitqbm-intrinsics.ll

…

vsel-cmp-load.ll

…

vselect-2.ll

…

vselect-avx512.ll

…

vselect-avx.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vselect-constants.ll

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vselect-minmax.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vselect-packss.ll

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vselect-pcmp.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vselect-post-combine.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

vselect-zero.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

vselect.ll

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vshift_scalar.ll

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vshift_split2.ll

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vshift_split.ll

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vshift-1.ll

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vshift-2.ll

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vshift-3.ll

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vshift-4.ll

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vshift-5.ll

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vshift-6.ll

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vshli-simplify-demanded-bits.ll

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vsplit-and.ll

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vzero-excess.ll

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waitpkg-intrinsics.ll

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warn-stack.ll

Fix test failure from 945f6e65be

2023-05-09 16:09:55 -04:00

wbinvd-intrinsic.ll

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wbnoinvd-intrinsic.ll

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weak_def_can_be_hidden.ll

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weak-undef.ll

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weak.ll

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webkit-jscc.ll

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wide-fma-contraction.ll

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wide-integer-cmp.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

wide-integer-fold.ll

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wide-scalar-shift-by-byte-multiple-legalization.ll

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wide-scalar-shift-legalization.ll

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widen_arith-1.ll

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widen_arith-2.ll

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widen_arith-3.ll

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widen_arith-4.ll

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widen_arith-5.ll

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widen_arith-6.ll

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widen_bitops-0.ll

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widen_bitops-1.ll

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widen_cast-1.ll

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widen_cast-2.ll

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widen_cast-3.ll

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widen_cast-4.ll

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widen_cast-5.ll

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widen_cast-6.ll

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widen_compare-1.ll

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widen_conv-1.ll

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widen_conv-2.ll

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widen_conv-3.ll

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widen_conv-4.ll

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widen_conversions.ll

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widen_extract-1.ll

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widen_fadd.ll

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widen_fdiv.ll

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widen_fmul.ll

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widen_fsub.ll

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widen_load-0.ll

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widen_load-1.ll

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widen_load-2.ll

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widen_load-3.ll

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widen_mul.ll

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widen_shuffle-1.ll

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widen-load-of-small-alloca-with-zero-upper-half.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

widen-load-of-small-alloca.ll

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WidenArith.ll

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widened-broadcast.ll

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win32_sret.ll

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win32-bool.ll

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win32-eh-available-externally.ll

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win32-eh-states.ll

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win32-eh.ll

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win32-pic-jumptable.ll

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win32-preemption.ll

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win32-seh-catchpad-realign.ll

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win32-seh-catchpad.ll

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win32-seh-nested-finally.ll

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win32-spill-xmm.ll

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win32-ssp.ll

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win64_alloca_dynalloca.ll

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win64_call_epi.ll

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win64_eh_leaf2.ll

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win64_eh_leaf.ll

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win64_eh.ll

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win64_frame.ll

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win64_nonvol.ll

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win64_params.ll

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win64_regcall.ll

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win64_sibcall.ll

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win64_vararg.ll

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win64-bool.ll

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win64-byval.ll

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win64-eh-empty-block-2.mir

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win64-eh-empty-block.ll

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win64-eh-trailing-statepoint.ll

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win64-funclet-preisel-intrinsics.ll

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win64-funclet-savexmm.ll

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win64-jumptable.ll

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win64-long-double.ll

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win64-nosse-csrs.ll

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win64-seh-epilogue-statepoint.ll

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win64-stackprobe-overflow.ll

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win_chkstk.ll

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win_coreclr_chkstk_liveins.mir

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win_coreclr_chkstk.ll

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win_cst_pool.ll

Revert rG98061013e01207444cfd3980 - [X86] X86FixupVectorConstantsPass - attempt to replace full width fp vector constant loads with broadcasts on AVX+ targets

2023-06-06 18:44:24 +01:00

win-alloca-expander.ll

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win-catchpad-csrs.ll

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win-catchpad-nested-cxx.ll

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win-catchpad-nested.ll

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win-catchpad-varargs.ll

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win-catchpad.ll

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win-cleanuppad.ll

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win-funclet-cfi.ll

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win-mixed-ehpersonality.ll

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win-smallparams.ll

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windows-itanium-alloca.ll

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windows-seh-EHa-CppCatchDotDotDot.ll

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windows-seh-EHa-CppCondiTemps.ll

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windows-seh-EHa-CppDtors01.ll

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windows-seh-EHa-TryInFinally.ll

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wineh-coreclr.ll

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wineh-exceptionpointer.ll

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wineh-no-ehpads.ll

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x32-cet-intrinsics.ll

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x32-function_pointer-1.ll

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x32-function_pointer-2.ll

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x32-function_pointer-3.ll

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x32-indirectbr.ll

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x32-landingpad.ll

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x32-lea-1.ll

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x32-movtopush64.ll

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x32-va_start.ll

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x64-cet-intrinsics.ll

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x86_64-mul-by-const.ll

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x86-16.ll

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x86-32-intrcc.ll

[X86] Align stack to 16-bytes on 32-bit with X86_INTR call convention

2023-06-01 17:00:34 +08:00

x86-32-vector-calling-conv.ll

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x86-64-and-mask.ll

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x86-64-arg.ll

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x86-64-asm.ll

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x86-64-baseptr.ll

[X86] Fix the bug of pr62625

2023-05-14 21:51:44 +08:00

x86-64-bittest-logic.ll

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x86-64-call.ll

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x86-64-disp.ll

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x86-64-double-precision-shift-left.ll

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x86-64-double-precision-shift-right.ll

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x86-64-double-shifts-Oz-Os-O2.ll

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x86-64-double-shifts-var.ll

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x86-64-extend-shift.ll

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x86-64-flags-intrinsics.ll

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x86-64-gv-offset.ll

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x86-64-intrcc-nosse.ll

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x86-64-intrcc-uintr.ll

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x86-64-intrcc.ll

fix stack probe lowering for x86_intrcc

2023-05-09 16:31:42 +08:00

x86-64-jumps.ll

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x86-64-mem.ll

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x86-64-ms_abi-vararg.ll

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x86-64-pic-1.ll

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x86-64-pic-2.ll

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x86-64-pic-3.ll

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x86-64-pic-4.ll

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x86-64-pic-5.ll

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x86-64-pic-6.ll

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x86-64-pic-7.ll

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x86-64-pic-8.ll

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x86-64-pic-9.ll

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x86-64-pic-10.ll

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x86-64-pic-11.ll

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x86-64-pic-12.ll

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x86-64-pic.ll

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x86-64-plt-relative-reloc.ll

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x86-64-psub.ll

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x86-64-ptr-arg-simple.ll

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x86-64-ret0.ll

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x86-64-shortint.ll

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x86-64-sret-return-2.ll

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x86-64-sret-return.ll

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x86-64-stack-and-frame-ptr.ll

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x86-64-static-relo-movl.ll

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x86-64-tls-1.ll

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x86-64-varargs.ll

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x86-64-veccallcc.ll

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x86-64-xmm-spill-unaligned.ll

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x86-big-ret.ll

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x86-cmov-converter.ll

[SDAG] Preserve unpredictable metadata, teach X86CmovConversion to respect this metadata

2023-06-01 20:56:44 +02:00

x86-flags-intrinsics.ll

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x86-fold-pshufb.ll

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x86-framelowering-trap.ll

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x86-inline-asm-validation.ll

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x86-interleaved-access.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

x86-interleaved-check.ll

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x86-interrupt_cc.ll

[X86] Align stack to 16-bytes on 32-bit with X86_INTR call convention

2023-06-01 17:00:34 +08:00

x86-interrupt_cld.ll

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x86-interrupt_vzeroupper.ll

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x86-mixed-alignment-dagcombine.ll

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x86-no_callee_saved_registers.ll

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x86-no_caller_saved_registers-preserve.ll

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x86-no_caller_saved_registers.ll

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x86-plt-relative-reloc.ll

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x86-regcall-got.ll

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x86-repmov-copy-eflags.ll

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x86-sanitizer-shrink-wrapping.ll

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x86-setcc-int-to-fp-combine.ll

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x86-shifts.ll

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x86-shrink-wrap-unwind.ll

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x86-shrink-wrapping.ll

[CodeGen][ShrinkWrap] Enable PostShrinkWrap by default

2023-05-25 13:56:29 +05:30

x86-store-gv-addr.ll

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x86-upgrade-avx2-vbroadcast.ll

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x86-upgrade-avx-vbroadcast.ll

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x86-win64-shrink-wrapping.ll

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x87-reg-usage.mir

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x87-stack-pop.mir

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x87.ll

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xaluo128.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

xaluo.ll

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xchg-nofold.ll

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xmm-r64.ll

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xmm-vararg-noopt.ll

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xmulo.ll

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xop-ifma.ll

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xop-intrinsics-fast-isel.ll

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xop-intrinsics-x86_64-upgrade.ll

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xop-intrinsics-x86_64.ll

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xop-mask-comments.ll

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xop-pcmov.ll

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xop-shifts.ll

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xor-combine-debugloc.ll

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xor-icmp.ll

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xor-lea.ll

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xor-select-i1-combine.ll

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xor-with-overflow.ll

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xor.ll

Revert "[DAGCombine] Make sure combined nodes are added back to the worklist in topological order."

2023-06-05 10:55:58 -04:00

xray-attribute-instrumentation.ll

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xray-custom-log.ll

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xray-empty-firstmbb.mir

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xray-ignore-loop-detection.ll

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xray-log-args.ll

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xray-loop-detection.ll

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xray-multiplerets-in-blocks.mir

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xray-partial-instrumentation-skip-entry.ll

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xray-partial-instrumentation-skip-exit.ll

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xray-section-group.ll

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xray-selective-instrumentation-miss.ll

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xray-selective-instrumentation.ll

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xray-tail-call-sled.ll

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xtest.ll

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ymm-ordering.ll

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zero_extend_vector_inreg_of_broadcast_from_memory.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

zero_extend_vector_inreg_of_broadcast.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

zero_extend_vector_inreg.ll

Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConstantsPass - attempt to replace full width integer vector constant loads with broadcasts on AVX2+ targets

2023-06-06 18:07:33 +01:00

zero-call-used-regs-debug-info.mir

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zero-call-used-regs-fmod.ll

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zero-call-used-regs-i386.ll

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zero-call-used-regs.ll

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zero-initialized-in-bss.ll

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zero-remat.ll

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zext-demanded.ll

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zext-extract_subreg.ll

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zext-fold.ll

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zext-inreg-0.ll

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zext-inreg-1.ll

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zext-logicop-shift-load.ll

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zext-lshr.ll

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zext-sext.ll

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zext-shl.ll

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zext-trunc.ll

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zlib-longest-match.ll

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znver3-gather.ll

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