aa3519f178
- This patch provides the initial implementation for lowering a call on z/OS according to the XPLINK64 calling convention - A series of changes have been made to SystemZCallingConv.td to account for these additional XPLINK64 changes including adding a new helper function to shadow the stack along with allocation of a register wherever appropriate - For the cases of copying a f64 to a gr64 and a f128 / 128-bit vector type to a gr64, a `CCBitConvertToType` has been added and has been bitcasted appropriately in the lowering phase - Support for the ADA register (R5) will be provided in a later patch. Reviewed By: uweigand Differential Revision: https://reviews.llvm.org/D111662
35 lines
1.3 KiB
C++
35 lines
1.3 KiB
C++
//===-- SystemZCallingConv.cpp - Calling conventions for SystemZ ----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZCallingConv.h"
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#include "SystemZRegisterInfo.h"
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using namespace llvm;
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const MCPhysReg SystemZ::ELFArgGPRs[SystemZ::ELFNumArgGPRs] = {
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SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
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};
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const MCPhysReg SystemZ::ELFArgFPRs[SystemZ::ELFNumArgFPRs] = {
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SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
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};
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// The XPLINK64 ABI-defined param passing general purpose registers
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const MCPhysReg SystemZ::XPLINK64ArgGPRs[SystemZ::XPLINK64NumArgGPRs] = {
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SystemZ::R1D, SystemZ::R2D, SystemZ::R3D
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};
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// The XPLINK64 ABI-defined param passing floating point registers
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const MCPhysReg SystemZ::XPLINK64ArgFPRs[SystemZ::XPLINK64NumArgFPRs] = {
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SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
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};
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const MCPhysReg SystemZ::XPLINK64ArgVRs[SystemZ::XPLINK64NumArgVRs] = {
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SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27,
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SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31};
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