0ef8ca6d88
'Widen' recipe are only used when actual vector values are generated. Fix tryToWidenCall to do not create VPWidenCallRecipes for scalar vector factors. This was exposed by D123720, because the widened recipes are considered vector users. Reviewed By: Ayal Differential Revision: https://reviews.llvm.org/D124718
58 lines
2.4 KiB
LLVM
58 lines
2.4 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -debug -S %s 2>&1 | FileCheck %s
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; CHECK: VPlan 'Initial VPlan for VF={1},UF>=1' {
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; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.ph:
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; CHECK-NEXT: Successor(s): vector loop
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> vector loop: {
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; CHECK-NEXT: vector.body:
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; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
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; CHECK-NEXT: vp<[[IV_STEPS:%.]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<%start>, ir<1>
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; CHECK-NEXT: CLONE ir<%min> = call vp<[[IV_STEPS]]>, ir<65535>, ir<@llvm.smin.i32>
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; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%dst>, vp<[[IV_STEPS]]>
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; CHECK-NEXT: CLONE store ir<%min>, ir<%arrayidx>
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; CHECK-NEXT: EMIT vp<[[INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
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; CHECK-NEXT: EMIT branch-on-count vp<[[INC]]> vp<[[VEC_TC]]>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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;
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define void @test(i32 %start, ptr %dst) {
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; CHECK-LABEL: @test(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 %start, [[INDEX]]
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; CHECK-NEXT: [[INDUCTION:%.*]] = add i32 [[OFFSET_IDX]], 0
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; CHECK-NEXT: [[INDUCTION1:%.*]] = add i32 [[OFFSET_IDX]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.smin.i32(i32 [[INDUCTION]], i32 65535)
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; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @llvm.smin.i32(i32 [[INDUCTION1]], i32 65535)
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i32 [[INDUCTION]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[INDUCTION1]]
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; CHECK-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 8
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; CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP4]], align 8
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], %n.vec
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; CHECK-NEXT: br i1 [[TMP5]], label %middle.block, label %vector.body
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; CHECK: middle.block:
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
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%min = tail call i32 @llvm.smin.i32(i32 %iv, i32 65535)
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%arrayidx = getelementptr inbounds i32 , ptr %dst, i32 %iv
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store i32 %min, ptr %arrayidx, align 8
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%iv.next = add nsw i32 %iv, 1
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%tobool.not = icmp eq i32 %iv.next, 1000
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br i1 %tobool.not, label %exit, label %loop
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exit:
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ret void
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}
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declare i32 @llvm.smin.i32(i32, i32)
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