Nitin John Raj d64d3c5a8f [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility ...

SLLI and ADD are more compressible than SLLIW and ADDW. SLLI/ADD both have a 5-bit register encoding. SLLIW/ADDW have a 3-bit register encoding. They both require the dest to also be one of the sources.

We aggressively form ADDW/SLLIW as it helps hasAllWBitUsers in RISCVISelDAGToDAG to not require recursion. So we need a pass to remove excessive -w suffixes.

Differential Revision: https://reviews.llvm.org/D139948

2022-12-22 14:19:26 -08:00

13 KiB

Raw Blame History

View Raw