abaa53199e
This optimization helps reduce repeated calculations of base addresses by extracting type extensions when the same base address is accessed multiple times but its offset is a constant.
96 lines
3.8 KiB
LLVM
96 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -passes='require<profile-summary>,function(codegenprepare)' < %s -S | FileCheck %s
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target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "riscv64"
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%struct.match_state = type { i64, i64 }
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; %add is also promoted by forking an extra sext.
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define void @promoteTwoOne(i32 %i, i32 %j, ptr %P1, ptr %P2 ) {
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; CHECK-LABEL: define void @promoteTwoOne(
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; CHECK-SAME: i32 [[I:%.*]], i32 [[J:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[S2:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i32 [[J]] to i64
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; CHECK-NEXT: [[S:%.*]] = add nsw i64 [[S2]], [[PROMOTED2]]
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; CHECK-NEXT: [[ADDR1:%.*]] = getelementptr inbounds i64, ptr [[P1]], i64 [[S]]
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; CHECK-NEXT: store i64 [[S]], ptr [[ADDR1]], align 8
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; CHECK-NEXT: [[ADDR2:%.*]] = getelementptr inbounds i64, ptr [[P2]], i64 [[S2]]
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; CHECK-NEXT: store i64 [[S2]], ptr [[ADDR2]], align 8
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; CHECK-NEXT: ret void
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;
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entry:
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%add = add nsw i32 %i, %j
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%s = sext i32 %add to i64
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%addr1 = getelementptr inbounds i64, ptr %P1, i64 %s
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store i64 %s, ptr %addr1
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%s2 = sext i32 %i to i64
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%addr2 = getelementptr inbounds i64, ptr %P2, i64 %s2
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store i64 %s2, ptr %addr2
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ret void
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}
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; Both %add1 and %add2 are promoted by forking extra sexts.
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define void @promoteTwoTwo(i32 %i, i32 %j, i32 %k, ptr %P1, ptr %P2) {
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; CHECK-LABEL: define void @promoteTwoTwo(
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; CHECK-SAME: i32 [[I:%.*]], i32 [[J:%.*]], i32 [[K:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[PROMOTED3:%.*]] = sext i32 [[J]] to i64
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; CHECK-NEXT: [[PROMOTED4:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[S:%.*]] = add nsw i64 [[PROMOTED3]], [[PROMOTED4]]
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; CHECK-NEXT: [[ADDR1:%.*]] = getelementptr inbounds i64, ptr [[P1]], i64 [[S]]
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; CHECK-NEXT: store i64 [[S]], ptr [[ADDR1]], align 8
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; CHECK-NEXT: [[PROMOTED2:%.*]] = sext i32 [[K]] to i64
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; CHECK-NEXT: [[S2:%.*]] = add nsw i64 [[PROMOTED3]], [[PROMOTED2]]
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; CHECK-NEXT: [[ADDR2:%.*]] = getelementptr inbounds i64, ptr [[P2]], i64 [[S2]]
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; CHECK-NEXT: store i64 [[S2]], ptr [[ADDR2]], align 8
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; CHECK-NEXT: ret void
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;
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entry:
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%add1 = add nsw i32 %j, %i
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%s = sext i32 %add1 to i64
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%addr1 = getelementptr inbounds i64, ptr %P1, i64 %s
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store i64 %s, ptr %addr1
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%add2 = add nsw i32 %j, %k
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%s2 = sext i32 %add2 to i64
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%addr2 = getelementptr inbounds i64, ptr %P2, i64 %s2
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store i64 %s2, ptr %addr2
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ret void
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}
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define i64 @promoteGEPSunk(i1 %cond, ptr %base, i32 %i) {
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; CHECK-LABEL: define i64 @promoteGEPSunk(
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; CHECK-SAME: i1 [[COND:%.*]], ptr [[BASE:%.*]], i32 [[I:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[PROMOTED1:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[S:%.*]] = add nsw i64 [[PROMOTED1]], 1
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; CHECK-NEXT: [[ADDR:%.*]] = getelementptr inbounds i64, ptr [[BASE]], i64 [[S]]
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; CHECK-NEXT: [[S2:%.*]] = add nsw i64 [[PROMOTED1]], 2
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; CHECK-NEXT: [[ADDR2:%.*]] = getelementptr inbounds i64, ptr [[BASE]], i64 [[S2]]
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; CHECK-NEXT: br i1 [[COND]], label [[IF_THEN:%.*]], label [[IF_THEN2:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[V:%.*]] = load i64, ptr [[ADDR]], align 8
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; CHECK-NEXT: [[V2:%.*]] = load i64, ptr [[ADDR2]], align 8
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; CHECK-NEXT: [[R:%.*]] = add i64 [[V]], [[V2]]
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; CHECK-NEXT: ret i64 [[R]]
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; CHECK: if.then2:
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; CHECK-NEXT: ret i64 0
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;
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entry:
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%add = add nsw i32 %i, 1
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%s = sext i32 %add to i64
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%addr = getelementptr inbounds i64, ptr %base, i64 %s
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%add2 = add nsw i32 %i, 2
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%s2 = sext i32 %add2 to i64
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%addr2 = getelementptr inbounds i64, ptr %base, i64 %s2
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br i1 %cond, label %if.then, label %if.then2
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if.then:
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%v = load i64, ptr %addr
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%v2 = load i64, ptr %addr2
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%r = add i64 %v, %v2
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ret i64 %r
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if.then2:
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ret i64 0;
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}
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