8b3cc4d1ed
As a precaution until the issues reported (by me) in https://github.com/llvm/llvm-project/issues/135208 are investigated.
339 lines
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339 lines
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Markdown
<!-- This document is written in Markdown and uses extra directives provided by
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MyST (https://myst-parser.readthedocs.io/en/latest/). -->
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LLVM {{env.config.release}} Release Notes
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=========================================
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```{contents}
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```
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````{only} PreRelease
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```{warning} These are in-progress notes for the upcoming LLVM {{env.config.release}}
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release. Release notes for previous releases can be found on
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[the Download Page](https://releases.llvm.org/download.html).
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```
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````
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Introduction
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============
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This document contains the release notes for the LLVM Compiler Infrastructure,
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release {{env.config.release}}. Here we describe the status of LLVM, including
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major improvements from the previous release, improvements in various subprojects
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of LLVM, and some of the current users of the code. All LLVM releases may be
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downloaded from the [LLVM releases web site](https://llvm.org/releases/).
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For more information about LLVM, including information about the latest
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release, please check out the [main LLVM web site](https://llvm.org/). If you
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have questions or comments, the [Discourse forums](https://discourse.llvm.org)
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is a good place to ask them.
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Note that if you are reading this file from a Git checkout or the main
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LLVM web page, this document applies to the *next* release, not the current
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one. To see the release notes for a specific release, please see the
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[releases page](https://llvm.org/releases/).
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Non-comprehensive list of changes in this release
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=================================================
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<!-- For small 1-3 sentence descriptions, just add an entry at the end of
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this list. If your description won't fit comfortably in one bullet
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point (e.g. maybe you would like to give an example of the
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functionality, or simply have a lot to talk about), see the comment below
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for adding a new subsection. -->
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* ...
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<!-- If you would like to document a larger change, then you can add a
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subsection about it right here. You can copy the following boilerplate:
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Special New Feature
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-------------------
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Makes programs 10x faster by doing Special New Thing.
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-->
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Changes to the LLVM IR
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----------------------
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* It is no longer permitted to inspect the uses of ConstantData. Use
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count APIs will behave as if they have no uses (i.e. use_empty() is
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always true).
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* The `nocapture` attribute has been replaced by `captures(none)`.
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* The constant expression variants of the following instructions have been
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removed:
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* `mul`
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* Updated semantics of `llvm.type.checked.load.relative` to match that of
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`llvm.load.relative`.
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* Inline asm calls no longer accept ``label`` arguments. Use ``callbr`` instead.
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* Updated semantics of the `callbr` instruction to clarify that its
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'indirect labels' are not expected to be reached by indirect (as in
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register-controlled) branch instructions, and therefore are not
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guaranteed to start with a `bti` or `endbr64` instruction, where
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those exist.
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Changes to LLVM infrastructure
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------------------------------
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* Removed support for target intrinsics being defined in the target directories
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themselves (i.e., the `TargetIntrinsicInfo` class).
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* Fix Microsoft demangling of string literals to be stricter
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(#GH129970))
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* Added the support for ``fmaximum`` and ``fminimum`` in ``atomicrmw`` instruction. The
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comparison is expected to match the behavior of ``llvm.maximum.*`` and
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``llvm.minimum.*`` respectively.
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Changes to building LLVM
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------------------------
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Changes to TableGen
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-------------------
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Changes to Interprocedural Optimizations
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----------------------------------------
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Changes to the AArch64 Backend
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------------------------------
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* Added the `execute-only` target feature, which indicates that the generated
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program code doesn't contain any inline data, and there are no data accesses
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to code sections. On ELF targets this property is indicated by the
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`SHF_AARCH64_PURECODE` section flag.
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([#125687](https://github.com/llvm/llvm-project/pull/125687),
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[#132196](https://github.com/llvm/llvm-project/pull/132196),
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[#133084](https://github.com/llvm/llvm-project/pull/133084))
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Changes to the AMDGPU Backend
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-----------------------------
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* Enabled the
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[FWD_PROGRESS bit](https://llvm.org/docs/AMDGPUUsage.html#code-object-v3-kernel-descriptor)
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for all GFX ISAs greater or equal to 10, for the AMDHSA OS.
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* Bump the default `.amdhsa_code_object_version` to 6. ROCm 6.3 is required to run any program compiled with COV6.
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* Add a new `amdgcn.load.to.lds` intrinsic that wraps the existing global.load.lds
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intrinsic and has the same semantics. This intrinsic allows using buffer fat pointers
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(`ptr addrspace(7)`) as arguments, allowing loads to LDS from these pointers to be
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represented in the IR without needing to use buffer resource intrinsics directly.
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This intrinsic is exposed to Clang as `__builtin_amdgcn_load_to_lds`, though
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buffer fat pointers are not yet enabled in Clang. Migration to this intrinsic is
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optional, and there are no plans to deprecate `amdgcn.global.load.lds`.
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Changes to the ARM Backend
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--------------------------
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Changes to the AVR Backend
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--------------------------
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Changes to the DirectX Backend
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------------------------------
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Changes to the Hexagon Backend
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------------------------------
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* The default Hexagon architecture version in ELF object files produced by
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the tools such as llvm-mc is changed to v68. This version will be set if
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the user does not provide the CPU version in the command line.
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Changes to the LoongArch Backend
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--------------------------------
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* Changing the default code model from `small` to `medium` for 64-bit.
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* Added inline asm support for the `q` constraint.
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Changes to the MIPS Backend
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---------------------------
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* `-mcpu=i6400` and `-mcpu=i6500` were added.
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Changes to the PowerPC Backend
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------------------------------
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Changes to the RISC-V Backend
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-----------------------------
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* Adds experimental assembler support for the Qualcomm uC 'Xqcilb` (Long Branch)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcili` (Load Large Immediate)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcilia` (Large Immediate Arithmetic)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcibm` (Bit Manipulation)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcibi` (Branch Immediate)
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extension.
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* Adds experimental assembler and code generation support for the Qualcomm
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'Xqccmp' extension, which is a frame-pointer convention compatible version of
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Zcmp.
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* Added non-quadratic ``log-vrgather`` cost model for ``vrgather.vv`` instruction
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* Adds experimental assembler support for the Qualcomm uC 'Xqcisim` (Simulation Hint)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcisync` (Sync Delay)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqciio` (External Input Output)
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extension.
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* Adds assembler support for the 'Zilsd` (Load/Store Pair Instructions)
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extension.
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* Adds assembler support for the 'Zclsd` (Compressed Load/Store Pair Instructions)
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extension.
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* Adds experimental assembler support for Zvqdotq.
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* Adds Support for Qualcomm's `qci-nest` and `qci-nonest` interrupt types, which
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use instructions from `Xqciint` to save and restore some GPRs during interrupt
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handlers.
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* When the experimental extension `Xqcili` is enabled, `qc.e.li` and `qc.li` may
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now be used to materialize immediates.
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* Adds assembler support for ``.option exact``, which disables automatic compression,
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and branch and linker relaxation. This can be disabled with ``.option noexact``,
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which is also the default.
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* `-mcpu=xiangshan-kunminghu` was added.
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* `-mcpu=andes-n45` and `-mcpu=andes-nx45` were added.
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* `-mcpu=andes-a45` and `-mcpu=andes-ax45` were added.
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* Adds support for the 'Ziccamoc` (Main Memory Supports Atomics in Zacas) extension, which was introduced as an optional extension of the RISC-V Profiles specification.
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* Adds experimental assembler support for SiFive CLIC CSRs, under the names
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`Zsfmclic` for the M-mode registers and `Zsfsclic` for the S-mode registers.
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* Adds Support for SiFive CLIC interrupt attributes, which automate writing CLIC
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interrupt handlers without using inline assembly.
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* Adds assembler support for the Andes `XAndesperf` (Andes Performance extension).
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* `-mcpu=sifive-p870` was added.
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* Adds assembler support for the Andes `XAndesvpackfph` (Andes Vector Packed FP16 extension).
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* Adds assembler support for the Andes `XAndesvdot` (Andes Vector Dot Product extension).
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* Adds assembler support for the standard `Q` (Quad-Precision Floating Point)
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extension.
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* Adds experimental assembler support for the SiFive Xsfmm* Attached Matrix
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Extensions.
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* `-mcpu=andes-a25` and `-mcpu=andes-ax25` were added.
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* The `Shlcofideleg` extension was added.
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* `-mcpu=sifive-x390` was added.
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* `-mtune=andes-45-series` was added.
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* Adds assembler support for the Andes `XAndesvbfhcvt` (Andes Vector BFLOAT16 Conversion extension).
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* `-mcpu=andes-ax45mpv` was added.
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* Removed -mattr=+no-rvc-hints that could be used to disable parsing and generation of RVC hints.
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Changes to the WebAssembly Backend
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----------------------------------
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Changes to the Windows Target
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-----------------------------
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* `fp128` is now passed indirectly, meaning it uses the same calling convention
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as `i128`.
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Changes to the X86 Backend
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--------------------------
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* `fp128` will now use `*f128` libcalls on 32-bit GNU targets as well.
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Changes to the OCaml bindings
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-----------------------------
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Changes to the Python bindings
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------------------------------
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Changes to the C API
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--------------------
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* The following functions for creating constant expressions have been removed,
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because the underlying constant expressions are no longer supported. Instead,
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an instruction should be created using the `LLVMBuildXYZ` APIs, which will
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constant fold the operands if possible and create an instruction otherwise:
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* `LLVMConstMul`
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* `LLVMConstNUWMul`
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* `LLVMConstNSWMul`
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* Added `LLVMConstDataArray` and `LLVMGetRawDataValues` to allow creating and
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reading `ConstantDataArray` values without needing extra `LLVMValueRef`s for
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individual elements.
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* Added ``LLVMDIBuilderCreateEnumeratorOfArbitraryPrecision`` for creating
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debugging metadata of enumerators larger than 64 bits.
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* Added ``LLVMGetICmpSameSign`` and ``LLVMSetICmpSameSign`` for the `samesign`
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flag on `icmp` instructions.
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Changes to the CodeGen infrastructure
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-------------------------------------
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Changes to the Metadata Info
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---------------------------------
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Changes to the Debug Info
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---------------------------------
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Changes to the LLVM tools
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---------------------------------
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* llvm-objcopy now supports the `--update-section` flag for intermediate Mach-O object files.
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* llvm-strip now supports continuing to process files on encountering an error.
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* In llvm-objcopy/llvm-strip's ELF port, `--discard-locals` and `--discard-all` now allow and preserve symbols referenced by relocations.
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([#47468](https://github.com/llvm/llvm-project/issues/47468))
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* llvm-addr2line now supports a `+` prefix when specifying an address.
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Changes to LLDB
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---------------------------------
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* When building LLDB with Python support, the minimum version of Python is now
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3.8.
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* LLDB now supports hardware watchpoints for AArch64 Windows targets. Windows
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does not provide API to query the number of supported hardware watchpoints.
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Therefore current implementation allows only 1 watchpoint, as tested with
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Windows 11 on the Microsoft SQ2 and Snapdragon Elite X platforms.
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* LLDB now steps through C++ thunks. This fixes an issue where previously, it
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wouldn't step into multiple inheritance virtual functions.
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* A statusline was added to command-line LLDB to show progress events and
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information about the current state of the debugger at the bottom of the
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terminal. This is on by default and can be configured using the
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`show-statusline` and `statusline-format` settings. It is not currently
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supported on Windows.
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* The `min-gdbserver-port` and `max-gdbserver-port` options have been removed
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from `lldb-server`'s platform mode. Since the changes to `lldb-server`'s port
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handling in LLDB 20, these options have had no effect.
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* LLDB now supports `process continue --reverse` when used with debug servers
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supporting reverse execution, such as [rr](https://rr-project.org).
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When using reverse execution, `process continue --forward` returns to the
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forward execution.
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* LLDB now supports RISC-V 32-bit ELF core files.
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* LLDB now supports siginfo descriptions for Linux user-space signals. User space
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signals will now have descriptions describing the method and sender.
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```
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stop reason = SIGSEGV: sent by tkill system call (sender pid=649752, uid=2667987)
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```
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* ELF Cores can now have their siginfo structures inspected using `thread siginfo`.
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### Changes to lldb-dap
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* Breakpoints can now be set for specific columns within a line.
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* Function return value is now displayed on step-out.
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Changes to BOLT
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---------------------------------
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Changes to Sanitizers
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---------------------
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Other Changes
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-------------
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External Open Source Projects Using LLVM {{env.config.release}}
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===============================================================
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* A project...
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Additional Information
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======================
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A wide variety of additional information is available on the
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[LLVM web page](https://llvm.org/), in particular in the
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[documentation](https://llvm.org/docs/) section. The web page also contains
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versions of the API documentation which is up-to-date with the Git version of
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the source code. You can access versions of these documents specific to this
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release by going into the `llvm/docs/` directory in the LLVM tree.
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If you have any questions or comments about LLVM, please feel free to contact
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us via the [Discourse forums](https://discourse.llvm.org).
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