cc53b953ac
In preparation for implementing hardening of BLRA* instructions, restrict thunk function generation to only the thunks being actually called from any function. As described in the existing comments, emitting all possible thunks for BLRAA and BLRAB instructions would mean adding about 1800 functions in total, most of which are likely not to be called. This commit merges AArch64SLSHardening class into SLSBLRThunkInserter, so thunks can be created as needed while rewriting a machine function. The usages of TII, TRI and ST fields of AArch64SLSHardening class are replaced with requesting them in-place, as ThunkInserter assumes multiple "entry points" in contrast to the only runOnMachineFunction method of AArch64SLSHardening. The runOnMachineFunction method essentially replaces pre-existing insertThunks implementation as there is no more need to insert all possible thunks unconditionally. Instead, thunks are created on first use from inside of insertThunks method.
60 lines
2.4 KiB
YAML
60 lines
2.4 KiB
YAML
# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \
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# RUN: -start-before aarch64-sls-hardening \
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# RUN: -stop-after aarch64-sls-hardening -o - %s \
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# RUN: | FileCheck %s --check-prefixes=CHECK \
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# RUN: --implicit-check-not=__llvm_slsblr_thunk_x7
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# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \
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# RUN: -start-before aarch64-sls-hardening \
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# RUN: -asm-verbose=0 -o - %s \
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# RUN: | FileCheck %s --check-prefixes=ASM \
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# RUN: --implicit-check-not=__llvm_slsblr_thunk_x7
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# Check that the BLR SLS hardening transforms a BLR into a BL with operands as
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# expected.
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--- |
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@a = dso_local local_unnamed_addr global i32 (...)* null, align 8
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@b = dso_local local_unnamed_addr global i32 0, align 4
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define dso_local void @fn1() local_unnamed_addr "target-features"="+harden-sls-blr" {
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entry:
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%0 = load i32 ()*, i32 ()** bitcast (i32 (...)** @a to i32 ()**), align 8
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%call = tail call i32 %0() nounwind
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store i32 %call, i32* @b, align 4
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ret void
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}
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...
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---
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name: fn1
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: fn1
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bb.0.entry:
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liveins: $lr
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early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 ; :: (store (s64) into %stack.0)
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frame-setup CFI_INSTRUCTION def_cfa_offset 16
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frame-setup CFI_INSTRUCTION offset $w30, -16
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renamable $x8 = ADRP target-flags(aarch64-page) @a
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renamable $x8 = LDRXui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @a :: (dereferenceable load (s64) from `i32 ()** bitcast (i32 (...)** @a to i32 ()**)`)
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BLRNoIP killed renamable $x8, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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; CHECK: BL <mcsymbol __llvm_slsblr_thunk_x8>, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $w0, implicit killed $x8
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renamable $x8 = ADRP target-flags(aarch64-page) @b
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STRWui killed renamable $w0, killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) @b :: (store (s32) into @b)
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early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 ; :: (load (s64) from %stack.0)
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RET undef $lr
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...
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# CHECK: name: __llvm_slsblr_thunk_x8
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#
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# CHECK: $x16 = ORRXrs $xzr, $x8, 0
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# CHECK-NEXT: BR $x16
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# CHECK-NEXT: SpeculationBarrierISBDSBEndBB
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# ASM-LABEL: __llvm_slsblr_thunk_x8:
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# ASM-NEXT: mov x16, x8
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# ASM-NEXT: br x16
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# ASM-NEXT: dsb sy
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# ASM-NEXT: isb
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