The combineSIGN_EXTEND_INREG routine was using DAG.getConstant(-1, DL, VT), which does not result in the expected value when VT has more than 64 bits. Fix this by using DAG.getAllOnesConstant(DL, VT) instead. Also add test cases for v1i128 comparisons (which triggers the bug).
12 KiB
12 KiB