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clang-p2996/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
Ming-Yi Lai 691ca556e0 [RISCV] Emit .note.gnu.property section when Zicfiss-based shadow stack is enabled (#127036)
RISC-V Zicfiss-based shadow stack needs to let the linker/loader know if
the binary is built with the mechanism enabled to support proper
link-time/load-time management of this feature. The information is
encoded as a bit in the `.note.gnu.property` section. This patch
implements emitting the section for RISC-V targets when Zicfiss-based
shadow stack is enabled.

When Clang receives the `-fcf-protection=return` flag, it adds the
`hw-shadow-stack` attribute to LLVM functions, and adds a non-zero
valued attribute named `cf-protection-return` to the LLVM module it
generates. The backend depends on the `hw-shadow-stack` attributes to
generate Zicfiss-based shadow stack instructions for each function, but
at the module scope, the `cf-protection-return` attribute is a better
indication of whether the translation unit is built with Zicfiss-based
shadow stack enabled, so this patch emits the `.note.gnu.property`
section with the "Zicfiss-based shadow stack" bit toggled on when it
sees the `cf-protection-return` attribute.
2025-05-14 11:48:59 +08:00

32 lines
1.1 KiB
LLVM

; RUN: llc --mtriple=riscv32 --filetype=obj -o - %s | llvm-readelf -n - | FileCheck --check-prefixes=READELF %s
; RUN: llc --mtriple=riscv64 --filetype=obj -o - %s | llvm-readelf -n - | FileCheck --check-prefixes=READELF %s
; RUN: llc --mtriple=riscv32 -o - %s | FileCheck --check-prefixes=ASM,ASM32 %s
; RUN: llc --mtriple=riscv64 -o - %s | FileCheck --check-prefixes=ASM,ASM64 %s
; READELF: Properties: RISC-V feature: ZICFISS
; ASM: .section ".note.GNU-stack","",@progbits
; ASM-NEXT: .section .note.gnu.property,"a",@note
; ASM-NEXT: .word 4
; ASM-NEXT: .word .Ltmp1-.Ltmp0
; ASM-NEXT: .word 5
; ASM-NEXT: .asciz "GNU"
; ASM-NEXT: .Ltmp0:
; ASM32-NEXT: .p2align 2, 0x0
; ASM64-NEXT: .p2align 3, 0x0
; ASM-NEXT: .word 3221225472
; ASM-NEXT: .word 4
; ASM-NEXT: .word 2
; ASM32-NEXT: .p2align 2, 0x0
; ASM64-NEXT: .p2align 3, 0x0
; ASM-NEXT: .Ltmp1:
define i32 @f() "hw-shadow-stack" {
entry:
ret i32 0
}
!llvm.module.flags = !{!0}
!0 = !{i32 8, !"cf-protection-return", i32 1}