eecaeb6f10
The change implements intrinsics 'get_fpenv', 'set_fpenv' and 'reset_fpenv'. They are used to read floating-point environment, set it or reset to some default state. They do the same actions as C library functions 'fegetenv' and 'fesetenv'. By default these intrinsics are lowered to calls to these functions. The new intrinsics specify FP environment as a value of integer type, it is convenient of most targets where the FP state is a content of some register. Some targets however use long representations. On X86 the size of FP environment is 256 bits, and even half of this size is not a legal ibteger type. To facilitate legalization in such cases, two sets of DAG nodes is used. Nodes GET_FPENV and SET_FPENV are used when FP environment may be represented by a legal integer type. Nodes GET_FPENV_MEM and SET_FPENV_MEM consider FP environment as a region in memory, much like `fesetenv` and `fegetenv` do. They are used when target has long representation for floationg-point state. Differential Revision: https://reviews.llvm.org/D71742
120 lines
3.0 KiB
LLVM
120 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm-eabi -float-abi=soft -mattr=+vfp2 %s -o - | FileCheck %s
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define void @func_02(i32 %rm) {
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; CHECK-LABEL: func_02:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: vmrs r1, fpscr
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; CHECK-NEXT: sub r0, r0, #1
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; CHECK-NEXT: and r0, r0, #3
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; CHECK-NEXT: bic r1, r1, #12582912
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; CHECK-NEXT: orr r0, r1, r0, lsl #22
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; CHECK-NEXT: vmsr fpscr, r0
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; CHECK-NEXT: mov pc, lr
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call void @llvm.set.rounding(i32 %rm)
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ret void
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}
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define void @func_03() {
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; CHECK-LABEL: func_03:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: vmrs r0, fpscr
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; CHECK-NEXT: orr r0, r0, #12582912
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; CHECK-NEXT: vmsr fpscr, r0
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; CHECK-NEXT: mov pc, lr
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call void @llvm.set.rounding(i32 0)
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ret void
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}
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define void @func_04() {
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; CHECK-LABEL: func_04:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: vmrs r0, fpscr
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; CHECK-NEXT: bic r0, r0, #12582912
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; CHECK-NEXT: vmsr fpscr, r0
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; CHECK-NEXT: mov pc, lr
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call void @llvm.set.rounding(i32 1)
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ret void
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}
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define void @func_05() {
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; CHECK-LABEL: func_05:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: vmrs r0, fpscr
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; CHECK-NEXT: bic r0, r0, #12582912
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; CHECK-NEXT: orr r0, r0, #4194304
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; CHECK-NEXT: vmsr fpscr, r0
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; CHECK-NEXT: mov pc, lr
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call void @llvm.set.rounding(i32 2)
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ret void
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}
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define void @func_06() {
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; CHECK-LABEL: func_06:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: vmrs r0, fpscr
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; CHECK-NEXT: bic r0, r0, #12582912
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; CHECK-NEXT: orr r0, r0, #8388608
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; CHECK-NEXT: vmsr fpscr, r0
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; CHECK-NEXT: mov pc, lr
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call void @llvm.set.rounding(i32 3)
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ret void
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}
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define i32 @get_fpenv_01() #0 {
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; CHECK-LABEL: get_fpenv_01:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r11, lr}
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: .pad #8
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; CHECK-NEXT: sub sp, sp, #8
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; CHECK-NEXT: add r0, sp, #4
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; CHECK-NEXT: bl fegetenv
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; CHECK-NEXT: ldr r0, [sp, #4]
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; CHECK-NEXT: add sp, sp, #8
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; CHECK-NEXT: pop {r11, lr}
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; CHECK-NEXT: mov pc, lr
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entry:
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%fpenv = call i32 @llvm.get.fpenv.i32()
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ret i32 %fpenv
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}
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define void @set_fpenv_01(i32 %fpenv) #0 {
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; CHECK-LABEL: set_fpenv_01:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r11, lr}
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: .pad #8
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; CHECK-NEXT: sub sp, sp, #8
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; CHECK-NEXT: str r0, [sp, #4]
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; CHECK-NEXT: add r0, sp, #4
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; CHECK-NEXT: bl fesetenv
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; CHECK-NEXT: add sp, sp, #8
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; CHECK-NEXT: pop {r11, lr}
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; CHECK-NEXT: mov pc, lr
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entry:
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call void @llvm.set.fpenv.i32(i32 %fpenv)
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ret void
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}
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define void @reset_fpenv_01() #0 {
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; CHECK-LABEL: reset_fpenv_01:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r11, lr}
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; CHECK-NEXT: push {r11, lr}
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; CHECK-NEXT: mvn r0, #0
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; CHECK-NEXT: bl fesetenv
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; CHECK-NEXT: pop {r11, lr}
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; CHECK-NEXT: mov pc, lr
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entry:
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call void @llvm.reset.fpenv()
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ret void
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}
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attributes #0 = { nounwind "use-soft-float"="true" }
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declare void @llvm.set.rounding(i32)
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declare i32 @llvm.get.fpenv.i32()
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declare void @llvm.set.fpenv.i32(i32 %fpenv)
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declare void @llvm.reset.fpenv()
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