cc4703745f
Not all AMDGPU targets support all atomic operations. For example, there are not atomic floating-point adds on the gfx10 series. Add a pass to emulate these operations using a compare-and-swap loop, by analogy to the generic atomicrmw rewrite in MemrefToLLVM. This pass is named generally, as in the future we may have a memref-to-amdgpu that translates constructs like atomicrmw fmax (which doesn't generally exist in LLVM) to the relevant intrinsics, which may themselves require emulation. Since the AMDGPU dialect now has a pass that operates on it, the dialect's directory structure is reorganized to match other similarly complex dialects. The pass should be run before amdgpu-to-rocdl if desired. This commit also adds f64 support to atomic_fmax. Depends on D148722 Reviewed By: nirvedhmeshram Differential Revision: https://reviews.llvm.org/D148724
29 lines
934 B
C++
29 lines
934 B
C++
//===- Chipset.cpp - AMDGPU Chipset version struct parsing -----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/AMDGPU/Utils/Chipset.h"
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#include "mlir/Support/LLVM.h"
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#include "llvm/ADT/StringRef.h"
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using namespace mlir;
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using namespace mlir::amdgpu;
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FailureOr<Chipset> Chipset::parse(StringRef name) {
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if (!name.startswith("gfx"))
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return failure();
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unsigned major = 0;
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unsigned minor = 0;
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StringRef majorRef = name.drop_front(3).drop_back(2);
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StringRef minorRef = name.take_back(2);
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if (majorRef.getAsInteger(10, major))
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return failure();
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if (minorRef.getAsInteger(16, minor))
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return failure();
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return Chipset(major, minor);
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}
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