7ce4e933ea
We add the MemOperand then backend will generate NTLH automatically. ``` __builtin_prefetch(ptr, 0 /* rw==read */, 0 /* locality */); => ntl.all + prefetch.r (ptr) __builtin_prefetch(ptr, 0 /* rw==read */, 1 /* locality */); => ntl.pall + prefetch.r (ptr) __builtin_prefetch(ptr, 0 /* rw==read */, 2 /* locality */); => ntl.p1 + prefetch.r (ptr) __builtin_prefetch(ptr, 0 /* rw==read */, 3 /* locality */); => prefetch.r (ptr) ``` Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D154691
348 lines
10 KiB
LLVM
348 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64I %s
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; RUN: llc -mtriple=riscv32 -mattr=+zicbop -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32ZICBOP %s
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; RUN: llc -mtriple=riscv64 -mattr=zicbop -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64ZICBOP %s
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; RUN: llc -mtriple=riscv64 -mattr=+zicbop,+experimental-zihintntl -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV64ZICBOPZIHINTNTL %s
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declare void @llvm.prefetch(ptr, i32, i32, i32)
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define void @test_prefetch_read_locality_0(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_read_locality_0:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_read_locality_0:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_read_locality_0:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.r 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_read_locality_0:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.r 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_0:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.all
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 0, i32 1)
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ret void
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}
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define void @test_prefetch_write_locality_0(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_write_locality_0:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_write_locality_0:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_write_locality_0:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.w 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_write_locality_0:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.w 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_0:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.all
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 1, i32 0, i32 1)
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ret void
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}
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define void @test_prefetch_instruction_locality_0(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_instruction_locality_0:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_instruction_locality_0:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_0:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.i 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_0:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.i 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_0:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.all
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 0, i32 0)
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ret void
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}
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define void @test_prefetch_read_locality_1(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_read_locality_1:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_read_locality_1:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_read_locality_1:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.r 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_read_locality_1:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.r 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_1:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.pall
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 1, i32 1)
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ret void
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}
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define void @test_prefetch_write_locality_1(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_write_locality_1:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_write_locality_1:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_write_locality_1:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.w 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_write_locality_1:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.w 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_1:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.pall
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 1, i32 1, i32 1)
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ret void
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}
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define void @test_prefetch_instruction_locality_1(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_instruction_locality_1:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_instruction_locality_1:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_1:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.i 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_1:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.i 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_1:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.pall
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 1, i32 0)
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ret void
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}
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define void @test_prefetch_read_locality_2(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_read_locality_2:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_read_locality_2:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_read_locality_2:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.r 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_read_locality_2:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.r 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_2:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.p1
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 2, i32 1)
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ret void
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}
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define void @test_prefetch_write_locality_2(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_write_locality_2:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_write_locality_2:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_write_locality_2:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.w 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_write_locality_2:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.w 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_2:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.p1
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 1, i32 2, i32 1)
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ret void
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}
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define void @test_prefetch_instruction_locality_2(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_instruction_locality_2:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_instruction_locality_2:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_2:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.i 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_2:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.i 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_2:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: ntl.p1
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 2, i32 0)
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ret void
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}
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define void @test_prefetch_read_locality_3(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_read_locality_3:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_read_locality_3:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_read_locality_3:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.r 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_read_locality_3:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.r 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_3:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 3, i32 1)
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ret void
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}
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define void @test_prefetch_write_locality_3(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_write_locality_3:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_write_locality_3:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_write_locality_3:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.w 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_write_locality_3:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.w 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_3:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 1, i32 3, i32 1)
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ret void
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}
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define void @test_prefetch_instruction_locality_3(ptr %a) nounwind {
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; RV32I-LABEL: test_prefetch_instruction_locality_3:
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; RV32I: # %bb.0:
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: test_prefetch_instruction_locality_3:
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; RV64I: # %bb.0:
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; RV64I-NEXT: ret
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;
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; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_3:
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; RV32ZICBOP: # %bb.0:
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; RV32ZICBOP-NEXT: prefetch.i 0(a0)
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; RV32ZICBOP-NEXT: ret
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;
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; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_3:
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; RV64ZICBOP: # %bb.0:
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; RV64ZICBOP-NEXT: prefetch.i 0(a0)
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; RV64ZICBOP-NEXT: ret
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;
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; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_3:
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; RV64ZICBOPZIHINTNTL: # %bb.0:
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; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
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; RV64ZICBOPZIHINTNTL-NEXT: ret
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call void @llvm.prefetch(ptr %a, i32 0, i32 3, i32 0)
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ret void
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}
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