Sjoerd Meijer 815dd4b292 [AArch64] Add Cortex CPU subtarget features for instruction fusion. ...

This adds subtarget features for AES, literal, and compare and branch
instruction fusion for different Cortex CPUs.

Patch by: Cassie Jones.

Differential Revision: https://reviews.llvm.org/D94457

2021-01-25 09:11:29 +00:00

12 KiB

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