Files
clang-p2996/llvm/test/CodeGen/PowerPC/prolog_vec_spills.mir
Fangrui Song 98797a5fc0 [PrologEpilogInserter][test] Improve SpilledToReg test
D39386 made CalleeSavedInfo possible to spill a register to another register
(vector register for POWER9) but did not actually test live-in.
2020-10-17 20:36:22 -07:00

1.8 KiB