623 lines
18 KiB
LLVM
623 lines
18 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=xtensa -mattr=+fp -verify-machineinstrs < %s | FileCheck -check-prefix=XTENSA %s
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define float @fadd_s(float %a, float %b) nounwind {
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; XTENSA-LABEL: fadd_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: add.s f8, f9, f8
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%res = fadd float %a, %b
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ret float %res
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}
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define float @fsub_s(float %a, float %b) nounwind {
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; XTENSA-LABEL: fsub_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: sub.s f8, f9, f8
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%res = fsub float %a, %b
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ret float %res
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}
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define float @fmul_s(float %a, float %b) nounwind {
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; XTENSA-LABEL: fmul_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: mul.s f8, f9, f8
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%res = fmul float %a, %b
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ret float %res
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}
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define float @fdiv_s(float %a, float %b) nounwind {
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; XTENSA-LABEL: fdiv_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: addi a8, a1, -16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
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; XTENSA-NEXT: l32r a8, .LCPI3_0
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; XTENSA-NEXT: callx0 a8
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; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
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; XTENSA-NEXT: addi a8, a1, 16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: ret
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%res = fdiv float %a, %b
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ret float %res
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}
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declare float @llvm.sqrt.f32(float)
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define float @fsqrt_s(float %a) nounwind {
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; XTENSA-LABEL: fsqrt_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: addi a8, a1, -16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
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; XTENSA-NEXT: l32r a8, .LCPI4_0
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; XTENSA-NEXT: callx0 a8
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; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
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; XTENSA-NEXT: addi a8, a1, 16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: ret
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%res = call float @llvm.sqrt.f32(float %a)
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ret float %res
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}
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declare float @llvm.fabs.f32(float)
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define float @fabs_s(float %a, float %b) nounwind {
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; XTENSA-LABEL: fabs_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: add.s f8, f9, f8
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; XTENSA-NEXT: abs.s f9, f8
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; XTENSA-NEXT: add.s f8, f9, f8
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%fa = fadd float %a, %b
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%call_res = call float @llvm.fabs.f32(float %fa)
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%res = fadd float %call_res, %fa
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ret float %res
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}
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declare float @llvm.minnum.f32(float, float)
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define float @fmin_s(float %a, float %b) nounwind {
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; XTENSA-LABEL: fmin_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: addi a8, a1, -16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
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; XTENSA-NEXT: l32r a8, .LCPI6_0
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; XTENSA-NEXT: callx0 a8
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; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
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; XTENSA-NEXT: addi a8, a1, 16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: ret
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%res = call float @llvm.minnum.f32(float %a, float %b)
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ret float %res
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}
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declare float @llvm.maxnum.f32(float, float)
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define float @fmax_s(float %a, float %b) nounwind {
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; XTENSA-LABEL: fmax_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: addi a8, a1, -16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
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; XTENSA-NEXT: l32r a8, .LCPI7_0
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; XTENSA-NEXT: callx0 a8
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; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
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; XTENSA-NEXT: addi a8, a1, 16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: ret
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%res = call float @llvm.maxnum.f32(float %a, float %b)
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ret float %res
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}
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declare float @llvm.fma.f32(float, float, float)
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define float @fmadd_s(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fmadd_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: madd.s f10, f9, f8
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; XTENSA-NEXT: rfr a2, f10
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; XTENSA-NEXT: ret
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%res = call float @llvm.fma.f32(float %a, float %b, float %c)
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ret float %res
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}
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define float @fmsub_s(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fmsub_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI9_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a4
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; XTENSA-NEXT: add.s f8, f9, f8
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; XTENSA-NEXT: neg.s f8, f8
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; XTENSA-NEXT: wfr f9, a3
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; XTENSA-NEXT: wfr f10, a2
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; XTENSA-NEXT: madd.s f8, f10, f9
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%c_ = fadd float 0.0, %c ; avoid negation using xor
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%negc = fsub float -0.0, %c_
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%res = call float @llvm.fma.f32(float %a, float %b, float %negc)
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ret float %res
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}
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define float @fnmadd_s(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmadd_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI10_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: add.s f9, f9, f8
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; XTENSA-NEXT: neg.s f9, f9
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: add.s f8, f10, f8
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; XTENSA-NEXT: neg.s f8, f8
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; XTENSA-NEXT: wfr f10, a3
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; XTENSA-NEXT: madd.s f8, f9, f10
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%a_ = fadd float 0.0, %a
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%c_ = fadd float 0.0, %c
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%nega = fsub float -0.0, %a_
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%negc = fsub float -0.0, %c_
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%res = call float @llvm.fma.f32(float %nega, float %b, float %negc)
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ret float %res
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}
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define float @fnmadd_s_2(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmadd_s_2:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI11_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a3
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; XTENSA-NEXT: add.s f9, f9, f8
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; XTENSA-NEXT: neg.s f9, f9
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: add.s f8, f10, f8
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; XTENSA-NEXT: neg.s f8, f8
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; XTENSA-NEXT: wfr f10, a2
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; XTENSA-NEXT: madd.s f8, f10, f9
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%b_ = fadd float 0.0, %b
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%c_ = fadd float 0.0, %c
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%negb = fsub float -0.0, %b_
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%negc = fsub float -0.0, %c_
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%res = call float @llvm.fma.f32(float %a, float %negb, float %negc)
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ret float %res
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}
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define float @fnmadd_s_3(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmadd_s_3:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: madd.s f10, f9, f8
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; XTENSA-NEXT: rfr a8, f10
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; XTENSA-NEXT: l32r a9, .LCPI12_0
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; XTENSA-NEXT: xor a2, a8, a9
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; XTENSA-NEXT: ret
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%res = call float @llvm.fma.f32(float %a, float %b, float %c)
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%neg = fneg float %res
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ret float %neg
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}
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define float @fnmadd_nsz(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmadd_nsz:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: madd.s f10, f9, f8
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; XTENSA-NEXT: rfr a8, f10
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; XTENSA-NEXT: l32r a9, .LCPI13_0
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; XTENSA-NEXT: xor a2, a8, a9
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; XTENSA-NEXT: ret
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%res = call nsz float @llvm.fma.f32(float %a, float %b, float %c)
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%neg = fneg nsz float %res
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ret float %neg
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}
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define float @fnmsub_s(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmsub_s:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI14_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: add.s f8, f9, f8
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; XTENSA-NEXT: neg.s f8, f8
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; XTENSA-NEXT: wfr f9, a3
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: madd.s f10, f8, f9
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; XTENSA-NEXT: rfr a2, f10
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; XTENSA-NEXT: ret
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%a_ = fadd float 0.0, %a
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%nega = fsub float -0.0, %a_
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%res = call float @llvm.fma.f32(float %nega, float %b, float %c)
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ret float %res
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}
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define float @fnmsub_s_2(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmsub_s_2:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI15_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a3
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; XTENSA-NEXT: add.s f8, f9, f8
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; XTENSA-NEXT: neg.s f8, f8
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: madd.s f10, f9, f8
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; XTENSA-NEXT: rfr a2, f10
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; XTENSA-NEXT: ret
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%b_ = fadd float 0.0, %b
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%negb = fsub float -0.0, %b_
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%res = call float @llvm.fma.f32(float %a, float %negb, float %c)
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ret float %res
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}
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define float @fmadd_s_contract(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fmadd_s_contract:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: wfr f8, a3
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; XTENSA-NEXT: wfr f9, a2
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; XTENSA-NEXT: mul.s f8, f9, f8
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; XTENSA-NEXT: wfr f9, a4
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; XTENSA-NEXT: add.s f8, f8, f9
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%fm = fmul contract float %a, %b
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%res = fadd contract float %fm, %c
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ret float %res
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}
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define float @fmsub_s_contract(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fmsub_s_contract:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI17_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a4
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; XTENSA-NEXT: add.s f8, f9, f8
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; XTENSA-NEXT: wfr f9, a3
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; XTENSA-NEXT: wfr f10, a2
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; XTENSA-NEXT: mul.s f9, f10, f9
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; XTENSA-NEXT: sub.s f8, f9, f8
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%c_ = fadd float 0.0, %c ; avoid negation using xor
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%fm = fmul contract float %a, %b
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%res = fsub contract float %fm, %c_
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ret float %res
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}
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define float @fnmadd_s_contract(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmadd_s_contract:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI18_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a3
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; XTENSA-NEXT: add.s f9, f9, f8
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; XTENSA-NEXT: wfr f10, a2
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; XTENSA-NEXT: add.s f10, f10, f8
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; XTENSA-NEXT: mul.s f9, f10, f9
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; XTENSA-NEXT: neg.s f9, f9
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; XTENSA-NEXT: wfr f10, a4
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; XTENSA-NEXT: add.s f8, f10, f8
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; XTENSA-NEXT: sub.s f8, f9, f8
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%a_ = fadd float 0.0, %a ; avoid negation using xor
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%b_ = fadd float 0.0, %b ; avoid negation using xor
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%c_ = fadd float 0.0, %c ; avoid negation using xor
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%fm = fmul contract float %a_, %b_
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%fn = fneg float %fm
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%res = fsub contract float %fn, %c_
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ret float %res
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}
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define float @fnmsub_s_contract(float %a, float %b, float %c) nounwind {
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; XTENSA-LABEL: fnmsub_s_contract:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: l32r a8, .LCPI19_0
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; XTENSA-NEXT: wfr f8, a8
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; XTENSA-NEXT: wfr f9, a3
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; XTENSA-NEXT: add.s f9, f9, f8
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; XTENSA-NEXT: wfr f10, a2
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; XTENSA-NEXT: add.s f8, f10, f8
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; XTENSA-NEXT: mul.s f8, f8, f9
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; XTENSA-NEXT: wfr f9, a4
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; XTENSA-NEXT: sub.s f8, f9, f8
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; XTENSA-NEXT: rfr a2, f8
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; XTENSA-NEXT: ret
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%a_ = fadd float 0.0, %a ; avoid negation using xor
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%b_ = fadd float 0.0, %b ; avoid negation using xor
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%fm = fmul contract float %a_, %b_
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%res = fsub contract float %c, %fm
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ret float %res
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}
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declare float @llvm.powi.f32(float, i32)
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define float @powi_f32(float %a, i32 %b) nounwind {
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; XTENSA-LABEL: powi_f32:
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; XTENSA: # %bb.0:
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; XTENSA-NEXT: addi a8, a1, -16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
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; XTENSA-NEXT: l32r a8, .LCPI20_0
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; XTENSA-NEXT: callx0 a8
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; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
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; XTENSA-NEXT: addi a8, a1, 16
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; XTENSA-NEXT: or a1, a8, a8
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; XTENSA-NEXT: ret
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%res = call float @llvm.powi.f32(float %a, i32 %b)
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ret float %res
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}
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declare float @llvm.sin.f32(float)
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|
|
define float @sin_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: sin_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI21_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.sin.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
declare float @llvm.cos.f32(float)
|
|
|
|
define float @cos_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: cos_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI22_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.cos.f32(float %a)
|
|
ret float %res
|
|
}
|
|
declare float @llvm.exp.f32(float)
|
|
|
|
define float @exp_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: exp_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI23_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.exp.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
define float @log_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: log_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI24_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.log.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
declare float @llvm.log10.f32(float)
|
|
|
|
define float @log10_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: log10_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI25_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.log10.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
declare float @llvm.log2.f32(float)
|
|
|
|
define float @log2_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: log2_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI26_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.log2.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
declare float @llvm.floor.f32(float)
|
|
|
|
define float @floor_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: floor_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI27_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.floor.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
declare float @llvm.ceil.f32(float)
|
|
|
|
define float @ceil_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: ceil_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI28_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.ceil.f32(float %a)
|
|
ret float %res
|
|
}
|
|
declare float @llvm.rint.f32(float)
|
|
|
|
define float @rint_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: rint_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI29_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.rint.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
declare float @llvm.nearbyint.f32(float)
|
|
|
|
define float @nearbyint_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: nearbyint_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI30_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.nearbyint.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
declare float @llvm.round.f32(float)
|
|
|
|
define float @round_f32(float %a) nounwind {
|
|
; XTENSA-LABEL: round_f32:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: addi a8, a1, -16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: s32i a0, a1, 0 # 4-byte Folded Spill
|
|
; XTENSA-NEXT: l32r a8, .LCPI31_0
|
|
; XTENSA-NEXT: callx0 a8
|
|
; XTENSA-NEXT: l32i a0, a1, 0 # 4-byte Folded Reload
|
|
; XTENSA-NEXT: addi a8, a1, 16
|
|
; XTENSA-NEXT: or a1, a8, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.round.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
define float @fneg_s(float %a) nounwind {
|
|
; XTENSA-LABEL: fneg_s:
|
|
; XTENSA: # %bb.0:
|
|
; XTENSA-NEXT: l32r a8, .LCPI32_0
|
|
; XTENSA-NEXT: and a2, a2, a8
|
|
; XTENSA-NEXT: ret
|
|
%res = call float @llvm.fabs.f32(float %a)
|
|
ret float %res
|
|
}
|
|
|
|
define i32 @fptosi(float %f) {
|
|
; XTENSA-LABEL: fptosi:
|
|
; XTENSA: .cfi_startproc
|
|
; XTENSA-NEXT: # %bb.0:
|
|
; XTENSA-NEXT: wfr f8, a2
|
|
; XTENSA-NEXT: trunc.s a2, f8, 0
|
|
; XTENSA-NEXT: ret
|
|
%conv = fptosi float %f to i32
|
|
ret i32 %conv
|
|
}
|
|
|
|
define i32 @fptoui(float %f) {
|
|
; XTENSA-LABEL: fptoui:
|
|
; XTENSA: .cfi_startproc
|
|
; XTENSA-NEXT: # %bb.0:
|
|
; XTENSA-NEXT: wfr f8, a2
|
|
; XTENSA-NEXT: utrunc.s a2, f8, 0
|
|
; XTENSA-NEXT: ret
|
|
%conv = fptoui float %f to i32
|
|
ret i32 %conv
|
|
}
|
|
|
|
define float @copysign_f32(float %a, float %b) {
|
|
; XTENSA-LABEL: copysign_f32:
|
|
; XTENSA: .cfi_startproc
|
|
; XTENSA-NEXT: # %bb.0: # %entry
|
|
; XTENSA-NEXT: l32r a8, .LCPI35_0
|
|
; XTENSA-NEXT: and a8, a3, a8
|
|
; XTENSA-NEXT: l32r a9, .LCPI35_1
|
|
; XTENSA-NEXT: and a9, a2, a9
|
|
; XTENSA-NEXT: wfr f8, a9
|
|
; XTENSA-NEXT: movi a9, 0
|
|
; XTENSA-NEXT: beq a8, a9, .LBB35_2
|
|
; XTENSA-NEXT: # %bb.1:
|
|
; XTENSA-NEXT: neg.s f8, f8
|
|
; XTENSA-NEXT: .LBB35_2: # %entry
|
|
; XTENSA-NEXT: rfr a2, f8
|
|
; XTENSA-NEXT: ret
|
|
entry:
|
|
%c = call float @llvm.copysign.f32(float %a, float %b)
|
|
ret float %c
|
|
}
|