Files
clang-p2996/llvm/lib/Target/RISCV/Disassembler
Craig Topper c053e9f0f4 [RISCV] Re-implement Zacas MC layer support to make it usable for CodeGen. (#77418)
This changes the register class to GPRPair and adds the destination
register as a source with a tied operand constraint.
    
Parsing for the paired register is done with a custom parser that
checks for even register and converts it to its pair version. A
bit of care needs to be taken so that we only parse as a pair register
based on which instruction we're parsing and the mode in the subtarget.
This allows amocas.w to be parsed correcty in both modes.
    
I've added a FIXME to note that we should be creating pair registers
for Zdinx on RV32 to match the instructions CodeGen generates.
2024-01-10 09:18:40 -08:00
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