eabaee0c59
R_RISCV_CALL/R_RISCV_CALL_PLT distinction is not necessary and R_RISCV_CALL has been deprecated. Since https://reviews.llvm.org/D132530 `call foo` assembles to R_RISCV_CALL_PLT. The `@plt` suffix is not useful and can be removed now (matching AArch64 and PowerPC). GNU assembler assembles `call foo` to RISCV_CALL_PLT since 2022-09 (70f35d72ef04cd23771875c1661c9975044a749c). Without this patch, unconditionally changing MO_CALL to MO_PLT could create `jump .L1@plt, a0`, which is invalid in LLVM integrated assembler and GNU assembler.
54 lines
1.8 KiB
LLVM
54 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+zve64x -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV32
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; RUN: llc -mtriple=riscv64 -mattr=+zve64x -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV64
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; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV32
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefix=RV64
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; FIXME: We are over-aligning the stack on V, wasting stack space.
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define ptr @scalar_stack_align16() nounwind {
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; RV32-LABEL: scalar_stack_align16:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -48
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; RV32-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
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; RV32-NEXT: csrr a0, vlenb
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; RV32-NEXT: slli a0, a0, 1
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; RV32-NEXT: sub sp, sp, a0
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; RV32-NEXT: addi a0, sp, 32
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; RV32-NEXT: call extern
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; RV32-NEXT: addi a0, sp, 16
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; RV32-NEXT: csrr a1, vlenb
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; RV32-NEXT: slli a1, a1, 1
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; RV32-NEXT: add sp, sp, a1
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; RV32-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
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; RV32-NEXT: addi sp, sp, 48
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; RV32-NEXT: ret
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;
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; RV64-LABEL: scalar_stack_align16:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -48
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; RV64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
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; RV64-NEXT: csrr a0, vlenb
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; RV64-NEXT: slli a0, a0, 1
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; RV64-NEXT: sub sp, sp, a0
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; RV64-NEXT: addi a0, sp, 32
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; RV64-NEXT: call extern
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; RV64-NEXT: addi a0, sp, 16
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; RV64-NEXT: csrr a1, vlenb
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; RV64-NEXT: slli a1, a1, 1
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; RV64-NEXT: add sp, sp, a1
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; RV64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
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; RV64-NEXT: addi sp, sp, 48
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; RV64-NEXT: ret
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%a = alloca <vscale x 2 x i32>
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%c = alloca i64, align 16
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call void @extern(<vscale x 2 x i32>* %a)
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ret ptr %c
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}
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declare void @extern(<vscale x 2 x i32>*)
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