f7bfa583b7
Previously, the SPIR-V instruction printer was always printing the first operand of an `OpConstant`'s literal value as one of the fixed operands. This is incorrect for 64-bit values, where the first operand is actually the value's lower-order word and should be combined with the following higher-order word before printing. This change fixes that issue by waiting to print the last fixed operand of `OpConstant` instructions until the variadic operands are ready to be printed, then using `NumFixedOps - 1` as the starting operand index for the literal value operands. Depends on D156049
19 lines
837 B
LLVM
19 lines
837 B
LLVM
; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
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; CHECK-SPIRV-DAG: %[[#type_int32:]] = OpTypeInt 32 0
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; CHECK-SPIRV-DAG: %[[#type_int64:]] = OpTypeInt 64 0
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; CHECK-SPIRV: %[[#type_vec:]] = OpTypeVector %[[#type_int32]] 2
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; CHECK-SPIRV: %[[#const1:]] = OpConstant %[[#type_int32]] 1
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; CHECK-SPIRV: %[[#vec_const:]] = OpConstantComposite %[[#type_vec]] %[[#const1]] %[[#const1]]
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; CHECK-SPIRV: %[[#const32:]] = OpConstant %[[#type_int64]] 32
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; CHECK-SPIRV: %[[#bitcast_res:]] = OpBitcast %[[#type_int64]] %[[#vec_const]]
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; CHECK-SPIRV: %[[#shift_res:]] = OpShiftRightLogical %[[#type_int64]] %[[#bitcast_res]] %[[#const32]]
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define void @foo(i64* %arg) {
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entry:
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%0 = lshr i64 bitcast (<2 x i32> <i32 1, i32 1> to i64), 32
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store i64 %0, i64* %arg
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ret void
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}
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