59e5cb7b83
Prior to this change spv_ptrcast (and OpBitcast) was never emitted for GEP resulting pointers. While such SPIR-V was (mostly) accepted by the NEO GPU driver, the generated SPIR-V was incorrect. The newly added test (pointers/getelementptr-bitcast-load.ll) verifies that a correct bitcast is added for more complex cases and passes spirv-val. The test is based on an OpenCL CTS test (basic/prefetch).
34 lines
1.4 KiB
LLVM
34 lines
1.4 KiB
LLVM
; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-DAG: %[[#INT8:]] = OpTypeInt 8 0
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; CHECK-DAG: %[[#VEC3:]] = OpTypeVector %[[#INT8]] 3
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; CHECK-DAG: %[[#VEC4:]] = OpTypeVector %[[#INT8]] 4
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; CHECK-DAG: %[[#PTR_VEC3:]] = OpTypePointer CrossWorkgroup %[[#VEC3]]
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; CHECK-DAG: %[[#PTR_VEC4:]] = OpTypePointer CrossWorkgroup %[[#VEC4]]
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; CHECK: %[[#AC1:]] = OpInBoundsPtrAccessChain %[[#PTR_VEC3]] %[[#]] %[[#]]
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; CHECK: %[[#BC1:]] = OpBitcast %[[#PTR_VEC4]] %[[#AC1]]
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; CHECK: %[[#LD1:]] = OpLoad %[[#VEC4]] %[[#BC1]] Aligned 4
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; CHECK: OpReturn
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define spir_kernel void @foo(ptr addrspace(1) %a, i64 %b) {
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%index = getelementptr inbounds <3 x i8>, ptr addrspace(1) %a, i64 %b
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%loadv = load <4 x i8>, ptr addrspace(1) %index, align 4
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ret void
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}
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; CHECK: %[[#AC2:]] = OpInBoundsPtrAccessChain %[[#PTR_VEC3]] %[[#]] %[[#]]
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; CHECK: %[[#BC2:]] = OpBitcast %[[#PTR_VEC4]] %[[#AC2]]
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; CHECK: %[[#LD2:]] = OpLoad %[[#VEC4]] %[[#BC2]] Aligned 4
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; CHECK: OpReturn
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define spir_kernel void @bar(ptr addrspace(1) %a, i64 %b) {
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%index = getelementptr inbounds <3 x i8>, ptr addrspace(1) %a, i64 %b
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; This redundant bitcast is left here itentionally to simulate the conversion
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; from older LLVM IR with typed pointers.
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%cast = bitcast ptr addrspace(1) %index to ptr addrspace(1)
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%loadv = load <4 x i8>, ptr addrspace(1) %cast, align 4
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ret void
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}
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