Since most of the operations in the `math` dialect don't have low-precision implementations, add the -math-legalize-to-f32 pass that goes through and brackets low-precision math funcitons (like `math.sin %0 : f16`) with `arith.extf` and `arith.truncf`. This preserves the original semantics of the math operation but allows lowering to proceed. Versions of this lowering are already implicitly present in some passes, like ConvertGPUToROCDL. However, because those are implicit rewrites, they hide the floating-point extension and truncation, preventing anyone from writing passes that operate on those implitic extf/truncf pairs. Exposing this legalization explicitly is needed to allow lowening 8-bit floats on AMD GPUs, as the implementation of extf and truncf on that platform requires the complex logic found in ArithToAMDGPU, which runs before the GPU to ROCDL lowering.
119 lines
4.5 KiB
C++
119 lines
4.5 KiB
C++
//===- LegalizeToF32.cpp - Legalize functions on small floats ----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements legalizing math operations on small floating-point
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// types through arith.extf and arith.truncf.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/Math/IR/Math.h"
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#include "mlir/Dialect/Math/Transforms/Passes.h"
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#include "mlir/IR/Diagnostics.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/IR/TypeUtilities.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "llvm/ADT/STLExtras.h"
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namespace mlir::math {
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#define GEN_PASS_DEF_MATHLEGALIZETOF32
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#include "mlir/Dialect/Math/Transforms/Passes.h.inc"
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} // namespace mlir::math
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using namespace mlir;
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namespace {
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struct LegalizeToF32RewritePattern final : ConversionPattern {
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LegalizeToF32RewritePattern(TypeConverter &converter, MLIRContext *context)
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: ConversionPattern(converter, MatchAnyOpTypeTag{}, 1, context) {}
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LogicalResult
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matchAndRewrite(Operation *op, ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const override;
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};
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struct LegalizeToF32Pass final
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: mlir::math::impl::MathLegalizeToF32Base<LegalizeToF32Pass> {
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void runOnOperation() override;
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};
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} // namespace
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void mlir::math::populateLegalizeToF32TypeConverter(
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TypeConverter &typeConverter) {
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typeConverter.addConversion(
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[](Type type) -> std::optional<Type> { return type; });
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typeConverter.addConversion([](FloatType type) -> std::optional<Type> {
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if (type.getWidth() < 32)
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return Float32Type::get(type.getContext());
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return std::nullopt;
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});
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typeConverter.addConversion([](ShapedType type) -> std::optional<Type> {
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if (auto elemTy = dyn_cast<FloatType>(type.getElementType()))
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return type.clone(Float32Type::get(type.getContext()));
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return std::nullopt;
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});
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typeConverter.addTargetMaterialization(
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[](OpBuilder &b, Type target, ValueRange input, Location loc) {
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return b.create<arith::ExtFOp>(loc, target, input);
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});
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}
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void mlir::math::populateLegalizeToF32ConversionTarget(
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ConversionTarget &target, TypeConverter &typeConverter) {
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target.addDynamicallyLegalDialect<MathDialect>(
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[&typeConverter](Operation *op) -> bool {
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return typeConverter.isLegal(op);
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});
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target.addLegalOp<FmaOp>();
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target.addLegalOp<arith::ExtFOp, arith::TruncFOp>();
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}
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LogicalResult LegalizeToF32RewritePattern::matchAndRewrite(
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Operation *op, ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const {
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Location loc = op->getLoc();
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const TypeConverter *converter = getTypeConverter();
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if (converter->isLegal(op))
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return rewriter.notifyMatchFailure(loc, "op already legal");
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OperationState newOp(loc, op->getName());
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newOp.addOperands(operands);
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SmallVector<Type> newResultTypes;
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if (failed(converter->convertTypes(op->getResultTypes(), newResultTypes)))
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return rewriter.notifyMatchFailure(loc, "couldn't convert return types");
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newOp.addTypes(newResultTypes);
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newOp.addAttributes(op->getAttrs());
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Operation *legalized = rewriter.create(newOp);
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SmallVector<Value> results = legalized->getResults();
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for (auto [result, newType, origType] :
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llvm::zip_equal(results, newResultTypes, op->getResultTypes())) {
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if (newType != origType)
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result = rewriter.create<arith::TruncFOp>(loc, origType, result);
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}
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rewriter.replaceOp(op, results);
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return success();
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}
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void mlir::math::populateLegalizeToF32Patterns(RewritePatternSet &patterns,
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TypeConverter &typeConverter) {
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patterns.add<LegalizeToF32RewritePattern>(typeConverter,
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patterns.getContext());
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}
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void LegalizeToF32Pass::runOnOperation() {
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Operation *op = getOperation();
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MLIRContext &ctx = getContext();
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TypeConverter typeConverter;
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math::populateLegalizeToF32TypeConverter(typeConverter);
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ConversionTarget target(ctx);
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math::populateLegalizeToF32ConversionTarget(target, typeConverter);
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RewritePatternSet patterns(&ctx);
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math::populateLegalizeToF32Patterns(patterns, typeConverter);
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if (failed(applyPartialConversion(op, target, std::move(patterns))))
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return signalPassFailure();
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}
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