Akira Hatanaka 14e31a2fe7 [mips] Define register class FGRH32 for the high half of the 64-bit floating ...

point registers. We will need this register class later when we add
definitions for instructions mfhc1 and mthc1. Also, remove sub-register indices
sub_fpeven and sub_fpodd and use sub_lo and sub_hi instead.

llvm-svn: 188842

2013-08-20 22:58:56 +00:00

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