clang-p2996

AsmParser

[AMDGPU] Fix operand definitions for atomic scalar memory instructions. (#71799 )

2023-11-10 14:00:46 +00:00

Disassembler

AMDGPU: Minor updates to program resource registers (#69525 )

2023-10-19 12:40:19 -04:00

MCA

[bazel] Remove the dependency on CodeGen from MCTargetDesc & Utils

2023-08-30 18:21:28 -07:00

MCTargetDesc

Reland: [AMDGPU] Remove Code Object V3 (#67118 )

2023-11-07 12:23:03 +01:00

TargetInfo

[AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.

2023-07-05 10:13:33 +01:00

Utils

[AMDGPU] Fix and use isSISrcInlinableOperand. NFC. (#72101 )

2023-11-13 11:29:56 +00:00

AMDGPU.h

AMDGPU: Port AMDGPUAttributor to new pass manager (#71349 )

2023-11-07 15:40:40 +09:00

AMDGPU.td

[AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (#68684 )

2023-10-11 11:37:27 +01:00

AMDGPUAliasAnalysis.cpp

[AA] Skip the layer of indirection in returning conservative results.

2023-07-28 12:13:35 -07:00

AMDGPUAliasAnalysis.h

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AMDGPUAlwaysInlinePass.cpp

[amdgpu] Implement dynamic LDS accesses from non-kernel functions

2023-04-04 20:06:34 +01:00

AMDGPUAnnotateKernelFeatures.cpp

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AMDGPUAnnotateUniformValues.cpp

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AMDGPUArgumentUsageInfo.cpp

[AMDGPU] Add DAG ISel support for preloaded kernel arguments

2023-09-25 09:32:59 -07:00

AMDGPUArgumentUsageInfo.h

[AMDGPU] Add DAG ISel support for preloaded kernel arguments

2023-09-25 09:32:59 -07:00

AMDGPUAsmPrinter.cpp

Reland: [AMDGPU] Remove Code Object V3 (#67118 )

2023-11-07 12:23:03 +01:00

AMDGPUAsmPrinter.h

[AMDGPU] Remove AMDGPUAsmPrinter::isBlockOnlyReachableByFallthrough (#71407 )

2023-11-06 16:29:52 +00:00

AMDGPUAtomicOptimizer.cpp

[AMDGPU] Fix scan of atomicFSub in AtomicOptimizer. (#66082 )

2023-09-13 09:57:10 +05:30

AMDGPUAttributes.def

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AMDGPUAttributor.cpp

AMDGPU: Port AMDGPUAttributor to new pass manager (#71349 )

2023-11-07 15:40:40 +09:00

AMDGPUCallingConv.td

[AMDGPU] Add inreg support for SGPR arguments (#67182 )

2023-11-08 11:35:52 -08:00

AMDGPUCallLowering.cpp

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

AMDGPUCallLowering.h

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

AMDGPUCodeGenPrepare.cpp

AMDGPU: Avoid creating vector extracts if we aren't going to do anything

2023-09-13 09:45:34 +03:00

AMDGPUCombine.td

[GlobalISel] Cleanup Combine.td

2023-09-05 08:19:06 +02:00

AMDGPUCombinerHelper.cpp

AMDGPU/GlobalISel: Don't pointlessly check for convergent intrinsics

2023-09-15 23:32:19 +03:00

AMDGPUCombinerHelper.h

[llvm] Fix include guards

2023-06-13 10:47:18 +01:00

AMDGPUCtorDtorLowering.cpp

[AMDGPU] Call the FINI_ARRAY destructors in the correct order (#71815 )

2023-11-10 11:01:02 -06:00

AMDGPUCtorDtorLowering.h

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AMDGPUExportClustering.cpp

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AMDGPUExportClustering.h

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AMDGPUFeatures.td

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUGenRegisterBankInfo.def

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AMDGPUGISel.td

AMDGPU: Try to select fmul by power of 2 to ldexp

2023-08-11 07:57:55 -04:00

AMDGPUGlobalISelUtils.cpp

Restore CodeGen/LowLevelType from Support

2023-05-03 00:13:19 +09:00

AMDGPUGlobalISelUtils.h

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AMDGPUHSAMetadataStreamer.cpp

Reland: [AMDGPU] Remove Code Object V3 (#67118 )

2023-11-07 12:23:03 +01:00

AMDGPUHSAMetadataStreamer.h

Reland: [AMDGPU] Remove Code Object V3 (#67118 )

2023-11-07 12:23:03 +01:00

AMDGPUIGroupLP.cpp

[AMDGPU] Correct assert that incorrectly chained multiple == operators. (#70291 )

2023-10-26 08:02:10 -07:00

AMDGPUIGroupLP.h

[AMDGPU][IGLP] SingleWaveOpt: Cache DSW Counters from PreRA (#67759 )

2023-10-06 17:34:14 -07:00

AMDGPUImageIntrinsicOptimizer.cpp

[AMDGPU] Fix image intrinsic optimizer on loads from different resources (#69355 )

2023-10-18 11:08:01 +01:00

AMDGPUInsertDelayAlu.cpp

[AMDGPU] Add functions for composing and decomposing S_WAIT_DEPCTR operands

2023-07-04 11:02:12 +01:00

AMDGPUInstCombineIntrinsic.cpp

[AMDGPUInstCombine] Avoid use of ConstantExpr::getSExt() (NFC)

2023-10-02 11:12:04 +02:00

AMDGPUInstrInfo.cpp

Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"

2023-07-27 14:49:17 +05:30

AMDGPUInstrInfo.h

Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"

2023-07-27 14:49:17 +05:30

AMDGPUInstrInfo.td

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

AMDGPUInstructions.td

[AMDGPU] Fix operand definitions for atomic scalar memory instructions. (#71799 )

2023-11-10 14:00:46 +00:00

AMDGPUInstructionSelector.cpp

[AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (#70395 )

2023-10-30 08:12:28 -07:00

AMDGPUInstructionSelector.h

[AMDGPU] Select gfx1150 SALU Float instructions (#66885 )

2023-09-21 12:22:55 +02:00

AMDGPUISelDAGToDAG.cpp

Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (#68714 )

2023-11-06 15:16:49 +01:00

AMDGPUISelDAGToDAG.h

[AMDGPU] Select gfx1150 SALU Float instructions (#66885 )

2023-09-21 12:22:55 +02:00

AMDGPUISelLowering.cpp

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

AMDGPUISelLowering.h

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

AMDGPULateCodeGenPrepare.cpp

AMDGPU: Use getTypeStoreSizeInBits

2023-04-29 10:35:06 -04:00

AMDGPULegalizerInfo.cpp

Reland: [AMDGPU] Remove Code Object V3 (#67118 )

2023-11-07 12:23:03 +01:00

AMDGPULegalizerInfo.h

[AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (#67791 )

2023-10-10 09:22:02 +02:00

AMDGPULibCalls.cpp

AMDGPU: Handle rounding intrinsic exponents in isKnownIntegral

2023-09-01 08:22:16 -04:00

AMDGPULibFunc.cpp

AMDGPU: Use pown instead of pow if known integral

2023-09-01 08:22:16 -04:00

AMDGPULibFunc.h

AMDGPU: Use pown instead of pow if known integral

2023-09-01 08:22:16 -04:00

AMDGPULowerKernelArguments.cpp

[AMDGPU] Add IR lowering changes for preloaded kernargs

2023-09-25 08:54:07 -07:00

AMDGPULowerKernelAttributes.cpp

[AMDGPULowerKernelAttribute] Avoid use of ConstantExpr::getIntegerCast() (NFC)

2023-11-01 12:11:02 +01:00

AMDGPULowerModuleLDSPass.cpp

[llvm] Stop including llvm/ADT/SetVector.h (NFC)

2023-11-10 23:50:23 -08:00

AMDGPUMachineCFGStructurizer.cpp

[AMDGPU] Remove unused variable 'CNI' in /AMDGPUMachineCFGStructurizer.cpp (NFC)

2023-07-25 15:56:40 +08:00

AMDGPUMachineFunction.cpp

[AMDGPU] Add IsChainFunction to the MachineFunctionInfo

2023-08-21 12:37:32 +02:00

AMDGPUMachineFunction.h

[AMDGPU] Add IsChainFunction to the MachineFunctionInfo

2023-08-21 12:37:32 +02:00

AMDGPUMachineModuleInfo.cpp

…

AMDGPUMachineModuleInfo.h

…

AMDGPUMacroFusion.cpp

…

AMDGPUMacroFusion.h

…

AMDGPUMCInstLower.cpp

[AMDGPU] Fix expensive-checks build.

2023-07-05 10:26:21 +01:00

AMDGPUMCInstLower.h

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AMDGPUMIRFormatter.cpp

…

AMDGPUMIRFormatter.h

…

AMDGPUOpenCLEnqueuedBlockLowering.cpp

[NFC] Remove Type::getInt8PtrTy (#71029 )

2023-11-07 17:26:26 +01:00

AMDGPUPerfHintAnalysis.cpp

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AMDGPUPerfHintAnalysis.h

…

AMDGPUPostLegalizerCombiner.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

AMDGPUPreLegalizerCombiner.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

AMDGPUPrintfRuntimeBinding.cpp

[AMDGPU] Respect nobuiltin when converting printf

2023-08-22 12:48:16 -05:00

AMDGPUPromoteAlloca.cpp

[AMDGPU] PromoteAlloca: Handle load/store subvectors using non-constant indexes (#71505 )

2023-11-07 15:29:41 +01:00

AMDGPUPromoteKernelArguments.cpp

[llvm] Remove uses of getWithSamePointeeType() (NFC)

2023-07-18 12:07:09 +02:00

AMDGPUPTNote.h

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AMDGPURegBankCombiner.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

AMDGPURegBankSelect.cpp

AMDGPU: Special case uniformity info for single lane workgroups

2023-06-28 07:25:48 -04:00

AMDGPURegBankSelect.h

…

AMDGPURegisterBankInfo.cpp

[AMDGPU] ISel for llvm.amdgcn.set.inactive.chain.arg

2023-11-08 09:53:47 +01:00

AMDGPURegisterBankInfo.h

GlobalISel: Pass MachineIRBuilder to applyMappingImpl

2023-07-31 10:03:38 -04:00

AMDGPURegisterBanks.td

…

AMDGPURemoveIncompatibleFunctions.cpp

AMDGPU: Add s-memrealtime and s-memtime-inst to RemoveIncompatibleFunctions

2023-08-22 10:22:41 -07:00

AMDGPUResourceUsageAnalysis.cpp

[AMDGPU] Add utilities to track number of user SGPRs. NFC.

2023-09-12 08:52:30 -07:00

AMDGPUResourceUsageAnalysis.h

…

AMDGPURewriteOutArguments.cpp

[llvm] Stop including llvm/ADT/SmallSet.h (NFC)

2023-11-11 12:32:15 -08:00

AMDGPURewriteUndefForPHI.cpp

[AMDGPU] Port AMDGPURewriteUndefForPHI to new pass manager (#66008 )

2023-09-12 13:32:02 -07:00

AMDGPUSearchableTables.td

AMDGPU: Drop and upgrade llvm.amdgcn.atomic.inc/dec to atomicrmw

2023-06-21 21:20:26 -04:00

AMDGPUSetWavePriority.cpp

…

AMDGPUSubtarget.cpp

[AMDGPU] Add DAG ISel support for preloaded kernel arguments

2023-09-25 09:32:59 -07:00

AMDGPUSubtarget.h

[AMDGPU] Have a subtarget feature to control use of real True16 instructions.

2023-09-22 10:47:13 +01:00

AMDGPUTargetMachine.cpp

[AMDGPU] Move WWM register pre-allocation to during regalloc (#70618 )

2023-11-08 11:54:28 +09:00

AMDGPUTargetMachine.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

AMDGPUTargetObjectFile.cpp

…

AMDGPUTargetObjectFile.h

…

AMDGPUTargetTransformInfo.cpp

Replace TypeSize::{getFixed,getScalable} with canonical TypeSize::{Fixed,Scalable}. NFC

2023-10-27 00:30:41 -07:00

AMDGPUTargetTransformInfo.h

AMDGPU: Fix not applying the correct default memcpy expansion threshold

2023-07-06 12:14:14 -04:00

AMDGPUUnifyDivergentExitNodes.cpp

[LowerSwitch] Don't let pass manager handle the dependency (#68662 )

2023-10-25 09:24:36 +08:00

AMDGPUUnifyDivergentExitNodes.h

[llvm] Fix include guards

2023-06-13 10:47:18 +01:00

AMDGPUUnifyMetadata.cpp

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AMDKernelCodeT.h

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BUFInstructions.td

[AMDGPU] CodeGen for 64-bit buffer atomic cmpswap intrinsics (#70475 )

2023-10-30 16:44:22 +00:00

CaymanInstructions.td

…

CMakeLists.txt

[HIP][LLVM][Opt] Add LLVM support for hipstdpar

2023-10-12 11:26:48 +01:00

DSInstructions.td

SelectionDAG: Swap operands of atomic_store

2023-08-31 17:30:10 -04:00

EvergreenInstructions.td

…

EXPInstructions.td

…

FLATInstructions.td

[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452 )

2023-10-25 13:24:50 +01:00

GCNCreateVOPD.cpp

[llvm] Stop including llvm/ADT/StringMap.h (NFC)

2023-10-22 11:53:56 -07:00

GCNDPPCombine.cpp

[AMDGPU] Fix -Wunused-function in GCNDPPCombine.cpp (NFC)

2023-09-29 18:24:18 +08:00

GCNHazardRecognizer.cpp

[TableGen] Rename ResourceCycles and StartAtCycle to clarify semantics

2023-08-24 19:21:36 -07:00

GCNHazardRecognizer.h

…

GCNILPSched.cpp

…

GCNIterativeScheduler.cpp

[AMDGPU] Fix GCNUpwardRPTracker. (#71186 )

2023-11-10 13:44:10 +01:00

GCNIterativeScheduler.h

…

GCNMinRegStrategy.cpp

…

GCNNSAReassign.cpp

…

GCNPreRALongBranchReg.cpp

[AMDGPU] Reserve SGPR pair when long branches are present

2023-06-29 16:50:46 -05:00

GCNPreRAOptimizations.cpp

…

GCNProcessors.td

[AMDGPU] Add target features for GDS and GWS

2023-08-02 09:02:07 +01:00

GCNRegPressure.cpp

[AMDGPU] Fix GCNUpwardRPTracker. (#71186 )

2023-11-10 13:44:10 +01:00

GCNRegPressure.h

[AMDGPU] Fix GCNUpwardRPTracker. (#71186 )

2023-11-10 13:44:10 +01:00

GCNRewritePartialRegUses.cpp

[AMDGPU] Fix register class for a subreg in GCNRewritePartialRegUses.

2023-07-06 08:48:45 +02:00

GCNSchedStrategy.cpp

[AMDGPU][IGLP] SingleWaveOpt: Cache DSW Counters from PreRA (#67759 )

2023-10-06 17:34:14 -07:00

GCNSchedStrategy.h

…

GCNSubtarget.h

[AMDGPU] Add encoding/decoding support for non-result-returning ATOMIC_CSUB instructions (#68684 )

2023-10-11 11:37:27 +01:00

GCNVOPDUtils.cpp

[AMDGPU] Fix VOPD dependency checks during combine

2023-06-15 11:16:33 -07:00

GCNVOPDUtils.h

…

InstCombineTables.td

…

LDSDIRInstructions.td

[AMDGPU][AsmParser][NFC] Simplify v_interp-related operand definitions.

2023-06-15 11:04:56 +01:00

MIMGInstructions.td

[AMDGPU][AsmParser][NFC] Translate parsed MIMG instructions to MCInsts automatically.

2023-07-13 19:47:31 +01:00

R600.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

R600.td

…

R600AsmPrinter.cpp

…

R600AsmPrinter.h

…

R600ClauseMergePass.cpp

…

R600ControlFlowFinalizer.cpp

…

R600Defines.h

…

R600EmitClauseMarkers.cpp

…

R600ExpandSpecialInstrs.cpp

…

R600FrameLowering.cpp

…

R600FrameLowering.h

…

R600InstrFormats.td

…

R600InstrInfo.cpp

…

R600InstrInfo.h

…

R600InstrInfo.td

…

R600Instructions.td

AMDGPU: Add llvm.amdgcn.exp2 intrinsic

2023-06-15 07:00:07 -04:00

R600ISelDAGToDAG.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

R600ISelLowering.cpp

…

R600ISelLowering.h

…

R600MachineCFGStructurizer.cpp

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R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

…

R600MachineScheduler.h

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R600MCInstLower.cpp

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R600OpenCLImageTypeLoweringPass.cpp

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R600OptimizeVectorRegisters.cpp

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R600Packetizer.cpp

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R600Processors.td

…

R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

…

R600Subtarget.cpp

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R600Subtarget.h

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R600TargetMachine.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

R600TargetMachine.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

R600TargetTransformInfo.cpp

Replace TypeSize::{getFixed,getScalable} with canonical TypeSize::{Fixed,Scalable}. NFC

2023-10-27 00:30:41 -07:00

R600TargetTransformInfo.h

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R700Instructions.td

…

SIAnnotateControlFlow.cpp

[NFC][RemoveDIs] Prefer iterator-insertion over instructions

2023-09-11 11:48:45 +01:00

SIDefines.h

[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452 )

2023-10-25 13:24:50 +01:00

SIFixSGPRCopies.cpp

[AMDGPU] Fix nondeterminism in SIFixSGPRCopies (#70644 )

2023-10-31 11:47:42 +00:00

SIFixVGPRCopies.cpp

AMDGPU: Make SIFixVGPRCopies preserve everything

2023-07-06 10:26:21 -04:00

SIFoldOperands.cpp

[AMDGPU] Revert "Preliminary patch for divergence driven instruction selection. Operands Folding 1." (#71710 )

2023-11-13 13:53:10 +00:00

SIFormMemoryClauses.cpp

[AMDGPU] Make use of MachineInstr::all_defs and all_uses. NFCI.

2023-06-05 10:32:33 +01:00

SIFrameLowering.cpp

[AMDGPU] Fix -Wunused-variable in SIFrameLowering.cpp (NFC)

2023-11-08 20:48:44 +08:00

SIFrameLowering.h

[AMDGPU] [SIFrameLowering] Use LiveRegUnits instead of LivePhysRegs.

2023-09-21 11:49:46 +05:30

SIInsertHardClauses.cpp

…

SIInsertWaitcnts.cpp

[AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452 )

2023-10-25 13:24:50 +01:00

SIInstrFormats.td

[AMDGPU][NFC] Add True16 operand definitions.

2023-09-25 16:48:46 +01:00

SIInstrInfo.cpp

[AMDGPU] Simplify commuted operand handling. NFCI. (#71965 )

2023-11-10 21:51:52 +00:00

SIInstrInfo.h

[AMDGPU] Callee saves for amdgpu_cs_chain[_preserve] (#71526 )

2023-11-08 08:28:15 +01:00

SIInstrInfo.td

[AMDGPU] Fix operand definitions for atomic scalar memory instructions. (#71799 )

2023-11-10 14:00:46 +00:00

SIInstructions.td

[AMDGPU] ISel for llvm.amdgcn.set.inactive.chain.arg

2023-11-08 09:53:47 +01:00

SIISelLowering.cpp

[AMDGPU] Add inreg support for SGPR arguments (#67182 )

2023-11-08 11:35:52 -08:00

SIISelLowering.h

Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (#68714 )

2023-11-06 15:16:49 +01:00

SILateBranchLowering.cpp

[AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (#68186 )

2023-11-06 12:30:07 +01:00

SILoadStoreOptimizer.cpp

[AMDGPU] Add sanity check that fixes bad shift operation in AMD backend

2023-08-11 15:26:35 -04:00

SILowerControlFlow.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295 )

2023-09-14 14:10:14 -07:00

SILowerI1Copies.cpp

[AMDGPU] SILowerI1Copies: clear kill flags on COPY (#65883 )

2023-09-11 12:30:08 +09:00

SILowerSGPRSpills.cpp

[AMDGPU] Introduce AMDGPU::SGPR_SPILL asm comment flag (#67091 )

2023-09-29 11:15:01 +05:30

SILowerWWMCopies.cpp

Reapply "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"

2023-07-31 20:15:45 -04:00

SIMachineFunctionInfo.cpp

[AMDGPU] Callee saves for amdgpu_cs_chain[_preserve] (#71526 )

2023-11-08 08:28:15 +01:00

SIMachineFunctionInfo.h

[AMDGPU] Add DAG ISel support for preloaded kernel arguments

2023-09-25 09:32:59 -07:00

SIMachineScheduler.cpp

…

SIMachineScheduler.h

…

SIMemoryLegalizer.cpp

AMDGPU: Force sc0 and sc1 on stores for gfx940 and gfx941

2023-05-12 11:53:19 -04:00

SIModeRegister.cpp

[AMDGPU] Modernize Status and BlockData (NFC)

2023-04-16 13:03:02 -07:00

SIModeRegisterDefaults.cpp

AMDGPU: Use const instead of constexpr to try fixing MSVC bot

2023-08-31 12:52:41 -04:00

SIModeRegisterDefaults.h

AMDGPU: Implement llvm.get.rounding

2023-08-30 14:06:13 -04:00

SIOptimizeExecMasking.cpp

[AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (#68293 )

2023-11-02 10:36:27 +01:00

SIOptimizeExecMaskingPreRA.cpp

[MC] Add MCRegisterInfo::regunits for iteration over register units

2023-06-16 05:39:50 +03:00

SIOptimizeVGPRLiveRange.cpp

[AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange

2023-08-07 11:35:39 +05:30

SIPeepholeSDWA.cpp

[AMDGPU] PeepholeSDWA: Don't assume inst srcs are registers (#69576 )

2023-10-19 12:13:45 +02:00

SIPostRABundler.cpp

[MC] Add MCRegisterInfo::regunits for iteration over register units

2023-06-16 05:39:50 +03:00

SIPreAllocateWWMRegs.cpp

[AMDGPU] Add option to pre-allocate SGPR spill VGPRs (#70626 )

2023-11-13 12:21:18 +09:00

SIPreEmitPeephole.cpp

AMDGPU: Fix counting debug instructions in execz skip threshold

2023-08-02 08:09:41 -04:00

SIProgramInfo.cpp

[AMDGPU] Add backend support for new PAL ELF Metadata 3.0

2023-04-14 09:57:13 +01:00

SIProgramInfo.h

[AMDGPU] Add backend support for new PAL ELF Metadata 3.0

2023-04-14 09:57:13 +01:00

SIRegisterInfo.cpp

[AMDGPU][PEI] Set up SP for chain functions

2023-11-08 09:27:34 +01:00

SIRegisterInfo.h

[AMDGPU] Callee saves for amdgpu_cs_chain[_preserve] (#71526 )

2023-11-08 08:28:15 +01:00

SIRegisterInfo.td

[AMDGPU] make v32i16/v32f16 legal (#70484 )

2023-10-27 15:28:31 -07:00

SISchedule.td

[AMDGPU] Add gfx1150 SALU Float instructions (#66884 )

2023-09-21 11:22:15 +02:00

SIShrinkInstructions.cpp

[AMDGPU] Shrink to SOPK with 32-bit signed literals (#70263 )

2023-10-26 00:26:54 -07:00

SIWholeQuadMode.cpp

[AMDGPU] si-wqm: Skip only LiveMask COPY

2023-11-10 09:30:44 +01:00

SMInstructions.td

[AMDGPU] Fix operand definitions for atomic scalar memory instructions. (#71799 )

2023-11-10 14:00:46 +00:00

SOPInstructions.td

[AMDGPU] - Add s_wqm intrinsics (#71048 )

2023-11-03 14:48:59 +01:00

VIInstrFormats.td

…

VINTERPInstructions.td

…

VOP1Instructions.td

[AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (#70135 )

2023-10-25 10:50:53 -07:00

VOP2Instructions.td

[AMDGPU][NFC] Add True16 operand definitions.

2023-09-25 16:48:46 +01:00

VOP3Instructions.td

[AMDGPU] Select v_lshl_add_u32 instead of v_mul_lo_u32 by constant (#71035 )

2023-11-06 14:52:27 +01:00

VOP3PInstructions.td

[AMDGPU][NFC] Eliminate unnecessary TableGen casts. (#71802 )

2023-11-10 14:01:35 +00:00

VOPCInstructions.td

[AMDGPU] Add patterns for V_CMP_O/U (#69157 )

2023-10-16 13:07:56 +02:00

VOPDInstructions.td

[AMDGPU] Make VOPD insts with a FMAMK or FMAMK component have a fixed size

2023-08-14 13:32:41 +02:00

VOPInstructions.td

Reapply "[AMDGPU] Introduce real and keep fake True16 instructions."

2023-09-23 22:07:41 +01:00