Ulrich Weigand 84404f30b3 [SystemZ] Support execution hint instructions ...

This adds assembler support for the instructions provided by the
execution-hint facility (NIAI and BP(R)P).  This required adding
support for the new relocation types for 12-bit and 24-bit PC-
relative offsets used by the BP(R)P instructions.

llvm-svn: 288031

2016-11-28 14:01:51 +00:00

..

AArch64

AArch64: TableGenerate system instruction operands.

2016-07-05 21:23:04 +00:00

AMDGPU

[AMDGPU] Add f16 support (VI+)

2016-11-13 07:01:11 +00:00

ARM

[ARM] Saturation instructions are DSP-only

2016-07-25 22:25:25 +00:00

Hexagon

[Hexagon] Treat all conditional branches as predicted (not-taken by default)

2016-05-09 18:22:07 +00:00

Lanai

[lanai] Add Lanai backend.

2016-03-28 13:09:54 +00:00

Mips

[mips] Fix aui/daui/dahi/dati for MIPSR6

2016-10-14 09:31:42 +00:00

PowerPC

[PPC] add absolute difference altivec instructions and matching intrinsics

2016-10-31 19:47:52 +00:00

Sparc

This change adds co-processor condition branching and conditional traps to the Sparc back-end.

2016-03-09 18:20:21 +00:00

SystemZ

[SystemZ] Support execution hint instructions

2016-11-28 14:01:51 +00:00

X86

[AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd.

2016-11-13 19:58:18 +00:00

XCore

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