The register list in vscclrm is unusual in three ways: * The encoded size can be zero, meaning the list contains only vpr. * Double-precision registers past d15 are permitted even when the subtarget doesn't have them, they are instead ignored when the instruction executes. * The single-precision variant allows double-precision registers d16 onwards, which are encoded as a pair of single-precision registers. Fixing this also incidentally changes a vlldm/vlstm error message: when the first register is in the range d16-d31 we now get the "operand must be exactly..." error instead of "register expected".
58 KiB
58 KiB