2647bd7369
```
SelectionDAG has 17 nodes:
t0: ch,glue = EntryToken
t6: i64,ch = CopyFromReg t0, Register:i64 %2
t8: i1 = truncate t6
t4: i64,ch = CopyFromReg t0, Register:i64 %1
t7: i1 = truncate t4
t2: i64,ch = CopyFromReg t0, Register:i64 %0
t10: i64,i1 = saddo t2, Constant:i64<1>
t11: i1 = or t8, t10:1
t12: i1 = select t7, t8, t11
t13: i64 = any_extend t12
t15: ch,glue = CopyToReg t0, Register:i64 $x10, t13
t16: ch = RISCVISD::RET_GLUE t15, Register:i64 $x10, t15:1
```
`OtherOpVT` should be i1, but `OtherOp->getValueType(0)` returns `i64`,
which ignores `ResNo` in `SDValue`.
Fix https://github.com/llvm/llvm-project/issues/90652.
20 lines
634 B
LLVM
20 lines
634 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
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define i1 @test(i64 %x, i1 %cond1, i1 %cond2) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addi a3, a0, 1
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; CHECK-NEXT: slt a0, a3, a0
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; CHECK-NEXT: not a1, a1
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; CHECK-NEXT: and a0, a1, a0
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; CHECK-NEXT: or a0, a2, a0
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; CHECK-NEXT: ret
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entry:
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%sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %x, i64 1)
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%ov = extractvalue { i64, i1 } %sadd, 1
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%or = or i1 %cond2, %ov
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%sel = select i1 %cond1, i1 %cond2, i1 %or
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ret i1 %sel
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}
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