Tim Northover aa3cf1e691 Intrinsics: expand semantics of LLVMExtendedVectorType (& trunc) ...

These are used in the ARM backends to aid type-checking on patterns involving
intrinsics. By making sure one argument is an extended/truncated version of
another.

However, there's no reason to limit them to just vectors types. For example
AArch64 has the instruction "uqshrn sD, dN, #imm" which would naturally use an
intrinsic taking an i64 and returning an i32.

llvm-svn: 205003

2014-03-28 12:31:39 +00:00

22 KiB

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