This patch is mechanically generated by clang-llvm-rename tool that I wrote using Clang Refactoring Engine just for creating this patch. You can see the source code of the tool at https://reviews.llvm.org/D64123. There's no manual post-processing; you can generate the same patch by re-running the tool against lld's code base. Here is the main discussion thread to change the LLVM coding style: https://lists.llvm.org/pipermail/llvm-dev/2019-February/130083.html In the discussion thread, I proposed we use lld as a testbed for variable naming scheme change, and this patch does that. I chose to rename variables so that they are in camelCase, just because that is a minimal change to make variables to start with a lowercase letter. Note to downstream patch maintainers: if you are maintaining a downstream lld repo, just rebasing ahead of this commit would cause massive merge conflicts because this patch essentially changes every line in the lld subdirectory. But there's a remedy. clang-llvm-rename tool is a batch tool, so you can rename variables in your downstream repo with the tool. Given that, here is how to rebase your repo to a commit after the mass renaming: 1. rebase to the commit just before the mass variable renaming, 2. apply the tool to your downstream repo to mass-rename variables locally, and 3. rebase again to the head. Most changes made by the tool should be identical for a downstream repo and for the head, so at the step 3, almost all changes should be merged and disappear. I'd expect that there would be some lines that you need to merge by hand, but that shouldn't be too many. Differential Revision: https://reviews.llvm.org/D64121 llvm-svn: 365595
182 lines
5.5 KiB
C++
182 lines
5.5 KiB
C++
//===- Target.cpp ---------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Machine-specific things, such as applying relocations, creation of
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// GOT or PLT entries, etc., are handled in this file.
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//
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// Refer the ELF spec for the single letter variables, S, A or P, used
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// in this file.
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//
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// Some functions defined in this file has "relaxTls" as part of their names.
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// They do peephole optimization for TLS variables by rewriting instructions.
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// They are not part of the ABI but optional optimization, so you can skip
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// them if you are not interested in how TLS variables are optimized.
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// See the following paper for the details.
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//
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// Ulrich Drepper, ELF Handling For Thread-Local Storage
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// http://www.akkadia.org/drepper/tls.pdf
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//
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//===----------------------------------------------------------------------===//
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#include "Target.h"
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#include "InputFiles.h"
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#include "OutputSections.h"
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#include "SymbolTable.h"
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#include "Symbols.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Object/ELF.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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const TargetInfo *elf::target;
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std::string lld::toString(RelType type) {
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StringRef s = getELFRelocationTypeName(elf::config->emachine, type);
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if (s == "Unknown")
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return ("Unknown (" + Twine(type) + ")").str();
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return s;
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}
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TargetInfo *elf::getTarget() {
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switch (config->emachine) {
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case EM_386:
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case EM_IAMCU:
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return getX86TargetInfo();
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case EM_AARCH64:
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return getAArch64TargetInfo();
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case EM_AMDGPU:
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return getAMDGPUTargetInfo();
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case EM_ARM:
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return getARMTargetInfo();
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case EM_AVR:
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return getAVRTargetInfo();
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case EM_HEXAGON:
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return getHexagonTargetInfo();
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case EM_MIPS:
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switch (config->ekind) {
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case ELF32LEKind:
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return getMipsTargetInfo<ELF32LE>();
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case ELF32BEKind:
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return getMipsTargetInfo<ELF32BE>();
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case ELF64LEKind:
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return getMipsTargetInfo<ELF64LE>();
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case ELF64BEKind:
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return getMipsTargetInfo<ELF64BE>();
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default:
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llvm_unreachable("unsupported MIPS target");
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}
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case EM_MSP430:
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return getMSP430TargetInfo();
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case EM_PPC:
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return getPPCTargetInfo();
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case EM_PPC64:
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return getPPC64TargetInfo();
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case EM_RISCV:
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return getRISCVTargetInfo();
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case EM_SPARCV9:
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return getSPARCV9TargetInfo();
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case EM_X86_64:
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return getX86_64TargetInfo();
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}
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llvm_unreachable("unknown target machine");
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}
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template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *loc) {
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for (InputSectionBase *d : inputSections) {
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auto *isec = cast<InputSection>(d);
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if (!isec->getParent())
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continue;
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uint8_t *isecLoc = Out::bufferStart + isec->getParent()->offset + isec->outSecOff;
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if (isecLoc <= loc && loc < isecLoc + isec->getSize())
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return {isec, isec->template getLocation<ELFT>(loc - isecLoc) + ": "};
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}
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return {};
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}
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ErrorPlace elf::getErrorPlace(const uint8_t *loc) {
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switch (config->ekind) {
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case ELF32LEKind:
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return getErrPlace<ELF32LE>(loc);
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case ELF32BEKind:
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return getErrPlace<ELF32BE>(loc);
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case ELF64LEKind:
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return getErrPlace<ELF64LE>(loc);
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case ELF64BEKind:
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return getErrPlace<ELF64BE>(loc);
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default:
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llvm_unreachable("unknown ELF type");
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}
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}
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TargetInfo::~TargetInfo() {}
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int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const {
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return 0;
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}
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bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; }
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bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file,
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uint64_t branchAddr, const Symbol &s) const {
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return false;
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}
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bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end,
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uint8_t stOther) const {
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llvm_unreachable("Target doesn't support split stacks.");
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}
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bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
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return true;
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}
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void TargetInfo::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
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writeGotPlt(buf, s);
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}
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RelExpr TargetInfo::adjustRelaxExpr(RelType type, const uint8_t *data,
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RelExpr expr) const {
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return expr;
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}
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void TargetInfo::relaxGot(uint8_t *loc, RelType type, uint64_t val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsGdToLe(uint8_t *loc, RelType type,
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uint64_t val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsGdToIe(uint8_t *loc, RelType type,
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uint64_t val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsIeToLe(uint8_t *loc, RelType type,
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uint64_t val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsLdToLe(uint8_t *loc, RelType type,
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uint64_t val) const {
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llvm_unreachable("Should not have claimed to be relaxable");
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}
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uint64_t TargetInfo::getImageBase() const {
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// Use -image-base if set. Fall back to the target default if not.
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if (config->imageBase)
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return *config->imageBase;
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return config->isPic ? 0 : defaultImageBase;
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}
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