Tim Northover 2f553f326a FastISel: constrain the RegClass of operands when emitting instructions. ...

ARM64 suffered multiple -verify-machineinstr failures (principally over the
xsp/xzr issue) because FastISel was completely ignoring which subset of the
general-purpose registers each instruction required.

More fixes are coming in ARM64 specific FastISel, but this should cover the
generic problems.

llvm-svn: 206283

2014-04-15 13:59:49 +00:00

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