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Simon Pilgrim 1603106725 [TargetLowering] Improve expandFunnelShift shift amount masking 
For the 'inverse shift', we currently always perform a subtraction of the original (masked) shift amount.

But for the case where we are handling power-of-2 type widths, we can replace:

(sub bw-1, (and amt, bw-1) ) -> (and (xor amt, bw-1), bw-1) -> (and ~amt, bw-1)

This allows x86 shifts to fold away the and-mask.

Followup to D77301 + D80466.

http://volta.cs.utah.edu:8080/z/Nod0Gr

Differential Revision: https://reviews.llvm.org/D80489
2020-05-24 11:25:09 +01:00
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Fix typos encountered while working on pass pipeline for O1.
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2012-02-23-mmx-inlineasm.ll
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2012-02-29-CoalescerBug.ll
…
2012-03-15-build_vector_wl.ll
…
2012-03-20-LargeConstantExpr.ll
…
2012-03-26-PostRALICMBug.ll
…
2012-04-09-TwoAddrPassBug.ll
…
2012-04-26-sdglue.ll
…
2012-05-17-TwoAddressBug.ll
…
2012-05-19-CoalescerCrash.ll
…
2012-07-10-extload64.ll
…
2012-07-10-shufnorm.ll
…
2012-07-15-broadcastfold.ll
…
2012-07-15-BuildVectorPromote.ll
…
2012-07-15-tconst_shl.ll
…
2012-07-15-vshl.ll
…
2012-07-16-fp2ui-i1.ll
…
2012-07-16-LeaUndef.ll
…
2012-07-17-vtrunc.ll
…
2012-07-23-select_cc.ll
…
2012-08-07-CmpISelBug.ll
…
2012-08-16-setcc.ll
…
2012-08-17-legalizer-crash.ll
…
2012-08-28-UnsafeMathCrash.ll
…
2012-09-13-dagco-fneg.ll
…
2012-09-28-CGPBug.ll
…
2012-10-02-DAGCycle.ll
…
2012-10-03-DAGCycle.ll
…
2012-10-18-crash-dagco.ll
…
2012-11-28-merge-store-alias.ll
…
2012-12-1-merge-multiple.ll
…
2012-12-12-DAGCombineCrash.ll
…
2012-12-14-v8fp80-crash.ll
…
2012-12-19-NoImplicitFloat.ll
…
2013-01-09-DAGCombineBug.ll
…
2013-03-13-VEX-DestReg.ll
…
2013-05-06-ConactVectorCrash.ll
…
2013-10-14-FastISel-incorrect-vreg.ll
…
2014-05-29-factorial.ll
…
2014-08-29-CompactUnwind.ll
…
9601.ll
…
20090313-signext.ll
…
abi-isel.ll
…
absolute-bit-mask-fastisel.ll
…
absolute-bit-mask.ll
…
absolute-bt.ll
…
absolute-cmp.ll
…
absolute-constant.ll
…
absolute-rotate.ll
…
add32ri8.ll
…
add_shl_constant.ll
…
add-ext.ll
…
add-i64.ll
…
add-of-carry.ll
…
add-sub-nsw-nuw.ll
…
add.ll
…
addcarry2.ll
…
addcarry.ll
…
addr-label-difference.ll
…
addr-mode-matcher-2.ll
…
addr-mode-matcher.ll
…
addr-of-ret-addr.ll
…
address-type-promotion-constantexpr.ll
…
addrsig.ll
…
addsub-constant-folding.ll
…
adx-commute.mir
…
adx-intrinsics-upgrade.ll
…
adx-intrinsics.ll
…
aes_intrinsics.ll
…
alias-gep.ll
…
alias-static-alloca.ll
…
aliases.ll
…
align-branch-boundary-default.ll
…
align-branch-boundary-noautopadding.ll
…
align-branch-boundary-suppressions-tls.ll
…
align-branch-boundary-suppressions.ll
…
align-down-const.ll
…
align-down.ll
…
aligned-comm.ll
…
aligned-variadic.ll
…
alignment-2.ll
…
alignment.ll
…
all-ones-vector.ll
…
alldiv-divdi3.ll
…
alloca-align-rounding-32.ll
…
alloca-align-rounding.ll
…
alloca-overaligned.ll
…
allrem-moddi3.ll
…
and-encoding.ll
…
and-load-fold.ll
…
and-or-fold.ll
…
and-sink.ll
…
and-su.ll
…
andimm8.ll
…
anyext.ll
…
anyregcc-crash.ll
…
anyregcc.ll
…
apm.ll
…
AppendingLinkage.ll
…
arg_returned_bitcast.ll
…
arg-cast.ll
…
arg-copy-elide-win64.ll
…
arg-copy-elide.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
asm-block-labels.ll
…
asm-global-imm.ll
…
asm-indirect-mem.ll
…
asm-invalid-register-class-crasher.ll
…
asm-label2.ll
…
asm-label.ll
…
asm-mismatched-types.ll
…
asm-modifier2.ll
[tests] Speculative fix for buildbot breakage from c5f7c039ef
2020-04-30 22:04:53 -04:00
asm-modifier-P.ll
…
asm-modifier.ll
[tests] Revert unhelpful change from d73eed42d1
2020-04-30 22:18:54 -04:00
asm-reg-type-mismatch-avx512.ll
…
asm-reg-type-mismatch.ll
…
asm-reject-reg-type-mismatch.ll
[X86] Only allow f32, f64, or f80 to be used with 'f' inline assembly constraint.
2020-05-13 13:27:13 -07:00
asm-reject-rex.ll
…
asm-reject-vk32-vk64.ll
…
asm-reject-xmm16.ll
…
atom-call-reg-indirect-foldedreload32.ll
…
atom-call-reg-indirect-foldedreload64.ll
…
atom-call-reg-indirect.ll
…
atom-cmpb.ll
…
atom-fixup-lea1.ll
…
atom-fixup-lea2.ll
…
atom-fixup-lea3.ll
…
atom-fixup-lea4.ll
…
atom-lea-addw-bug.ll
…
atom-lea-sp.ll
…
atom-pad-short-functions.ll
…
atom-sched.ll
…
atom-shuf.ll
…
atomic8.ll
…
atomic16.ll
…
atomic32.ll
…
atomic64.ll
…
atomic128.ll
…
atomic6432.ll
…
atomic-add.ll
…
atomic-dagsched.ll
…
atomic-eflags-reuse.ll
…
atomic-flags.ll
…
atomic-fp.ll
…
atomic-idempotent.ll
…
atomic-load-store-wide.ll
…
atomic-load-store.ll
…
atomic-mi.ll
…
atomic-minmax-i6432.ll
…
atomic-monotonic.ll
…
atomic-non-integer-fp128.ll
…
atomic-non-integer.ll
…
atomic-op.ll
…
atomic-ops-ancient-64.ll
…
atomic-or.ll
…
atomic-pointer.ll
…
atomic-unordered.ll
…
atomicf128.ll
…
Atomics-64.ll
…
attribute-sections.ll
…
avg-mask.ll
…
avg.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
avoid_complex_am.ll
…
avoid-lea-scale2.ll
…
avoid-loop-align-2.ll
…
avoid-loop-align.ll
…
avoid-sfb-g-no-change2.mir
…
avoid-sfb-g-no-change3.mir
…
avoid-sfb-g-no-change.mir
…
avoid-sfb-kill-flags.mir
…
avoid-sfb-offset.mir
…
avoid-sfb-overlaps.ll
…
avoid-sfb.ll
…
avx1-logical-load-folding.ll
…
avx2-arith.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
avx2-cmp.ll
…
avx2-conversions.ll
…
avx2-fma-fneg-combine.ll
…
avx2-gather.ll
…
avx2-intrinsics-canonical.ll
…
avx2-intrinsics-fast-isel.ll
…
avx2-intrinsics-x86-upgrade.ll
…
avx2-intrinsics-x86.ll
…
avx2-logic.ll
…
avx2-masked-gather.ll
…
avx2-nontemporal.ll
…
avx2-phaddsub.ll
…
avx2-pmovxrm.ll
…
avx2-shift.ll
…
avx2-vbroadcast.ll
[SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment.
2020-05-11 17:39:00 -07:00
avx2-vbroadcasti128.ll
…
avx2-vector-shifts.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
avx2-vperm.ll
…
avx512-adc-sbb.ll
…
avx512-any_extend_load.ll
…
avx512-arith.ll
…
avx512-broadcast-unfold.ll
…
avx512-bugfix-23634.ll
…
avx512-bugfix-25270.ll
…
avx512-bugfix-26264.ll
…
avx512-build-vector.ll
…
avx512-calling-conv.ll
…
avx512-cmp-kor-sequence.ll
…
avx512-cmp-mask.ll
…
avx512-cmp.ll
…
avx512-cvt.ll
…
avx512-cvttp2i.ll
…
avx512-ext.ll
…
avx512-extract-subvector-load-store.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
avx512-extract-subvector.ll
…
avx512-fma-commute.ll
…
avx512-fma-intrinsics-upgrade.ll
…
avx512-fma-intrinsics.ll
…
avx512-fma.ll
…
avx512-fsel.ll
…
avx512-gather-scatter-intrin-deprecated.ll
…
avx512-gather-scatter-intrin.ll
…
avx512-gfni-intrinsics.ll
…
avx512-hadd-hsub.ll
…
avx512-i1test.ll
…
avx512-inc-dec.ll
…
avx512-insert-extract_i1.ll
…
avx512-insert-extract.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
avx512-intel-ocl.ll
[SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment.
2020-05-11 17:39:00 -07:00
avx512-intrinsics-canonical.ll
…
avx512-intrinsics-fast-isel.ll
…
avx512-intrinsics-upgrade.ll
[X86] getShuffleScalarElt - add CONCAT_VECTORS/INSERT_VECTOR_ELT support.
2020-05-06 18:13:33 +01:00
avx512-intrinsics-x86_64.ll
…
avx512-intrinsics.ll
…
avx512-load-store.ll
…
avx512-load-trunc-store-i1.ll
…
avx512-logic.ll
…
avx512-mask-op.ll
…
avx512-mask-spills.ll
…
avx512-mask-zext-bugfix.ll
…
avx512-masked_memop-16-8.ll
…
avx512-masked-memop-64-32.ll
…
avx512-memfold.ll
…
avx512-mov.ll
…
avx512-nontemporal.ll
…
avx512-pmovxrm.ll
…
avx512-regcall-Mask.ll
…
avx512-regcall-NoMask.ll
…
avx512-rndscale.ll
…
avx512-rotate.ll
…
avx512-scalar_mask.ll
…
avx512-scalar.ll
…
avx512-scalarIntrinsics.ll
…
avx512-select.ll
…
avx512-shift.ll
…
avx512-skx-insert-subvec.ll
…
avx512-trunc.ll
…
avx512-unsafe-fp-math.ll
…
avx512-vbroadcast.ll
…
avx512-vbroadcasti128.ll
…
avx512-vbroadcasti256.ll
…
avx512-vec3-crash.ll
…
avx512-vec-cmp.ll
[X86][SSE] Canonicalize UNARYSHUFFLE(XOR(X,-1) -> XOR(UNARYSHUFFLE(X),-1)
2020-04-30 19:18:51 +01:00
avx512-vpclmulqdq.ll
…
avx512-vpermv3-commute.ll
…
avx512-vpternlog-commute.ll
…
avx512-vselect-crash.ll
…
avx512-vselect.ll
…
avx512bf16-intrinsics.ll
…
avx512bf16-vl-intrinsics.ll
…
avx512bw-arith.ll
…
avx512bw-intrinsics-canonical.ll
…
avx512bw-intrinsics-fast-isel.ll
…
avx512bw-intrinsics-upgrade.ll
…
avx512bw-intrinsics.ll
…
avx512bw-mask-op.ll
…
avx512bw-mov.ll
…
avx512bw-vec-cmp.ll
…
avx512bw-vec-test-testn.ll
…
avx512bwvl-arith.ll
…
avx512bwvl-intrinsics-canonical.ll
…
avx512bwvl-intrinsics-fast-isel.ll
…
avx512bwvl-intrinsics-upgrade.ll
…
avx512bwvl-intrinsics.ll
…
avx512bwvl-mov.ll
…
avx512bwvl-vec-cmp.ll
…
avx512bwvl-vec-test-testn.ll
…
avx512cd-intrinsics-fast-isel.ll
…
avx512cd-intrinsics-upgrade.ll
…
avx512cd-intrinsics.ll
…
avx512cdvl-intrinsics-upgrade.ll
…
avx512cdvl-intrinsics.ll
…
avx512dq-intrinsics-fast-isel.ll
…
avx512dq-intrinsics-upgrade.ll
…
avx512dq-intrinsics.ll
…
avx512dq-mask-op.ll
…
avx512dqvl-intrinsics-fast-isel.ll
…
avx512dqvl-intrinsics-upgrade.ll
…
avx512dqvl-intrinsics.ll
…
avx512er-intrinsics.ll
…
avx512f-256-set0.mir
…
avx512f-vec-test-testn.ll
…
avx512ifma-intrinsics-fast-isel.ll
…
avx512ifma-intrinsics-upgrade.ll
…
avx512ifma-intrinsics.ll
…
avx512ifmavl-intrinsics-fast-isel.ll
…
avx512ifmavl-intrinsics-upgrade.ll
…
avx512ifmavl-intrinsics.ll
…
avx512vbmi2-funnel-shifts.ll
…
avx512vbmi2-intrinsics-fast-isel.ll
…
avx512vbmi2-intrinsics-upgrade.ll
…
avx512vbmi2-intrinsics.ll
…
avx512vbmi2vl-funnel-shifts.ll
…
avx512vbmi2vl-intrinsics-fast-isel.ll
…
avx512vbmi2vl-intrinsics-upgrade.ll
…
avx512vbmi2vl-intrinsics.ll
…
avx512vbmi-intrinsics-fast-isel.ll
…
avx512vbmi-intrinsics-upgrade.ll
…
avx512vbmi-intrinsics.ll
…
avx512vbmivl-intrinsics-fast-isel.ll
…
avx512vbmivl-intrinsics-upgrade.ll
…
avx512vbmivl-intrinsics.ll
…
avx512vl_vnni-intrinsics-upgrade.ll
…
avx512vl_vnni-intrinsics.ll
…
avx512vl-arith.ll
…
avx512vl-intrinsics-canonical.ll
…
avx512vl-intrinsics-fast-isel.ll
…
avx512vl-intrinsics-upgrade.ll
[X86] getShuffleScalarElt - add CONCAT_VECTORS/INSERT_VECTOR_ELT support.
2020-05-06 18:13:33 +01:00
avx512vl-intrinsics.ll
…
avx512vl-logic.ll
…
avx512vl-mov.ll
…
avx512vl-nontemporal.ll
…
avx512vl-vbroadcast.ll
…
avx512vl-vec-cmp.ll
…
avx512vl-vec-masked-cmp.ll
…
avx512vl-vec-test-testn.ll
…
avx512vl-vpclmulqdq.ll
…
avx512vlcd-intrinsics-fast-isel.ll
…
avx512vlvp2intersect-intrinsics.ll
…
avx512vnni-intrinsics-upgrade.ll
…
avx512vnni-intrinsics.ll
…
avx512vnni.ll
…
avx512vp2intersect-intrinsics.ll
…
avx512vpopcntdq-intrinsics.ll
…
avx-arith.ll
…
avx-basic.ll
…
avx-bitcast.ll
…
avx-brcond.ll
…
avx-cast.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
avx-cmp.ll
…
avx-cvt-2.ll
…
avx-cvt-3.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
avx-cvt.ll
…
avx-cvttp2si.ll
…
avx-fp2int.ll
…
avx-gfni-intrinsics.ll
…
avx-insertelt.ll
…
avx-intel-ocl.ll
…
avx-intrinsics-fast-isel.ll
…
avx-intrinsics-x86_64.ll
…
avx-intrinsics-x86-upgrade.ll
…
avx-intrinsics-x86.ll
…
avx-isa-check.ll
…
avx-load-store.ll
…
avx-logic.ll
…
avx-minmax.ll
…
avx-select.ll
…
avx-shift.ll
[DAGCombiner] sink target-supported FP<->int cast op after concat vectors
2020-05-06 10:25:58 -04:00
avx-shuffle-x86_32.ll
…
avx-splat.ll
…
avx-trunc.ll
…
avx-unpack.ll
…
avx-varargs-x86_64.ll
…
avx-vbroadcast.ll
…
avx-vbroadcastf128.ll
…
avx-vextractf128.ll
…
avx-vinsertf128.ll
…
avx-vpclmulqdq.ll
…
avx-vperm2x128.ll
[X86][AVX] Use X86ISD::VPERM2X128 for blend-with-zero if optimizing for size
2020-05-12 13:03:50 +01:00
avx-vzeroupper.ll
…
avx-win64-args.ll
…
avx-win64.ll
…
avx.ll
…
backpropmask.ll
…
bad-tls-fold.mir
…
barrier-sse.ll
…
barrier.ll
…
base-pointer-and-cmpxchg.ll
…
basic-promote-integers.ll
…
basicblock-sections-clusters-branches.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-clusters-eh.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-clusters-error.ll
…
basicblock-sections-clusters.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-cold.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-directjumps.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-eh.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-labels.ll
…
basicblock-sections-list.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-listbb.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-mir-parse.mir
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
basicblock-sections-mir-print.ll
…
basicblock-sections.ll
Descriptive symbol names for machine basic block sections.
2020-05-04 19:06:43 +00:00
bb_rotate.ll
…
bc-extract.ll
…
bigstructret2.ll
…
bigstructret.ll
…
bit-piece-comment.ll
…
bit-test-shift.ll
…
bitcast2.ll
…
bitcast-and-setcc-128.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-and-setcc-256.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-and-setcc-512.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-i256.ll
…
bitcast-int-to-vector-bool-sext.ll
…
bitcast-int-to-vector-bool-zext.ll
…
bitcast-int-to-vector-bool.ll
…
bitcast-int-to-vector.ll
…
bitcast-mmx.ll
…
bitcast-setcc-128.ll
…
bitcast-setcc-256.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-setcc-512.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
bitcast-vector-bool.ll
[DAG] SimplifyMultipleUseDemandedBits - remove superfluous bitcasts
2020-05-08 19:04:49 +01:00
bitcast.ll
…
bitcnt-false-dep.ll
…
bitreverse.ll
…
block-placement.ll
…
block-placement.mir
…
bmi2-x86_64.ll
…
bmi2.ll
…
bmi-intrinsics-fast-isel-x86_64.ll
…
bmi-intrinsics-fast-isel.ll
…
bmi-x86_64.ll
…
bmi.ll
…
bool-ext-inc.ll
…
bool-math.ll
…
bool-simplify.ll
…
bool-vector.ll
…
bool-zext.ll
…
br-fold.ll
…
branchfolding-catchpads.ll
…
branchfolding-debug-invariant.mir
…
branchfolding-debugloc.ll
…
branchfolding-ehpad.mir
Don't jump to landing pads in Control Flow Optimizer
2020-05-21 15:19:10 -07:00
branchfolding-landingpads.ll
…
branchfolding-undef.mir
…
brcond.ll
…
break-anti-dependencies.ll
…
break-false-dep.ll
…
broadcast-elm-cross-splat-vec.ll
…
broadcastm-lowering.ll
…
bss_pagealigned.ll
…
bswap_tree2.ll
…
bswap_tree.ll
…
bswap-inline-asm.ll
…
bswap-rotate.ll
…
bswap-vector.ll
…
bswap-wide-int.ll
…
bswap.ll
…
bt.ll
…
btc_bts_btr.ll
…
btq.ll
…
bug26810.ll
…
bug37521.ll
…
build-vector-128.ll
…
build-vector-256.ll
…
build-vector-512.ll
…
buildvec-extract.ll
[X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level
2020-04-26 15:31:01 +01:00
buildvec-insertvec.ll
[X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level
2020-04-26 15:31:01 +01:00
bypass-slow-division-32.ll
…
bypass-slow-division-64.ll
…
bypass-slow-division-tune.ll
[x86] Enable bypassing 64-bit division on generic x86-64
2020-04-29 16:55:48 +01:00
byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval-align.ll
…
byval-callee-cleanup.ll
…
byval.ll
…
cache-intrinsic.ll
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call-imm.ll
…
call-push.ll
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call-site-info-output.ll
…
callbr-asm-bb-exports.ll
…
callbr-asm-blockplacement.ll
…
callbr-asm-branch-folding.ll
…
callbr-asm-destinations.ll
…
callbr-asm-errors.ll
…
callbr-asm-label-addr.ll
…
callbr-asm-obj-file.ll
…
callbr-asm-outputs-pred-succ.ll
…
callbr-asm-outputs.ll
…
callbr-asm.ll
…
callbr-codegenprepare.ll
Change callbr to only define its output SSA variable on the normal
2020-04-23 19:36:44 -04:00
cas.ll
…
cast-vsel.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
catch.ll
…
catchpad-dynamic-alloca.ll
…
catchpad-lifetime.ll
…
catchpad-realign-savexmm.ll
…
catchpad-regmask.ll
…
catchpad-reuse.ll
…
catchpad-weight.ll
…
catchret-empty-fallthrough.ll
…
catchret-fallthrough.ll
…
catchret-regmask.ll
…
cfguard-checks.ll
…
cfguard-module-flag.ll
…
cfguard-x86-64-vectorcall.ll
…
cfguard-x86-vectorcall.ll
…
cfi-epilogue-with-return.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-epilogue-without-return.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-callee-save-register-2.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-callee-save-register.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-cfg-with-merge.mir
…
cfi-inserter-check-order.ll
…
cfi-inserter-noreturnblock.mir
…
cfi-inserter-verify-inconsistent-csr.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-verify-inconsistent-loc.mir
Recommit "Generate Callee Saved Register (CSR) related cfi directives
2020-04-27 12:46:58 -07:00
cfi-inserter-verify-inconsistent-offset.mir
…
cfi-inserter-verify-inconsistent-register.mir
…
cfi-xmm.ll
…
cfi.ll
…
cfstring.ll
…
cgp-usubo.ll
…
chain_order.ll
…
change-compare-stride-1.ll
…
change-compare-stride-trickiness-0.ll
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change-compare-stride-trickiness-1.ll
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change-compare-stride-trickiness-2.ll
…
change-unsafe-fp-math.ll
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cldemote-intrinsic.ll
…
cleanuppad-inalloca.ll
…
cleanuppad-large-codemodel.ll
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cleanuppad-realign.ll
…
clear_upper_vector_element_bits.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
clear-highbits.ll
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clear-lowbits.ll
…
clflushopt.ll
…
clwb.ll
…
clz.ll
…
clzero.ll
…
cmov-double.ll
…
cmov-fp.ll
…
cmov-into-branch.ll
…
cmov-promotion.ll
…
cmov.ll
…
cmovcmov.ll
…
cmp-fast-isel.ll
…
cmp.ll
…
cmpxchg8b_alloca_regalloc_handling.ll
…
cmpxchg8b.ll
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cmpxchg16b.ll
…
cmpxchg-clobber-flags.ll
…
cmpxchg-i1.ll
…
cmpxchg-i128-i1.ll
…
coal-sections.ll
…
coalesce_commute_movsd.ll
…
coalesce_commute_subreg.ll
…
coalesce-dbg-value-subreg-rewrite.mir
…
coalesce-dead-lanes.mir
…
coalesce-esp.ll
…
coalesce-implicitdef.ll
…
coalescer-commute1.ll
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coalescer-commute2.ll
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coalescer-commute3.ll
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coalescer-commute4.ll
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coalescer-commute5.ll
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coalescer-cross.ll
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coalescer-dce2.ll
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coalescer-dce.ll
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coalescer-identity.ll
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coalescer-remat.ll
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coalescer-subreg.ll
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coalescer-win64.ll
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code_placement_align_all.ll
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code_placement_cold_loop_blocks.ll
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code_placement_eh.ll
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code_placement_ignore_succ_in_inner_loop.ll
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code_placement_loop_rotation2.ll
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code_placement_loop_rotation3.ll
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code_placement_loop_rotation.ll
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code_placement_no_header_change.ll
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code_placement.ll
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code-model-elf-memset.ll
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code-model-elf.ll
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code-model-kernel.ll
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codegen-prepare-addrmode-sext.ll
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codegen-prepare-cast.ll
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codegen-prepare-collapse.ll
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codegen-prepare-crash.ll
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codegen-prepare-extload.ll
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codegen-prepare-replacephi2.mir
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codegen-prepare-replacephi.mir
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codegen-prepare-uaddo.ll
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codegen-prepare.ll
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codemodel.ll
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coff-comdat2.ll
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coff-comdat3.ll
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coff-comdat.ll
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coff-feat00.ll
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coff-fp-section-name.ll
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coff-linkonce.ll
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coff-no-dead-strip.ll
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coff-weak.ll
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coldcc64.ll
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combine-64bit-vec-binop.ll
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combine-abs.ll
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combine-adc.ll
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combine-add-ssat.ll
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combine-add-usat.ll
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combine-add.ll
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combine-addo.ll
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combine-adx.ll
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combine-and.ll
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combine-avx2-intrinsics.ll
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combine-avx-intrinsics.ll
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combine-bextr.ll
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combine-bitreverse.ll
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combine-bitselect.ll
[X86] Improving folding of concat_vectors of subvectors from the same broadcast
2020-05-01 11:23:10 +01:00
combine-bswap.ll
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combine-concatvectors.ll
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combine-fabs.ll
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combine-fcopysign.ll
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combine-lds.ll
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combine-mul.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
combine-mulo.ll
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combine-multiplies.ll
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combine-or.ll
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combine-pmuldq.ll
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combine-ptest.ll
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combine-rotates.ll
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combine-sbb.ll
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combine-sdiv.ll
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combine-select.ll
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combine-sext-in-reg.ll
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combine-shl.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
combine-smax.ll
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combine-smin.ll
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combine-sra.ll
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combine-srem.ll
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combine-srl.ll
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combine-sse41-intrinsics.ll
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combine-sub-ssat.ll
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combine-sub-usat.ll
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combine-sub.ll
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combine-subo.ll
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combine-testm-and.ll
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combine-testpd.ll
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combine-testps.ll
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combine-udiv.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
combine-umax.ll
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combine-umin.ll
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combine-urem.ll
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combineIncDecVector-crash.ll
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commandline-metadata.ll
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commute-3dnow.ll
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commute-blend-avx2.ll
…
commute-blend-sse41.ll
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commute-clmul.ll
…
commute-fcmp.ll
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commute-intrinsic.ll
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commute-two-addr.ll
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commute-vpclmulqdq-avx512.ll
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commute-vpclmulqdq-avx.ll
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commute-xop.ll
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commuted-blend-mask.ll
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compact-unwind.ll
…
compare_folding.ll
…
compare-add.ll
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compare-global.ll
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compare-inf.ll
…
compiler_used.ll
…
complex-asm.ll
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complex-fastmath.ll
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complex-fca.ll
…
computeKnownBits_urem.ll
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concat-cast.ll
[X86] Add AVX512VL concat-cast tests.
2020-05-07 15:08:17 +01:00
condbr_if.ll
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condbr_switch.ll
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conditional-indecrement.ll
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conditional-tailcall-pgso.ll
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conditional-tailcall-samedest.mir
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conditional-tailcall.ll
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consecutive-load-shuffle.ll
…
const-base-addr.ll
…
const-shift-of-constmasked.ll
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constant-combines.ll
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constant-hoisting-and.ll
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constant-hoisting-bfi.ll
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constant-hoisting-cmp.ll
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constant-hoisting-optnone.ll
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constant-hoisting-shift-immediate.ll
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constant-pool-remat-0.ll
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constant-pool-sharing.ll
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constpool.ll
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constrained-fp80-trunc-ext.ll
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constructor.ll
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convert-2-addr-3-addr-inc64.ll
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copy-eflags-liveinlists.mir
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copy-eflags.ll
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copy-propagation.ll
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copysign-constant-magnitude.ll
…
cpus-amd-no-x86_64.ll
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cpus-amd.ll
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cpus-intel-no-x86_64.ll
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cpus-intel.ll
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cpus-no-x86_64.ll
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cpus-other.ll
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crash-lre-eliminate-dead-def.ll
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crash-nosse.ll
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crash-O0.ll
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crash.ll
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critical-anti-dep-breaker.ll
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critical-edge-split-2.ll
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cse-add-with-overflow.ll
…
csr-split.ll
…
cstring.ll
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ctor-priority-coff.ll
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ctpop-combine.ll
…
cvt16.ll
…
cvtv2f32.ll
…
cxx_tlscc64.ll
…
dag-fmf-cse.ll
…
dag-merge-fast-accesses.ll
…
dag-optnone.ll
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dag-rauw-cse.ll
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dag-update-nodetomatch.ll
…
dagcombine-and-setcc.ll
…
dagcombine-buildvector.ll
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dagcombine-cse.ll
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dagcombine-select.ll
…
dagcombine-shifts.ll
…
dagcombine-tokenfactor-limit-crash.ll
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dagcombine-unsafe-math.ll
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darwin-bzero.ll
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darwin-no-dead-strip.ll
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darwin-preemption.ll
…
darwin-quote.ll
…
darwin-tls.ll
…
dbg-baseptr.ll
…
dbg-changes-codegen-branch-folding2.mir
…
dbg-changes-codegen-branch-folding.ll
…
dbg-changes-codegen.ll
…
dbg-combine.ll
…
dbg-line-0-no-discriminator.ll
…
dbg-value-func-arg.ll
…
dbg-value-superreg-copy.mir
…
DbgValueOtherTargets.test
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debug-loclists-lto.ll
…
debug-loclists.ll
…
debug-nodebug-crash.ll
…
debuginfo-locations-dce.ll
…
debugloc-argsize.ll
…
debugloc-no-line-0.ll
…
deopt-bundles.ll
…
deopt-intrinsic-cconv.ll
…
deopt-intrinsic.ll
…
disable-tail-calls.ll
…
discontiguous-loops.ll
…
discriminate-mem-ops-missing-info.ll
…
discriminate-mem-ops-skip-pfetch.ll
…
discriminate-mem-ops.ll
…
div8.ll
…
div-rem-pair-recomposition-signed.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
div-rem-pair-recomposition-unsigned.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
div-rem-simplify.ll
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divide-by-constant.ll
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divide-windows-itanium.ll
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divrem8_ext.ll
…
divrem.ll
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dllexport-x86_64.ll
…
dllexport.ll
…
dllimport-x86_64.ll
…
dllimport.ll
…
dollar-name.ll
…
domain-reassignment-implicit-def.ll
…
domain-reassignment-test.ll
…
domain-reassignment.mir
…
dont-remove-empty-preheader.ll
…
dont-trunc-store-double-to-float.ll
…
dropped_constructor.ll
…
dtor-priority-coff.ll
…
dwarf-comp-dir.ll
…
dwarf-eh-prepare.ll
…
dwarf-headers.ll
…
dwarf-split-line-1.ll
…
dwarf-split-line-2.ll
…
dyn_alloca_aligned.ll
…
dyn-stackalloc.ll
…
dynamic-alloca-in-entry.ll
…
dynamic-alloca-lifetime.ll
…
dynamic-allocas-VLAs.ll
…
dynamic-regmask.ll
…
DynamicCalleeSavedRegisters.ll
…
early-cfi-sections.ll
…
early-ifcvt-crash.ll
…
early-ifcvt.ll
…
eh_frame.ll
…
eh-frame-unreachable.ll
…
eh-label.ll
…
eh-nolandingpads.ll
…
eh-null-personality.ll
…
eh-unknown.ll
…
eip-addressing-i386.ll
…
element-wise-atomic-memory-intrinsics.ll
…
elf-associated.ll
…
elf-comdat2.ll
…
elf-comdat.ll
…
emit-big-cst.ll
[AsmPrinter] Fix emission of non-standard integer constants for BE targets
2020-04-27 14:57:29 -07:00
empty-function.ll
…
empty-functions.ll
…
empty-struct-return-type.ll
…
emutls_generic.ll
…
emutls-pic.ll
…
emutls-pie.ll
…
emutls.ll
…
enqcmd-intrinsics.ll
…
epilogue-cfi-fp.ll
…
epilogue-cfi-no-fp.ll
…
epilogue.ll
…
equiv_with_fndef.ll
…
equiv_with_vardef.ll
…
evex-to-vex-compress.mir
[X86] Fix a few issues in the evex-to-vex-compress.mir test.
2020-05-02 18:02:12 -07:00
exception-label.ll
…
exedeps-movq.ll
…
exedepsfix-broadcast.ll
…
expand-integer-x86_64-intrinsic-error.ll
…
expand-opaque-const.ll
…
expand-post-ra-pseudo.mir
…
expand-vr64-gr64-copy.mir
…
explicit-section-mergeable.ll
…
extend-set-cc-uses-dbg.ll
…
extend.ll
…
extended-fma-contraction.ll
…
extern_weak.ll
…
extmul64.ll
…
extmul128.ll
…
extract-bits.ll
…
extract-combine.ll
…
extract-concat.ll
[X86][SSE] getFauxShuffle - support insert(truncate/extend(extract(vec0,c0)),vec1,c1) shuffle patterns at the byte level
2020-04-26 15:31:01 +01:00
extract-extract.ll
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extract-fp.ll
…
extract-insert.ll
…
extract-lowbits.ll
…
extract-store.ll
…
extractelement-fp.ll
…
extractelement-from-arg.ll
…
extractelement-index.ll
…
extractelement-legalization-cycle.ll
…
extractelement-legalization-store-ordering.ll
…
extractelement-load.ll
…
extractelement-shuffle.ll
…
extractps.ll
…
f16c-intrinsics-fast-isel.ll
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f16c-intrinsics-upgrade.ll
…
f16c-intrinsics.ll
…
fabs.ll
…
fadd-combines.ll
…
fast-cc-callee-pops.ll
…
fast-cc-merge-stack-adj.ll
…
fast-cc-pass-in-regs.ll
…
fast-isel-abort-warm.ll
…
fast-isel-agg-constant.ll
…
fast-isel-args-fail2.ll
…
fast-isel-args-fail.ll
…
fast-isel-args.ll
…
fast-isel-atomic.ll
…
fast-isel-avoid-unnecessary-pic-base.ll
…
fast-isel-bail.ll
…
fast-isel-bc.ll
…
fast-isel-bitcasts-avx512.ll
…
fast-isel-bitcasts-avx.ll
…
fast-isel-bitcasts.ll
…
fast-isel-branch_weights.ll
…
fast-isel-call-bool.ll
…
fast-isel-call-cleanup.ll
…
fast-isel-call.ll
…
fast-isel-cmp-branch2.ll
…
fast-isel-cmp-branch3.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-cmp.ll
…
fast-isel-constant.ll
…
fast-isel-constpool.ll
…
fast-isel-constrain-store-indexreg.ll
…
fast-isel-deadcode.ll
…
fast-isel-divrem-x86-64.ll
…
fast-isel-divrem.ll
…
fast-isel-double-half-convertion.ll
…
fast-isel-emutls.ll
…
fast-isel-expect.ll
…
fast-isel-extract.ll
…
fast-isel-float-half-convertion.ll
…
fast-isel-fneg-kill.ll
…
fast-isel-fneg.ll
…
fast-isel-fold-mem.ll
…
fast-isel-fptrunc-fpext.ll
…
fast-isel-freeze.ll
…
fast-isel-gc-intrinsics.ll
…
fast-isel-gep.ll
…
fast-isel-gv.ll
…
fast-isel-i1.ll
…
fast-isel-int-float-conversion-x86-64.ll
…
fast-isel-int-float-conversion.ll
…
fast-isel-load-i1.ll
…
fast-isel-mem.ll
…
fast-isel-movsbl-indexreg.ll
…
fast-isel-nontemporal.ll
…
fast-isel-noplt-pic.ll
…
fast-isel-ret-ext.ll
…
fast-isel-select-cmov2.ll
…
fast-isel-select-cmov.ll
…
fast-isel-select-cmp.ll
…
fast-isel-select-pseudo-cmov.ll
…
fast-isel-select-sse.ll
…
fast-isel-select.ll
…
fast-isel-sext-zext.ll
…
fast-isel-sext.ll
…
fast-isel-shift.ll
…
fast-isel-sse12-fptoint.ll
…
fast-isel-stackcheck.ll
…
fast-isel-store.ll
…
fast-isel-tailcall.ll
…
fast-isel-tls.ll
…
fast-isel-trunc-kill-subreg.ll
…
fast-isel-uint-float-conversion-x86-64.ll
…
fast-isel-uint-float-conversion.ll
…
fast-isel-vecload.ll
…
fast-isel-x32.ll
…
fast-isel-x86-64.ll
…
fast-isel-x86.ll
…
fast-isel.ll
…
fastcall-correct-mangling.ll
…
fastcc3struct.ll
…
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-softfloat.ll
…
fastmath-float-half-conversion.ll
…
fcmove.ll
…
fcmp-constant.ll
…
fdiv-combine-vec.ll
…
fdiv-combine.ll
…
fdiv.ll
…
fentry-insertion.ll
…
field-extract-use-trunc.ll
…
fildll.ll
…
file-directive.ll
…
file-source-filename.ll
…
finite-libcalls.ll
…
fixed-stack-di-mir.ll
…
fixup-bw-copy.ll
…
fixup-bw-copy.mir
…
fixup-bw-inst.ll
…
fixup-bw-inst.mir
…
fixup-lea.ll
…
flags-copy-lowering.mir
…
float-asmprint.ll
…
float-conv-elim.ll
…
floor-soft-float.ll
…
flt-rounds.ll
…
fltused_function_pointer.ll
…
fltused_math.ll
…
fltused.ll
…
fma4-commute-x86.ll
…
fma4-fneg-combine.ll
…
fma4-intrinsics-x86_64-folded-load.ll
…
fma4-intrinsics-x86-upgrade.ll
…
fma4-intrinsics-x86.ll
…
fma4-scalar-memfold.ll
…
fma_patterns_wide.ll
…
fma_patterns.ll
…
fma-commute-loop.ll
…
fma-commute-x86.ll
…
fma-do-not-commute.ll
…
fma-fneg-combine-2.ll
…
fma-fneg-combine.ll
…
fma-intrinsics-canonical.ll
…
fma-intrinsics-fast-isel.ll
…
fma-intrinsics-phi-213-to-231.ll
…
fma-intrinsics-x86-upgrade.ll
…
fma-intrinsics-x86.ll
…
fma-phi-213-to-231.ll
…
fma-scalar-combine.ll
…
fma-scalar-memfold.ll
…
fma.ll
…
fmaddsub-combine.ll
…
fmaxnum.ll
…
fmf-flags.ll
…
fmf-propagation.ll
…
fmf-reduction.ll
…
fminnum.ll
…
fmsubadd-combine.ll
…
fmul-combines.ll
…
fnabs.ll
…
fold-add-pcrel.ll
…
fold-add.ll
…
fold-and-shift-x86_64.ll
…
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call-oper.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-load-binops.ll
…
fold-load-unops.ll
…
fold-load-vec.ll
…
fold-load.ll
…
fold-mul-lohi.ll
…
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
…
fold-push.ll
…
fold-rmw-ops.ll
…
fold-sext-trunc.ll
…
fold-tied-op.ll
…
fold-vector-bv-crash.ll
…
fold-vector-sext-crash2.ll
…
fold-vector-sext-crash.ll
…
fold-vector-sext-zext.ll
…
fold-vector-shl-crash.ll
…
fold-vector-shuffle-crash.ll
…
fold-vector-trunc-sitofp.ll
…
fold-vex.ll
…
fold-xmm-zero.ll
…
fold-zext-trunc.ll
…
fops-windows-itanium.ll
…
force-align-stack-alloca.ll
…
force-align-stack.ll
…
fp2sint.ll
…
fp80-strict-scalar-cmp.ll
…
fp80-strict-scalar.ll
…
fp128-calling-conv.ll
…
fp128-cast-strict.ll
…
fp128-cast.ll
…
fp128-compare.ll
…
fp128-extract.ll
…
fp128-g.ll
…
fp128-i128.ll
…
fp128-libcalls-strict.ll
…
fp128-libcalls.ll
…
fp128-load.ll
…
fp128-select.ll
…
fp128-store.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-arith.ll
…
fp-cvt.ll
…
fp-double-rounding.ll
…
fp-elim-and-no-fp-elim.ll
…
fp-elim.ll
…
fp-fast.ll
…
fp-fold.ll
…
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-intrinsics-flags-x86_64.ll
…
fp-intrinsics-flags.ll
…
fp-intrinsics-fma.ll
…
fp-intrinsics.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
fp-load-trunc.ll
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fp-logic-replace.ll
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fp-logic.ll
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fp-round.ll
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fp-select-cmp-and.ll
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fp-stack-2results.ll
…
fp-stack-compare-cmov.ll
…
fp-stack-compare.ll
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fp-stack-direct-ret.ll
…
fp-stack-O0-crash.ll
…
fp-stack-O0.ll
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fp-stack-ret-conv.ll
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fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
…
fp-stack.ll
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fp-strict-libcalls-msvc32.ll
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fp-strict-scalar-cmp.ll
…
fp-strict-scalar-fptoint.ll
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fp-strict-scalar-inttofp.ll
…
fp-strict-scalar-round.ll
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fp-strict-scalar.ll
…
fp-trunc.ll
…
fp-undef.ll
…
fp-une-cmp.ll
…
fpcmp-soft-fp.ll
…
fpstack-debuginstr-kill.ll
…
fptosi-constant.ll
…
frame-base.ll
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frame-lowering-debug-intrinsic-2.ll
…
frame-lowering-debug-intrinsic.ll
…
frame-order.ll
…
frameaddr.ll
…
frameregister.ll
…
freeze-combine.ll
…
freeze-legalize.ll
…
freeze.ll
…
frem-msvc32.ll
…
fsgsbase.ll
…
fshl.ll
[TargetLowering] Improve expandFunnelShift shift amount masking
2020-05-24 11:25:09 +01:00
fshr.ll
[TargetLowering] Improve expandFunnelShift shift amount masking
2020-05-24 11:25:09 +01:00
fsxor-alignment.ll
…
ftrunc.ll
[x86] use vector instructions to lower even more FP->int->FP casts
2020-04-25 11:38:54 -04:00
full-lsr.ll
…
funclet-layout.ll
…
function-alias.ll
…
function-subtarget-features-2.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
…
ga-offset2.ll
…
ga-offset.ll
…
gather-addresses.ll
…
gcc_except_table_functions.ll
…
gcc_except_table.ll
…
gep-expanded-vector.ll
…
getelementptr.ll
…
gfni-intrinsics.ll
…
ghc-cc64.ll
…
ghc-cc.ll
…
global-access-pie.ll
…
global-fill.ll
[AsmPrinter] Fix emission of non-standard integer constants for BE targets
2020-04-27 14:57:29 -07:00
global-sections-comdat.ll
…
global-sections-tls.ll
…
global-sections.ll
…
gnu-seh-nolpads.ll
…
gpr-to-mask.ll
…
greedy_regalloc_bad_eviction_sequence.ll
…
gs-fold.ll
…
h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
…
haddsub-2.ll
…
haddsub-3.ll
…
haddsub-broadcast.ll
…
haddsub-shuf-undef-operand.ll
…
haddsub-shuf.ll
[x86] add tests for heroic horizontal ops; NFC
2020-05-18 17:21:09 -04:00
haddsub-undef.ll
[x86] add tests for disguised horizontal ops; NFC
2020-05-18 17:21:09 -04:00
haddsub.ll
…
half-constrained.ll
…
half.ll
…
handle-move.ll
…
heap-alloc-markers.mir
…
hhvm-cc.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis-pic.ll
…
hidden-vis.ll
…
hipe-cc64.ll
…
hipe-cc.ll
…
hipe-prologue.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
…
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
…
hoist-common.ll
…
hoist-invariant-load.ll
…
hoist-spill-lpad.ll
…
hoist-spill.ll
…
horizontal-reduce-smax.ll
…
horizontal-reduce-smin.ll
[DAG] SimplifyDemandedVectorElts - remove INSERT_SUBVECTOR if we don't demand the subvector
2020-05-01 16:20:51 +01:00
horizontal-reduce-umax.ll
…
horizontal-reduce-umin.ll
…
horizontal-shuffle-demanded.ll
…
horizontal-shuffle.ll
…
huge-stack-offset2.ll
…
huge-stack-offset.ll
…
i1narrowfail.ll
…
i2k.ll
…
i16lshr8pat.ll
…
i64-mem-copy.ll
…
i64-to-float.ll
…
i128-add.ll
…
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i128-sdiv.ll
…
i256-add.ll
…
i386-setjmp-pic.ll
…
i386-shrink-wrapping.ll
…
i386-tlscall-fastregalloc.ll
…
i486-fence-loop.ll
…
i686-win-shrink-wrapping.ll
…
iabs.ll
…
icall-branch-funnel.ll
…
icmp-opt.ll
…
ident-metadata.ll
…
ifunc-asm.ll
…
illegal-bitfield-loadstore.ll
…
illegal-insert.ll
…
illegal-vector-args-return.ll
…
immediate_merging64.ll
…
immediate_merging.ll
…
implicit-faultmap.ll
…
implicit-null-check-negative.ll
…
implicit-null-check.ll
…
implicit-null-checks.mir
…
implicit-null-chk-reg-rewrite.mir
…
implicit-use-spill.mir
…
imul-lea-2.ll
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imul-lea.ll
…
imul.ll
…
inalloca-ctor.ll
…
inalloca-invoke.ll
…
inalloca-regparm.ll
…
inalloca-stdcall.ll
…
inalloca.ll
…
inc-of-add.ll
…
inconsistent_landingpad.ll
…
indirect-branch-tracking-cm-lager.ll
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indirect-branch-tracking-eh2.ll
…
indirect-branch-tracking-eh.ll
…
indirect-branch-tracking-r2.ll
…
indirect-branch-tracking.ll
…
indirect-hidden.ll
…
init-priority.ll
…
inline-0bh.ll
…
inline-asm-2addr.ll
…
inline-asm-A-constraint.ll
…
inline-asm-avx512f-v-constraint.ll
[X86] Allow Yz inline assembly constraint to choose ymm0 or zmm0 when avx/avx512 are enabled and type is 256 or 512 bits
2020-05-05 21:12:30 -07:00
inline-asm-avx512f-x-constraint.ll
…
inline-asm-avx512vl-v-constraint-32bit.ll
…
inline-asm-avx512vl-v-constraint.ll
…
inline-asm-avx-v-constraint-32bit.ll
…
inline-asm-avx-v-constraint.ll
[X86] Allow Yz inline assembly constraint to choose ymm0 or zmm0 when avx/avx512 are enabled and type is 256 or 512 bits
2020-05-05 21:12:30 -07:00
inline-asm-bad-constraint-n.ll
…
inline-asm-bad-modifier.ll
[X86] Add x, t and g modifiers for inline asm
2020-04-30 17:45:45 -07:00
inline-asm-default-clobbers.ll
…
inline-asm-duplicated-constraint.ll
…
inline-asm-e-constraint.ll
…
inline-asm-error.ll
…
inline-asm-flag-clobber.ll
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inline-asm-flag-output.ll
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inline-asm-fpstack.ll
…
inline-asm-h.ll
…
inline-asm-i-constraint-i1.ll
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inline-asm-imm-out-of-range.ll
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inline-asm-modifier-c.ll
…
inline-asm-modifier-n.ll
…
inline-asm-modifier-q.ll
…
inline-asm-modifier-V.ll
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inline-asm-mrv.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-n-constraint.ll
…
inline-asm-out-regs.ll
…
inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
…
inline-asm-q-regs.ll
…
inline-asm-R-constraint.ll
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inline-asm-sp-clobber-memcpy.ll
…
inline-asm-stack-realign2.ll
…
inline-asm-stack-realign3.ll
…
inline-asm-stack-realign.ll
…
inline-asm-tied.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
…
inline-sse.ll
…
inlineasm-sched-bug.ll
…
inreg.ll
…
ins_split_regalloc.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insert-into-constant-vector.ll
…
insert-loaded-scalar.ll
…
insert-positions.ll
…
insert-prefetch-inline.afdo
…
insert-prefetch-inline.ll
…
insert-prefetch-invalid-instr.afdo
…
insert-prefetch-invalid-instr.ll
…
insert-prefetch-other.afdo
…
insert-prefetch.afdo
…
insert-prefetch.ll
…
insertelement-copytoregs.ll
…
insertelement-duplicates.ll
…
insertelement-legalize.ll
…
insertelement-ones.ll
…
insertelement-shuffle.ll
…
insertelement-var-index.ll
…
insertelement-zero.ll
…
insertps-combine.ll
…
insertps-from-constantpool.ll
…
insertps-O0-bug.ll
…
insertps-unfold-load-bug.ll
…
instr-symbols.mir
…
int-intrinsic.ll
…
intersect-fma-fmf.ll
…
interval-update-remat.ll
…
invalid-liveness.mir
…
invalid-shift-immediate.ll
…
invpcid-intrinsic.ll
…
ipra-inline-asm.ll
…
ipra-local-linkage.ll
…
ipra-reg-alias.ll
…
ipra-reg-usage.ll
…
ipra-transform.ll
…
isel-blendi-gettargetconstant.ll
…
isel-optnone.ll
…
isel-postprocessing-test-fold-memop.ll
[x86] Propagate memory operands during ISel DAG postprocessing
2020-05-18 21:35:31 +02:00
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
jump_sign.ll
…
known-bits-vector.ll
…
known-bits.ll
…
known-signbits-vector.ll
[X86][AVX] combineVectorSignBitsTruncation - avoid complex vXi64->vXi32 PACKSS truncations (PR45794)
2020-05-05 11:57:25 +01:00
kshift.ll
…
label-annotation.ll
…
label-heapallocsite.ll
…
label-redefinition.ll
…
lack-of-signed-truncation-check.ll
…
lakemont.ll
…
large-code-model-isel.ll
…
large-constants.ll
…
large-gep-chain.ll
…
large-gep-scale.ll
…
large-global.ll
…
large-pic-string.ll
…
late-address-taken.ll
…
late-remat-update-2.mir
…
late-remat-update.mir
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
…
lea-4.ll
…
lea-5.ll
…
lea-dagdag.ll
…
lea-opt-cse1.ll
…
lea-opt-cse2.ll
…
lea-opt-cse3.ll
…
lea-opt-cse4.ll
…
lea-opt-memop-check-1.ll
…
lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
…
lea-opt.ll
…
lea-recursion.ll
…
lea.ll
…
leaf-fp-elim.ll
…
leaFixup32.mir
…
leaFixup64.mir
…
legalize-fmp-oeq-vector-select.ll
…
legalize-libcalls.ll
…
legalize-shift-64.ll
…
legalize-shift.ll
…
legalize-shl-vec.ll
…
legalize-sub-zero-2.ll
…
legalize-sub-zero.ll
…
legalize-types-remapid.ll
…
legalize-vaarg.ll
…
legalizedag_vec.ll
…
libcall-sret.ll
…
licm-dominance.ll
…
licm-nested.ll
…
licm-regpressure.ll
…
licm-symbol.ll
…
lifetime-alias.ll
…
limit-split-cost.mir
…
limited-prec.ll
…
linux-preemption.ll
…
lit.local.cfg
…
live-out-reg-info.ll
…
live-range-nosubreg.ll
…
liveness-local-regalloc.ll
…
llc-override-mcpu-mattr.ll
…
llc-print-machineinstrs.mir
…
llc-start-stop-instance.ll
…
llrint-conv.ll
…
llround-conv.ll
…
load-combine-dbg.ll
…
load-combine.ll
…
load-local-v3i1.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
load-local-v3i129.ll
[SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment.
2020-05-11 17:39:00 -07:00
load-local-v4i5.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
load-partial.ll
…
load-scalar-as-vector.ll
…
load-slice.ll
…
loadStore_vectorizer.ll
…
loc-remat.ll
…
local_stack_symbol_ordering.ll
…
localescape.ll
…
log2_not_readnone.ll
…
logical-load-fold.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-blocks.ll
…
loop-hoist.ll
…
loop-rotate.ll
…
loop-search.ll
…
loop-strength-reduce2.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
…
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
…
loop-strength-reduce-3.ll
…
loop-strength-reduce-crash.ll
…
loop-strength-reduce.ll
…
lower-bitcast.ll
…
lower-ptrmask.ll
…
lower-vec-shift-2.ll
…
lower-vec-shift.ll
…
lower-vec-shuffle-bug.ll
…
lrint-conv-i32.ll
…
lrint-conv-i64.ll
…
lround-conv-i32.ll
…
lround-conv-i64.ll
…
lrshrink.ll
…
lsr-crash-empty-uses.ll
…
lsr-delayed-fold.ll
…
lsr-i386.ll
…
lsr-interesting-step.ll
…
lsr-loop-exit-cond.ll
…
lsr-negative-stride.ll
…
lsr-nonaffine.ll
…
lsr-normalization.ll
…
lsr-overflow.ll
…
lsr-quadratic-expand.ll
…
lsr-redundant-addressing.ll
…
lsr-reuse-trunc.ll
…
lsr-reuse.ll
…
lsr-sort.ll
…
lsr-static-addr.ll
…
lsr-wrap.ll
…
lvi-hardening-gadget-graph.ll
[X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets
2020-05-11 13:08:35 -07:00
lvi-hardening-indirectbr.ll
…
lvi-hardening-inline-asm.ll
[X86] Add inline assembly load hardening mitigation for Load Value Injection (LVI)
2020-05-11 14:08:16 -07:00
lvi-hardening-loads.ll
[X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)
2020-05-11 13:08:36 -07:00
lvi-hardening-ret.ll
…
lwp-intrinsics-x86_64.ll
…
lwp-intrinsics.ll
…
lzcnt-tzcnt.ll
…
lzcnt-zext-cmp.ll
…
lzcnt.ll
…
macCatalyst.ll
…
machine-combiner-int-vec.ll
…
machine-combiner-int.ll
…
machine-combiner.ll
…
machine-copy-prop.mir
…
machine-cp-debug.mir
…
machine-cp.ll
…
machine-cse.ll
…
machine-outliner-cfi-tail-some.mir
…
machine-outliner-cfi-tail.mir
…
machine-outliner-debuginfo.ll
…
machine-outliner-disubprogram.ll
…
machine-outliner-noredzone.ll
…
machine-outliner-tailcalls.ll
…
machine-outliner.ll
…
machine-region-info.mir
…
machine-sink-and-implicit-null-checks.ll
…
machine-sink.ll
…
machine-trace-metrics-crash.ll
…
MachineBranchProb.ll
…
MachineSink-CritEdge.ll
…
MachineSink-DbgValue.ll
…
MachineSink-eflags.ll
…
machinesink-merge-debuginfo.ll
…
machinesink-null-debuginfo.ll
…
MachineSink-PHIUse.ll
…
MachineSink-SubReg.ll
…
macho-comdat.ll
…
macho-trap.ll
…
madd.ll
[X86] Fix a regression caused by moving combineLoopMAddPattern to IR
2020-05-14 10:31:28 -07:00
mangle-question-mark.ll
…
mask-negated-bool.ll
…
masked_compressstore.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_expandload.ll
[DAG] SimplifyDemandedVectorElts - add EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 13:48:07 +01:00
masked_gather_scatter_widen.ll
…
masked_gather_scatter.ll
…
masked_gather.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_load.ll
[X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode with non-boolean masks
2020-05-24 09:51:21 +01:00
masked_store_trunc_ssat.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_store_trunc_usat.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_store_trunc.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked_store.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
masked-iv-safe.ll
…
masked-iv-unsafe.ll
…
maskmovdqu.ll
…
materialize.ll
…
mature-mc-support.ll
…
mbp-false-cfg-break.ll
…
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
…
mcu-abi.ll
…
mem-intrin-base-reg.ll
…
mem-promote-integers.ll
…
membarrier.ll
…
memcmp-constant.ll
…
memcmp-mergeexpand.ll
…
memcmp-minsize.ll
…
memcmp-more-load-pairs.ll
…
memcmp-optsize.ll
…
memcmp-pgso.ll
…
memcmp.ll
…
memcpy-2.ll
…
memcpy-from-string.ll
…
memcpy-inline.ll
…
memcpy-struct-by-value.ll
…
memcpy.ll
…
mempcpy-32.ll
…
mempcpy.ll
…
memset64-on-x86-32.ll
…
memset-2.ll
…
memset-3.ll
…
memset-nonzero.ll
…
memset-sse-stack-realignment.ll
…
memset-zero.ll
…
memset.ll
…
merge_store_duplicated_loads.ll
…
merge_store.ll
…
merge-consecutive-loads-128.ll
…
merge-consecutive-loads-256.ll
…
merge-consecutive-loads-512.ll
…
merge-consecutive-stores-i1.ll
…
merge-consecutive-stores-nt.ll
[X86] Fix usage of Align constructing MachineMemOperands.
2020-05-05 15:25:02 -07:00
merge-consecutive-stores.ll
…
merge-sp-update-lea.ll
…
merge-sp-updates-cfi.ll
…
merge-store-constants.ll
…
merge-store-partially-alias-loads.ll
…
merge-vector-stores-scale-idx-crash.ll
…
MergeConsecutiveStores.ll
…
mfence.ll
…
midpoint-int-vec-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
midpoint-int-vec-256.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
midpoint-int-vec-512.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
midpoint-int.ll
…
min-legal-vector-width.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
mingw-alloca.ll
…
mingw-comdats-xdata.ll
…
mingw-comdats.ll
…
mingw-refptr.ll
…
misaligned-memset.ll
…
misched_phys_reg_assign_order.ll
…
misched-aa-colored.ll
…
misched-aa-mmos.ll
…
misched-balance.ll
…
misched-code-difference-with-debug.ll
…
misched-copy.ll
…
misched-crash.ll
…
misched-fusion.ll
…
misched-ilp.ll
…
misched-matmul.ll
…
misched-matrix.ll
…
misched-new.ll
…
mixed-ptr-sizes.ll
…
mmx-arg-passing-x86-64.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
mmx-bitcast-fold.ll
…
mmx-bitcast.ll
…
mmx-build-vector.ll
[X86] Add a few more shuffles to hasUndefRegUpdate.
2020-05-10 12:30:16 -07:00
mmx-coalescing.ll
…
mmx-copy-gprs.ll
…
mmx-cvt.ll
…
mmx-fold-load.ll
…
mmx-fold-zero.ll
…
mmx-intrinsics.ll
…
mmx-only.ll
…
mod128.ll
…
movbe.ll
…
movddup-load-fold.ll
…
movdir-intrinsic-x86_64.ll
…
movdir-intrinsic-x86.ll
…
move_latch_to_loop_top.ll
…
movfs.ll
…
movgs.ll
…
movmsk-cmp.ll
…
movmsk.ll
…
movntdq-no-avx.ll
…
movpc32-check.ll
…
movtopush64.ll
…
movtopush.ll
[SelectionDAG] Don't promote the alignment of allocas beyond the stack alignment.
2020-05-11 17:39:00 -07:00
movtopush.mir
…
ms-inline-asm-avx512.ll
…
ms-inline-asm-PR44272.ll
…
ms-inline-asm-redundant-clobber.ll
…
ms-inline-asm.ll
…
mul64.ll
…
mul128_sext_loop.ll
…
mul128.ll
…
mul-constant-i8.ll
…
mul-constant-i16.ll
…
mul-constant-i32.ll
…
mul-constant-i64.ll
…
mul-constant-result.ll
…
mul-i256.ll
…
mul-i512.ll
…
mul-i1024.ll
…
mul-legalize.ll
…
mul-remat.ll
…
mul-shift-reassoc.ll
…
mulfix_combine.ll
…
mulo-pow2.ll
…
muloti.ll
…
mult-alt-generic-i686.ll
…
mult-alt-generic-x86_64.ll
…
mult-alt-x86.ll
…
multiple-loop-post-inc.ll
…
multiple-return-values-cross-block.ll
…
mulvi32.ll
…
mulx32.ll
…
mulx64.ll
…
musttail-fastcall.ll
…
musttail-inalloca.ll
…
musttail-indirect.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
musttail-tailcc.ll
…
musttail-thiscall.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
musttail-varargs.ll
…
musttail.ll
…
mwaitx.ll
…
mxcsr-reg-usage.ll
…
named-reg-alloc.ll
…
named-reg-notareg.ll
…
nancvt.ll
…
narrow_op-1.ll
…
narrow-shl-cst.ll
…
narrow-shl-load.ll
…
neg_cmp.ll
…
neg_fp.ll
[DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression
2020-05-20 02:12:16 +00:00
neg-of-3ops-lea.ll
…
neg-shl-add.ll
…
negate-add-zero.ll
…
negate-i1.ll
…
negate-shift.ll
…
negate.ll
…
negative_zero.ll
…
negative-offset.ll
…
negative-sin.ll
…
negative-stride-fptosi-user.ll
…
negative-subscript.ll
…
new-remat.ll
…
newline-and-quote.ll
…
no-and8ri8.ll
…
no-cmov.ll
…
no-plt-libcalls.ll
…
no-plt.ll
…
no-prolog-kill.ll
…
no-sse2-avg.ll
…
no-sse-win64.ll
…
no-sse-x86.ll
…
no-stack-arg-probe.ll
…
nobt.ll
…
nocf_check.ll
…
nocx16.ll
…
nomovtopush.ll
…
non-lazy-bind.ll
…
non-unique-sections.ll
…
non-value-mem-operand.mir
…
nonconst-static-ev.ll
…
nonconst-static-iv.ll
…
nontemporal-2.ll
…
nontemporal-3.ll
…
nontemporal-loads-2.ll
…
nontemporal-loads.ll
…
nontemporal.ll
…
noreturn-call-linux.ll
…
noreturn-call-win64.ll
…
noreturn-call.ll
…
norex-subreg.ll
…
nosse-error1.ll
…
nosse-varargs.ll
…
nosse-vector.ll
…
not-and-simplify.ll
…
not-of-dec.ll
…
note-cet-property.ll
…
note-sections.ll
…
null-streamer.ll
…
O0-pipeline.ll
[DwarfEHPrepare] Don't prune unreachable resumes at optnone
2020-05-23 20:58:01 +02:00
O3-pipeline.ll
[TargetPassConfig] Don't add alias analysis at optnone
2020-05-23 10:35:03 +02:00
objc-gc-module-flags.ll
…
oddshuffles.ll
[DAG] SimplifyDemandedVectorElts - add INSERT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
2020-05-01 16:20:51 +01:00
oddsubvector.ll
[X86][SSE] Regenerate oddsubvector.ll test checks
2020-04-27 18:48:02 +01:00
offset-operator.ll
…
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
…
opaque-constant-asm.ll
…
opt_phis2.mir
…
opt_phis.mir
…
opt-ext-uses.ll
…
opt-shuff-tstore.ll
…
optimize-max-0.ll
…
optimize-max-1.ll
…
optimize-max-2.ll
…
optimize-max-3.ll
…
or-address.ll
…
or-branch.ll
…
or-lea.ll
…
osx-private-labels.ll
…
overflow-intrinsic-setcc-fold.ll
…
overflow.ll
…
overlap-shift.ll
…
packed_struct.ll
…
packss.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
paddus.ll
…
palignr.ll
…
parity.ll
…
partial-fold32.ll
…
partial-fold64.ll
…
partial-tail-dup.ll
…
partition.ll
…
pass-three.ll
…
patchable-function-entry-ibt.ll
…
patchable-function-entry.ll
…
patchable-prologue.ll
…
patchpoint-invoke.ll
…
patchpoint-verifiable.mir
…
patchpoint-webkit_jscc.ll
…
patchpoint.ll
…
pause.ll
…
peep-setb.ll
…
peep-test-0.ll
…
peep-test-1.ll
…
peep-test-2.ll
…
peep-test-3.ll
…
peep-test-4.ll
…
peephole-cvt-sse.ll
…
peephole-fold-movsd.ll
…
peephole-fold-testrr.mir
…
peephole-multiple-folds.ll
…
peephole-na-phys-copy-folding.ll
…
peephole-recurrence.mir
…
peephole.mir
…
personality_size.ll
…
personality.ll
…
phaddsub-extract.ll
…
phaddsub-undef.ll
…
phaddsub.ll
…
phi-bit-propagation.ll
…
phi-immediate-factoring.ll
…
phielim-split.ll
…
phys_subreg_coalesce-2.ll
…
phys_subreg_coalesce-3.ll
…
phys_subreg_coalesce.ll
…
phys-reg-local-regalloc.ll
…
physreg-pairs-error.ll
…
physreg-pairs.ll
…
pic_jumptable.ll
…
pic-load-remat.ll
…
pic.ll
…
pie.ll
…
pku.ll
…
pmaddubsw.ll
…
pmovext.ll
…
pmovsx-inreg.ll
…
pmul.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
pmulh.ll
[X86] Add support for forming vXi16 PMULH instructions from shifts.
2020-05-14 10:58:00 -07:00
pmulld.ll
…
pointer-vector.ll
…
pop-stack-cleanup-msvc.ll
…
pop-stack-cleanup.ll
…
popcnt.ll
…
post-ra-sched-with-debug.mir
…
post-ra-sched.ll
…
postalloc-coalescing.ll
…
postra-ignore-dbg-instrs.mir
…
postra-licm.ll
…
pow.75.ll
…
pow.ll
…
powi-windows.ll
…
powi.ll
…
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2585.ll
…
pr2656.ll
…
pr2659.ll
…
pr2849.ll
…
pr2924.ll
…
pr2982.ll
…
pr3154.ll
…
pr3216.ll
…
pr3241.ll
…
pr3243.ll
…
pr3244.ll
…
pr3250.ll
…
pr3317.ll
…
pr3366.ll
…
pr3457.ll
…
pr3522.ll
…
pr5145.ll
…
pr7882.ll
…
pr9127.ll
…
pr9517.ll
…
pr9743.ll
…
pr10068.ll
…
pr10475.ll
…
pr10499.ll
…
pr10523.ll
…
pr10524.ll
…
pr10525.ll
…
pr10526.ll
…
pr11202.ll
…
pr11334.ll
…
pr11415.ll
…
pr11468.ll
…
pr11985.ll
…
pr11998.ll
…
pr12360.ll
…
pr12889.ll
…
pr13209.ll
…
pr13220.ll
…
pr13458.ll
…
pr13577.ll
…
pr13859.ll
…
pr13899.ll
…
pr14088.ll
…
pr14098.ll
…
pr14161.ll
…
pr14204.ll
…
pr14314.ll
…
pr14333.ll
…
pr14562.ll
…
pr15267.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
pr15296.ll
…
pr15309.ll
…
pr15705.ll
…
pr15981.ll
…
pr16031.ll
…
pr16360.ll
…
pr16807.ll
…
pr17546.ll
…
pr17631.ll
…
pr17764.ll
…
pr18014.ll
…
pr18054.ll
…
pr18162.ll
…
pr18344.ll
…
pr18846.ll
…
pr19049.ll
…
pr20011.ll
…
pr20012.ll
…
pr20020.ll
…
pr20088.ll
…
pr21099.ll
…
pr21792.ll
…
pr22019.ll
…
pr22103.ll
…
pr22338.ll
…
pr22473.ll
…
pr22774.ll
…
pr22970.ll
…
pr23103.ll
…
pr23246.ll
…
pr23273.ll
…
pr23603.ll
…
pr23664.ll
…
pr24139.ll
…
pr24374.ll
…
pr24602.ll
…
pr25828.ll
…
pr26350.ll
…
pr26625.ll
…
pr26652.ll
…
pr26757.ll
…
pr26835.ll
…
pr26870.ll
…
pr27071.ll
…
pr27202.ll
…
pr27501.ll
…
pr27591.ll
…
pr27681.mir
…
pr28129.ll
…
pr28173.ll
…
pr28444.ll
…
pr28472.ll
…
pr28489.ll
…
pr28515.ll
…
pr28560.ll
…
pr28824.ll
…
pr29010.ll
…
pr29022.ll
…
pr29061.ll
…
pr29112.ll
…
pr29170.ll
…
pr29222.ll
…
pr30284.ll
…
pr30290.ll
…
pr30430.ll
…
pr30511.ll
…
pr30562.ll
…
pr30813.ll
…
pr30821.mir
…
pr31045.ll
…
pr31088.ll
…
pr31143.ll
…
pr31242.ll
…
pr31271.ll
…
pr31323.ll
…
pr31593.ll
…
pr31773.ll
…
pr31956.ll
…
pr32108.ll
…
pr32241.ll
…
pr32256.ll
…
pr32278.ll
…
pr32282.ll
[DAGCombine] Move the remaining X86 funnel shift patterns to DAGCombine
2020-04-30 12:57:17 +01:00
pr32284.ll
…
pr32329.ll
…
pr32340.ll
…
pr32345.ll
…
pr32368.ll
…
pr32420.ll
…
pr32451.ll
…
pr32484.ll
…
pr32515.ll
…
pr32588.ll
…
pr32610.ll
…
pr32659.ll
…
pr32907.ll
…
pr33010.ll
…
pr33290.ll
…
pr33349.ll
…
pr33396.ll
…
pr33715.ll
…
pr33747.ll
…
pr33828.ll
…
pr33954.ll
…
pr33960.ll
…
pr34080-2.ll
…
pr34080.ll
…
pr34088.ll
…
pr34137.ll
…
pr34139.ll
…
pr34149.ll
…
pr34177.ll
…
pr34271-1.ll
…
pr34271.ll
…
pr34292.ll
…
pr34381.ll
…
pr34397.ll
…
pr34421.ll
…
pr34592.ll
…
pr34605.ll
…
pr34629.ll
…
pr34634.ll
…
pr34653.ll
[SelectionDAGBuilder] Stop setting alignment to one for hidden sret values
2020-05-04 14:44:39 +01:00
pr34657.ll
…
pr34855.ll
…
pr35272.ll
…
pr35316.ll
…
pr35399.ll
…
pr35443.ll
…
pr35636.ll
…
pr35761.ll
…
pr35763.ll
…
pr35765.ll
…
pr35918.ll
…
pr35972.ll
…
pr35982.ll
…
pr36199.ll
…
pr36274.ll
…
pr36312.ll
…
pr36553.ll
…
pr36602.ll
…
pr36865.ll
…
pr37063.ll
…
pr37264.ll
…
pr37359.ll
…
pr37499.ll
…
pr37820.ll
…
pr37826.ll
…
pr37879.ll
…
pr37916.ll
…
pr38038.ll
…
pr38185.ll
…
pr38217.ll
…
pr38533.ll
…
pr38539.ll
…
pr38639.ll
…
pr38738.ll
…
pr38743.ll
…
pr38762.ll
…
pr38763.ll
…
pr38795.ll
…
pr38803.ll
…
pr38819.ll
…
pr38865-2.ll
…
pr38865-3.ll
…
pr38865.ll
…
pr38952.mir
…
pr39098.ll
…
pr39187-g.ll
…
pr39243.ll
…
pr39666.ll
…
pr39733.ll
…
pr39896.ll
…
pr39926.ll
…
pr40090.ll
…
pr40289-64bit.ll
…
pr40289.ll
…
pr40529.ll
…
pr40539.ll
…
pr40631_deadstore_elision.ll
…
pr40730.ll
…
pr40737.ll
…
pr40811.ll
…
pr40891.ll
…
pr40994.ll
…
pr41619.ll
…
pr41678.ll
…
pr41748.ll
…
pr42452.ll
…
pr42565.ll
…
pr42616.ll
…
pr42727.ll
…
pr42870.ll
…
pr42905.ll
…
pr42909.ll
…
pr42992.ll
…
pr42998.ll
…
pr43157.ll
…
pr43507.ll
…
pr43509.ll
…
pr43529.ll
…
pr43575.ll
…
pr43820.ll
…
pr43866.ll
…
pr43952.ll
…
pr44140.ll
…
pr44396.ll
…
pr44412.ll
…
pr44749.ll
…
pr44812.ll
…
pr44976.ll
…
pr45067.ll
…
pr45443.ll
…
pr45563-2.ll
[X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode with non-boolean masks
2020-05-24 09:51:21 +01:00
pr45563.ll
…
pr45833.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
pr45995-2.ll
[llvm] [CodeGen] [X86] Fix issues with v4i1 instruction selection
2020-05-20 11:34:56 -07:00
pr45995.ll
[llvm] [CodeGen] [X86] Fix issues with v4i1 instruction selection
2020-05-20 11:34:56 -07:00
pr46004.ll
[CGP] Ensure address offset is representable as int64_t
2020-05-22 17:00:22 +01:00
PR34565.ll
…
PR37310.mir
…
PR40322.ll
…
pre-coalesce-2.ll
…
pre-coalesce.ll
…
pre-coalesce.mir
…
pre-ra-sched.ll
…
preallocated-nocall.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
preallocated-x64.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
preallocated.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
prefer-avx256-lzcnt.ll
…
prefer-avx256-mask-extend.ll
…
prefer-avx256-mask-shuffle.ll
[X86] Improve lowering of v16i8->v16i1 truncate under prefer-vector-width=256.
2020-04-25 15:20:33 -07:00
prefer-avx256-popcnt.ll
…
prefer-avx256-shift.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
prefer-avx256-trunc.ll
…
prefer-avx256-wide-mul.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
prefetch.ll
…
prefixdata.ll
…
preserve_allcc64.ll
…
preserve_mostcc64.ll
…
private-2.ll
…
private.ll
…
probe-stack-x32.ll
…
prolog-push-seq.ll
…
prologepilog_deref_size.mir
…
prologue-epilogue-remarks.mir
…
prologuedata.ll
…
promote-assert-zext.ll
…
promote-cmp.ll
[X86][AVX] combineSignExtendInReg - promote mask arithmetic before v4i64 canonicalization
2020-05-07 13:16:36 +01:00
promote-i16.ll
…
promote-trunc.ll
…
promote-vec3.ll
…
promote.ll
…
ps4-noreturn.ll
…
ps4-ssp-nop.ll
…
psadbw.ll
…
pseudo_cmov_lower1.ll
…
pseudo_cmov_lower2.ll
…
pseudo_cmov_lower.ll
…
pshufb-mask-comments.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
pshufd-combine-crash.ll
…
psubus.ll
…
ptest.ll
…
ptr-rotate.ll
…
ptrtoint-constexpr.ll
…
ptrtoint-narrow.ll
…
ptwrite32-intrinsic.ll
…
ptwrite64-intrinsic.ll
…
pull-binop-through-shift.ll
…
pull-conditional-binop-through-shift.ll
…
push-cfi-debug.ll
…
push-cfi-obj.ll
…
push-cfi.ll
…
ragreedy-bug.ll
…
ragreedy-hoist-spill.ll
…
ragreedy-last-chance-recoloring.ll
…
rd-mod-wr-eflags.ll
…
rdpid.ll
…
rdpmc.ll
…
rdrand-x86_64.ll
…
rdrand.ll
…
rdseed-x86_64.ll
…
rdseed.ll
…
rdtsc-upgrade.ll
…
rdtsc.ll
…
read-fp-no-frame-pointer.ll
…
recip-fastmath2.ll
…
recip-fastmath.ll
…
recip-pic.ll
…
red-zone2.ll
…
red-zone.ll
…
reduce-trunc-shl.ll
…
regalloc-advanced-split-cost.ll
…
regalloc-copy-hints.mir
…
regalloc-fast-missing-live-out-spill.mir
…
regalloc-reconcile-broken-hints.ll
…
regalloc-spill-at-ehpad.ll
…
regcall-no-plt.ll
…
reghinting.ll
…
regparm.ll
…
regpressure.ll
…
relptr-rodata.ll
…
rem_crash.ll
…
rem.ll
…
remarks-section.ll
…
remat-constant.ll
…
remat-fold-load.ll
…
remat-mov-0.ll
…
remat-phys-dead.ll
…
remat-scalar-zero.ll
…
replace_unsupported_masked_mem_intrin.ll
…
replace-load-and-with-bzhi.ll
…
ret-addr.ll
…
ret-i64-0.ll
…
ret-mmx.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
retpoline-external.ll
…
retpoline-regparm.ll
…
retpoline.ll
…
return_zeroext_i2.ll
…
return-ext.ll
…
returned-trunc-tail-calls.ll
…
rev16.ll
…
reverse_branches.ll
…
rip-rel-address.ll
…
rip-rel-lea.ll
…
rodata-relocs.ll
…
rot16.ll
…
rot32.ll
…
rot64.ll
…
rotate2.ll
…
rotate4.ll
…
rotate_vec.ll
…
rotate-extract-vector.ll
…
rotate-extract.ll
[X86] Improve i8 + 'slow' i16 funnel shift codegen
2020-05-24 08:08:53 +01:00
rotate-multi.ll
…
rotate.ll
…
rounding-ops.ll
…
rrlist-livereg-corrutpion.ll
…
rtm.ll
…
sad_variations.ll
…
sad.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
sadd_sat_plus.ll
…
sadd_sat_vec.ll
…
sadd_sat.ll
…
saddo-redundant-add.ll
…
safestack_inline.ll
…
safestack_ssp.ll
…
safestack.ll
…
sandybridge-loads.ll
…
sar_fold64.ll
…
sar_fold.ll
…
sat-add.ll
…
sbb.ll
[X86] Handle more cases in combineAddOrSubToADCOrSBB.
2020-04-28 10:39:39 -07:00
scalar_sse_minmax.ll
…
scalar_widen_div.ll
…
scalar-extract.ll
…
scalar-fp-to-i32.ll
…
scalar-fp-to-i64.ll
…
scalar-int-to-fp.ll
…
scalar-min-max-fill-operand.ll
…
scalarize-bitcast.ll
…
scalarize-fp.ll
…
scatter-schedule.ll
…
scavenger.mir
…
scev-interchange.ll
…
scheduler-backtracking.ll
[X86] Handle more cases in combineAddOrSubToADCOrSBB.
2020-04-28 10:39:39 -07:00
sdiv_fix_sat.ll
…
sdiv_fix.ll
…
sdiv-exact.ll
…
sdiv-pow2.ll
…
section_mergeable_size.ll
…
segmented-stacks-dynamic.ll
…
segmented-stacks-standalone.ll
…
segmented-stacks.ll
…
seh-catch-all-win32.ll
…
seh-catch-all.ll
…
seh-catchpad.ll
…
seh-except-finally.ll
…
seh-except-restore.ll
…
seh-exception-code.ll
…
seh-filter-no-personality.ll
…
seh-finally.ll
…
seh-localaddress.ll
…
seh-no-invokes.ll
…
seh-safe-div-win32.ll
…
seh-safe-div.ll
…
seh-stack-realign.ll
…
select_const.ll
…
select_meta.ll
…
select-1-or-neg1.ll
…
select-mmx.ll
…
select-of-fp-constants.ll
…
select-sra.ll
…
select-testb-volatile-load.ll
…
select-with-and-or.ll
…
select.ll
[X86] Handle more cases in combineAddOrSubToADCOrSBB.
2020-04-28 10:39:39 -07:00
selectcc-to-shiftand.ll
…
selectiondag-crash.ll
…
selectiondag-cse.ll
…
selectiondag-debug-loc.ll
…
selectiondag-dominator.ll
…
selectiondag-order.ll
…
semantic-interposition-asm.ll
…
semantic-interposition-comdat.ll
…
serialize-intrinsic.ll
…
setcc-combine.ll
…
setcc-logic.ll
…
setcc-lowering.ll
…
setcc-narrowing.ll
…
setcc-wide-types.ll
…
setcc.ll
…
setjmp-spills.ll
…
setoeq.ll
…
setuge.ll
…
sext-i1.ll
…
sext-load.ll
…
sext-ret-val.ll
…
sext-setcc-self.ll
…
sext-subreg.ll
…
sext-trunc.ll
…
sha.ll
…
shadow-stack.ll
…
shift_minsize.ll
…
shift-amount-mod.ll
…
shift-and-x86_64.ll
…
shift-and.ll
…
shift-avx2-crash.ll
…
shift-bmi2.ll
…
shift-by-signext.ll
…
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine-crash.ll
…
shift-combine.ll
[X86] Don't return true from isTruncateFree for vectors
2020-04-30 16:43:35 -07:00
shift-double-x86_64.ll
…
shift-double.ll
…
shift-folding.ll
…
shift-i128.ll
…
shift-i256.ll
…
shift-logic.ll
…
shift-mask.ll
…
shift-one.ll
…
shift-pair.ll
…
shift-parts.ll
…
shift-pcmp.ll
…
shl_elim.ll
…
shl_undef.ll
…
shl-anyext.ll
…
shl-crash-on-legalize.ll
…
shl-i64.ll
…
shrink_vmul_sse.ll
…
shrink_vmul.ll
[DAG] SimplifyMultipleUseDemandedBits - remove superfluous bitcasts
2020-05-08 19:04:49 +01:00
shrink_wrap_dbg_value.mir
…
shrink-compare-pgso.ll
…
shrink-compare.ll
…
shrink-fp-const1.ll
…
shrink-fp-const2.ll
…
shrink-wrap-chkstk-x86_64.ll
…
shrink-wrap-chkstk.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
shrink-wrapping-vla.ll
…
shrinkwrap-hang.ll
…
shuffle-combine-crash-2.ll
…
shuffle-combine-crash-3.ll
…
shuffle-combine-crash.ll
…
shuffle-extract-subvector.ll
…
shuffle-of-insert.ll
…
shuffle-of-splat-multiuses.ll
…
shuffle-strided-with-offset-128.ll
…
shuffle-strided-with-offset-256.ll
…
shuffle-strided-with-offset-512.ll
…
shuffle-vs-trunc-128.ll
…
shuffle-vs-trunc-256.ll
…
shuffle-vs-trunc-512.ll
…
sibcall-2.ll
…
sibcall-3.ll
…
sibcall-4.ll
…
sibcall-5.ll
…
sibcall-6.ll
…
sibcall-byval.ll
…
sibcall-win64.ll
…
sibcall.ll
…
signbit-shift.ll
…
signed-truncation-check.ll
…
simple-register-allocation-read-undef.mir
…
simple-zext.ll
…
sincos-opt.ll
…
sincos.ll
…
sink-addsub-of-const.ll
…
sink-blockfreq.ll
…
sink-cheap-instructions.ll
…
sink-gep-before-mem-inst.ll
…
sink-hoist.ll
…
sink-local-value.ll
…
sink-out-of-loop.ll
…
sitofp.ll
…
sjlj-baseptr.ll
…
sjlj-eh.ll
…
sjlj-shadow-stack-liveness.mir
…
sjlj.ll
…
slow-incdec.ll
…
slow-pmulld.ll
…
slow-unaligned-mem.ll
…
small-byval-memcpy.ll
…
smul_fix_sat_constants.ll
…
smul_fix_sat.ll
…
smul_fix.ll
…
smul-with-overflow.ll
…
soft-fp-legal-in-HW-reg.ll
…
soft-fp.ll
…
soft-sitofp.ll
…
speculative-execution-side-effect-suppression.ll
[x86][seses] Introduce SESES pass for LVI
2020-05-11 09:34:37 -07:00
speculative-load-hardening-call-and-ret.ll
Prevent register coalescing in functions whith setjmp
2020-05-16 00:36:34 +01:00
speculative-load-hardening-gather.ll
…
speculative-load-hardening-indirect.ll
…
speculative-load-hardening-no-spill.ll
[x86/SLH][NFC] Add a test to produce a failed generation.
2020-05-12 11:43:20 +08:00
speculative-load-hardening.ll
…
splat-const.ll
…
splat-for-size.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
split-eh-lpad-edges.ll
…
split-extend-vector-inreg.ll
…
split-store.ll
…
split-vector-bitcast.ll
…
split-vector-rem.ll
…
sqrt-fastmath-mir.ll
…
sqrt-fastmath-tune.ll
…
sqrt-fastmath.ll
…
sqrt-partial.ll
…
sqrt.ll
…
srem-lkk.ll
…
srem-seteq-optsize.ll
…
srem-seteq-vec-nonsplat.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
srem-seteq-vec-splat.ll
…
srem-seteq.ll
…
srem-vector-lkk.ll
…
sret-implicit.ll
…
sse1-fcopysign.ll
…
sse1.ll
…
sse2-intrinsics-canonical.ll
…
sse2-intrinsics-fast-isel-x86_64.ll
…
sse2-intrinsics-fast-isel.ll
…
sse2-intrinsics-x86_64-upgrade.ll
…
sse2-intrinsics-x86_64.ll
…
sse2-intrinsics-x86-upgrade.ll
…
sse2-intrinsics-x86.ll
…
sse2-vector-shifts.ll
…
sse2.ll
…
sse3-avx-addsub-2.ll
…
sse3-avx-addsub.ll
…
sse3-intrinsics-fast-isel.ll
…
sse3-intrinsics-x86.ll
…
sse3.ll
…
sse4a-intrinsics-fast-isel.ll
…
sse4a-upgrade.ll
…
sse4a.ll
…
sse41-intrinsics-fast-isel.ll
…
sse41-intrinsics-x86-upgrade.ll
…
sse41-intrinsics-x86.ll
…
sse41-pmovxrm.ll
…
sse41.ll
…
sse42-intrinsics-fast-isel-x86_64.ll
…
sse42-intrinsics-fast-isel.ll
…
sse42-intrinsics-x86_64.ll
…
sse42-intrinsics-x86.ll
…
sse_partial_update.ll
…
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-commute.ll
…
sse-cvttp2si.ll
…
sse-domains.ll
…
sse-fcopysign.ll
…
sse-fsignum.ll
…
sse-intel-ocl.ll
…
sse-intrinsics-fast-isel-x86_64.ll
…
sse-intrinsics-fast-isel.ll
…
sse-intrinsics-x86_64-upgrade.ll
…
sse-intrinsics-x86_64.ll
…
sse-intrinsics-x86-upgrade.ll
…
sse-intrinsics-x86.ll
…
sse-load-ret.ll
…
sse-minmax.ll
…
sse-only.ll
…
sse-regcall.ll
…
sse-scalar-fp-arith-unary.ll
…
sse-scalar-fp-arith.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
sse-unaligned-mem-feature.ll
…
sse-varargs.ll
…
ssp-data-layout.ll
…
ssp-guard-spill.ll
…
ssse3-intrinsics-fast-isel.ll
…
ssse3-intrinsics-x86.ll
…
ssub_sat_plus.ll
…
ssub_sat_vec.ll
…
ssub_sat.ll
…
stack_guard_remat.ll
…
stack-align2.ll
…
stack-align-memcpy.ll
…
stack-align.ll
…
stack-clash-dynamic-alloca.ll
…
stack-clash-large.ll
…
stack-clash-medium-natural-probes-mutliple-objects.ll
…
stack-clash-medium-natural-probes.ll
…
stack-clash-medium.ll
…
stack-clash-no-free-probe.ll
…
stack-clash-small.ll
…
stack-clash-unknown-call.ll
…
stack-folding-3dnow.ll
…
stack-folding-adx-x86_64.ll
…
stack-folding-adx.mir
…
stack-folding-avx512bf16.ll
…
stack-folding-avx512vp2intersect.ll
…
stack-folding-bmi2.ll
…
stack-folding-bmi2.mir
…
stack-folding-bmi.ll
…
stack-folding-fp-avx1.ll
…
stack-folding-fp-avx512.ll
…
stack-folding-fp-avx512vl.ll
…
stack-folding-fp-nofpexcept.mir
…
stack-folding-fp-sse42.ll
…
stack-folding-int-avx1.ll
…
stack-folding-int-avx2.ll
…
stack-folding-int-avx512.ll
…
stack-folding-int-avx512vl.ll
…
stack-folding-int-avx512vnni.ll
…
stack-folding-int-sse42.ll
…
stack-folding-lwp.ll
…
stack-folding-mmx.ll
…
stack-folding-sha.ll
…
stack-folding-tbm.ll
…
stack-folding-x86_64.ll
…
stack-folding-xop.ll
…
stack-guard-oob.ll
…
stack-probe-red-zone.ll
…
stack-probe-size.ll
…
stack-probes.ll
…
stack-protector-2.ll
…
stack-protector-dbginfo.ll
…
stack-protector-msvc.ll
…
stack-protector-remarks.ll
…
stack-protector-strong-macho-win32-xor.ll
…
stack-protector-target.ll
…
stack-protector-vreg-to-vreg-copy.ll
…
stack-protector-weight.ll
…
stack-protector.ll
…
stack-size-section-function-sections.ll
…
stack-size-section.ll
…
stack-update-frame-opcode.ll
…
StackColoring-dbg.ll
…
StackColoring-use-between-allocas.mir
[StackColoring] When remapping alloca's move the To alloca if the From alloca is before it.
2020-05-19 10:37:27 -07:00
StackColoring.ll
…
stackguard-internal.ll
…
stackmap-fast-isel.ll
…
stackmap-frame-setup.ll
…
stackmap-large-constants.ll
…
stackmap-large-location-size.ll
…
stackmap-liveness.ll
…
stackmap-nops.ll
…
stackmap-shadow-optimization.ll
…
stackmap.ll
…
stackpointer.ll
…
statepoint-allocas.ll
…
statepoint-call-lowering.ll
…
statepoint-duplicates-export.ll
…
statepoint-far-call.ll
…
statepoint-forward.ll
…
statepoint-gctransition-call-lowering.ll
…
statepoint-invoke.ll
…
statepoint-live-in-remat.ll
…
statepoint-live-in.ll
…
statepoint-no-extra-const.ll
…
statepoint-no-realign-stack.ll
…
statepoint-regs.ll
[Statepoint] Constant fold FP deopt args.
2020-05-21 11:02:54 +03:00
statepoint-stack-usage.ll
…
statepoint-stackmap-format.ll
…
statepoint-stackmap-size.ll
…
statepoint-uniqueing.ll
…
statepoint-vector-bad-spill.ll
…
statepoint-vector.ll
…
stdarg.ll
…
stdcall-notailcall.ll
…
stdcall.ll
…
store_op_load_fold2.ll
Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias"
2020-05-22 21:26:46 +02:00
store_op_load_fold.ll
…
store-empty-member.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
store-narrow.ll
…
store-zero-and-minus-one.ll
…
stores-merging.ll
…
storetrunc-fp.ll
…
stride-nine-with-base-reg.ll
…
stride-reuse.ll
…
sttni.ll
…
sub-of-bias.ll
…
sub-of-not.ll
…
sub-with-overflow.ll
…
sub.ll
…
subcarry.ll
…
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-6.ll
…
subvector-broadcast.ll
…
sunkaddr-ext.ll
…
swap.ll
…
swift-error.ll
…
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
…
swiftself.ll
…
switch-bt.ll
…
switch-crit-edge-constant.ll
…
switch-default-only.ll
…
switch-density.ll
…
switch-edge-weight.ll
…
switch-jump-table.ll
…
switch-lower-peel-top-case.ll
…
switch-or.ll
…
switch-order-weight.ll
…
switch-zextload.ll
…
switch.ll
…
SwitchLowering.ll
…
swizzle-2.ll
…
swizzle-avx2.ll
…
SwizzleShuff.ll
…
system-intrinsics-64-xsave.ll
…
system-intrinsics-64-xsavec.ll
…
system-intrinsics-64-xsaveopt.ll
…
system-intrinsics-64-xsaves.ll
…
system-intrinsics-64.ll
…
system-intrinsics-xgetbv.ll
…
system-intrinsics-xsave.ll
…
system-intrinsics-xsavec.ll
…
system-intrinsics-xsaveopt.ll
…
system-intrinsics-xsaves.ll
…
system-intrinsics-xsetbv.ll
…
system-intrinsics.ll
…
tail-call-attrs.ll
…
tail-call-casts.ll
…
tail-call-conditional.mir
…
tail-call-deref.ll
…
tail-call-got.ll
…
tail-call-legality.ll
…
tail-call-mutable-memarg.ll
Reland [X86] Codegen for preallocated
2020-05-20 11:25:44 -07:00
tail-call-parameter-attrs-mismatch.ll
…
tail-call-win64.ll
…
tail-dup-addr.ll
…
tail-dup-catchret.ll
…
tail-dup-debugloc.ll
…
tail-dup-merge-loop-headers.ll
…
tail-dup-no-other-successor.ll
…
tail-dup-partial.ll
…
tail-dup-repeat.ll
…
tail-merge-after-mbp.mir
…
tail-merge-debugloc.ll
…
tail-merge-identical.ll
…
tail-merge-unreachable.ll
…
tail-merge-wineh.ll
…
tail-opts.ll
…
tail-threshold.ll
…
tailcall-64.ll
…
tailcall-assume.ll
…
tailcall-calleesave.ll
…
tailcall-cgp-dup.ll
…
tailcall-disable.ll
…
tailcall-extract.ll
…
tailcall-fastisel.ll
…
tailcall-largecode.ll
…
tailcall-lifetime-end.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-msvc-conventions.ll
…
tailcall-multiret.ll
…
tailcall-pseudo-64.mir
…
tailcall-pseudo.mir
…
tailcall-readnone.ll
…
tailcall-returndup-void.ll
…
tailcall-ri64.ll
…
tailcall-stackalign.ll
…
tailcall-structret.ll
…
tailcall-tailcc.ll
…
tailcall.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallpic3.ll
…
tailcallstack64.ll
…
tailcc-calleesave.ll
…
tailcc-disable-tail-calls.ll
…
tailcc-fastcc.ll
…
tailcc-fastisel.ll
…
tailcc-largecode.ll
…
tailcc-stackalign.ll
…
tailcc-structret.ll
…
tailccbyval64.ll
…
tailccbyval.ll
…
tailccfp2.ll
…
tailccfp.ll
…
tailccpic1.ll
…
tailccpic2.ll
…
tailccstack64.ll
…
taildup-callsiteinfo.mir
…
taildup-crash.ll
…
taildup-heapallocsite.ll
…
tailjmp_gotpcrel_relax_relocation.ll
…
targetLoweringGeneric.ll
…
tbm_patterns.ll
…
tbm-intrinsics-fast-isel-x86_64.ll
…
tbm-intrinsics-fast-isel.ll
…
tbm-intrinsics-x86_64.ll
…
tbm-intrinsics.ll
…
test_x86condbr_globaladdr.mir
…
test-nofold.ll
…
test-shrink-bug.ll
…
test-shrink.ll
…
test-vs-bittest.ll
…
testb-je-fusion.ll
…
testl-commute.ll
…
this-return-64.ll
…
throws-cfi-fp.ll
…
throws-cfi-no-fp.ll
…
tls-addr-non-leaf-function.ll
…
tls-android-negative.ll
…
tls-android.ll
…
tls-local-dynamic.ll
…
tls-models.ll
…
tls-no-plt.ll
…
tls-pic.ll
…
tls-pie.ll
…
tls-shrink-wrapping.ll
…
tls-windows-itanium.ll
…
tls.ll
…
tlv-1.ll
…
tlv-2.ll
…
tlv-3.ll
…
token_landingpad.ll
…
trap.ll
…
tree_way_unsigned_cmp.ll
…
trunc-and.ll
…
trunc-ext-ld-st.ll
…
trunc-store.ll
…
trunc-subvector.ll
…
trunc-to-bool.ll
…
TruncAssertSext.ll
…
TruncAssertZext.ll
…
tsxldtrk-intrinsic.ll
…
twoaddr-coalesce-2.ll
…
twoaddr-coalesce-3.ll
…
twoaddr-coalesce.ll
…
twoaddr-dbg-value.mir
…
twoaddr-lea.ll
…
twoaddr-pass-sink.ll
…
twoaddr-sink-terminator.ll
…
typeid-alias.ll
…
uadd_sat_plus.ll
…
uadd_sat_vec.ll
…
uadd_sat.ll
…
udiv_fix_sat.ll
…
udiv_fix.ll
…
uint64-to-float.ll
…
uint_to_fp-2.ll
…
uint_to_fp-3.ll
…
uint_to_fp.ll
…
umul_fix_sat.ll
…
umul_fix.ll
…
umul-with-carry.ll
…
umul-with-overflow.ll
…
umulo-64-legalisation-lowering.ll
…
umulo-128-legalisation-lowering.ll
…
unaligned-32-byte-memops.ll
…
unaligned-load.ll
…
unaligned-spill-folding.ll
…
undef-eflags.mir
…
undef-globals-bss.ll
…
undef-label.ll
…
undef-ops.ll
…
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
…
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
…
unknown-location.ll
…
unreachable-loop-sinking.ll
…
unreachable-mbb-undef-phi.mir
…
unreachable-trap.ll
…
unreachableblockelim.ll
…
unused_stackslots.ll
…
unwind-init.ll
…
unwindraise.ll
…
update-terminator-debugloc.ll
…
update-terminator.mir
…
urem-i8-constant.ll
…
urem-lkk.ll
…
urem-power-of-two.ll
…
urem-seteq-nonzero.ll
…
urem-seteq-optsize.ll
…
urem-seteq-vec-nonsplat.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
urem-seteq-vec-nonzero.ll
…
urem-seteq-vec-splat.ll
…
urem-seteq-vec-tautological.ll
…
urem-seteq.ll
…
urem-vector-lkk.ll
…
use-add-flags.ll
…
use-cr-result-of-dom-icmp-st.ll
…
usub_sat_plus.ll
…
usub_sat_vec.ll
…
usub_sat.ll
…
utf8.ll
…
utf16-cfstrings.ll
…
uwtables.ll
…
v2f32.ll
…
v4f32-immediate.ll
…
v4i32load-crash.ll
…
v8i1-masks.ll
…
vaargs.ll
…
vaes-intrinsics-avx512-x86.ll
…
vaes-intrinsics-avx512vl-x86.ll
…
vaes-intrinsics-avx-x86.ll
…
var-permute-128.ll
…
var-permute-256.ll
…
var-permute-512.ll
…
vararg_no_start.ll
…
vararg_tailcall.ll
…
vararg-callee-cleanup.ll
…
variable-sized-darwin-bzero.ll
…
variadic-node-pic.ll
…
vastart-defs-eflags.ll
…
vbinop-simplify-bug.ll
…
vec3.ll
…
vec_align_i256.ll
…
vec_align.ll
…
vec_anyext.ll
…
vec_call.ll
…
vec_cast2.ll
…
vec_cast3.ll
…
vec_cast.ll
…
vec_cmp_sint-128.ll
…
vec_cmp_uint-128.ll
…
vec_compare-sse4.ll
…
vec_compare.ll
…
vec_ctbits.ll
…
vec_ext_inreg.ll
…
vec_extract-avx.ll
…
vec_extract-mmx.ll
…
vec_extract-sse4.ll
…
vec_extract.ll
…
vec_fabs.ll
…
vec_floor.ll
…
vec_fneg.ll
…
vec_fp_to_int.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vec_fpext.ll
…
vec_fptrunc.ll
…
vec_i64.ll
…
vec_ins_extract-1.ll
…
vec_ins_extract.ll
…
vec_insert-2.ll
…
vec_insert-3.ll
…
vec_insert-4.ll
…
vec_insert-5.ll
…
vec_insert-7.ll
…
vec_insert-8.ll
…
vec_insert-9.ll
…
vec_insert-mmx.ll
…
vec_int_to_fp.ll
…
vec_loadsingles.ll
…
vec_logical.ll
…
vec_minmax_match.ll
…
vec_minmax_sint.ll
…
vec_minmax_uint.ll
…
vec_partial.ll
…
vec_reassociate.ll
…
vec_return.ll
…
vec_saddo.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vec_sdiv_to_shift.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-A.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-F.ll
…
vec_set-H.ll
…
vec_set.ll
…
vec_setcc-2.ll
…
vec_setcc.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vec_shift2.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
vec_shift3.ll
…
vec_shift4.ll
…
vec_shift5.ll
…
vec_shift6.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
vec_shift7.ll
…
vec_shift.ll
…
vec_shuf-insert.ll
…
vec_smulo.ll
[X86] Remove the v16i8->v16i16 path for MULHS with AVX2.
2020-05-12 10:32:01 -07:00
vec_split.ll
…
vec_ss_load_fold.ll
…
vec_ssubo.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vec_trunc_sext.ll
…
vec_uaddo.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vec_uint_to_fp-fastmath.ll
…
vec_uint_to_fp.ll
…
vec_umulo.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vec_unsafe-fp-math.ll
…
vec_usubo.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vec_zero_cse.ll
…
vec_zero-2.ll
…
vec_zero.ll
…
vec-copysign-avx512.ll
…
vec-copysign.ll
…
vec-libcalls.ll
…
vec-loadsingles-alignment.ll
…
vec-strict-128.ll
…
vec-strict-256.ll
…
vec-strict-512.ll
…
vec-strict-cmp-128.ll
…
vec-strict-cmp-256.ll
…
vec-strict-cmp-512.ll
…
vec-strict-cmp-sub128.ll
…
vec-strict-fptoint-128.ll
…
vec-strict-fptoint-256.ll
…
vec-strict-fptoint-512.ll
…
vec-strict-inttofp-128.ll
…
vec-strict-inttofp-256.ll
…
vec-strict-inttofp-512.ll
…
vec-strict-round-128.ll
…
vec-trunc-store.ll
…
vecloadextract.ll
…
vector_splat-const-shift-of-constmasked.ll
…
vector-bitreverse.ll
…
vector-blend.ll
…
vector-compare-all_of.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-compare-any_of.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-compare-combines.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
vector-compare-results.ll
…
vector-compare-simplify.ll
…
vector-constrained-fp-intrinsics-flags.ll
…
vector-constrained-fp-intrinsics-fma.ll
…
vector-constrained-fp-intrinsics.ll
…
vector-ext-logic.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-extend-inreg.ll
…
vector-fshl-128.ll
[x86][CGP] enable target hook to sink funnel shift intrinsic's splatted shift amount
2020-05-12 18:40:40 -04:00
vector-fshl-256.ll
[x86][CGP] try to hoist funnel shift above select-of-splats
2020-05-16 10:44:47 -04:00
vector-fshl-512.ll
…
vector-fshl-rot-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-fshl-rot-256.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-fshl-rot-512.ll
…
vector-fshr-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-fshr-256.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-fshr-512.ll
…
vector-fshr-rot-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-fshr-rot-256.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-fshr-rot-512.ll
…
vector-gep.ll
…
vector-half-conversions.ll
…
vector-idiv-sdiv-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-idiv-sdiv-256.ll
[X86] Remove the v16i8->v16i16 path for MULHS with AVX2.
2020-05-12 10:32:01 -07:00
vector-idiv-sdiv-512.ll
[X86] Remove the v16i8->v16i16 path for MULHS with AVX2.
2020-05-12 10:32:01 -07:00
vector-idiv-udiv-128.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-idiv-udiv-256.ll
…
vector-idiv-udiv-512.ll
…
vector-idiv-v2i32.ll
[X86] Add a few more shuffles to hasUndefRegUpdate.
2020-05-10 12:30:16 -07:00
vector-idiv.ll
…
vector-interleave.ll
…
vector-intrinsics.ll
…
vector-lzcnt-128.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
vector-lzcnt-256.ll
…
vector-lzcnt-512.ll
…
vector-lzcnt-sub128.ll
…
vector-merge-store-fp-constants.ll
…
vector-mul.ll
…
vector-mulfix-legalize.ll
…
vector-narrow-binop.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
vector-partial-undef.ll
…
vector-pcmp.ll
…
vector-popcnt-128.ll
…
vector-popcnt-256.ll
…
vector-popcnt-512.ll
…
vector-reduce-add.ll
…
vector-reduce-and-bool.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-reduce-and.ll
…
vector-reduce-fadd-fast.ll
…
vector-reduce-fadd.ll
…
vector-reduce-fmax-nnan.ll
…
vector-reduce-fmax.ll
…
vector-reduce-fmin-nnan.ll
…
vector-reduce-fmin.ll
…
vector-reduce-fmul-fast.ll
…
vector-reduce-fmul.ll
…
vector-reduce-mul.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-reduce-or-bool.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-reduce-or.ll
…
vector-reduce-smax.ll
…
vector-reduce-smin.ll
[DAG] SimplifyDemandedVectorElts - remove INSERT_SUBVECTOR if we don't demand the subvector
2020-05-01 16:20:51 +01:00
vector-reduce-umax.ll
…
vector-reduce-umin.ll
…
vector-reduce-xor-bool.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-reduce-xor.ll
…
vector-rem.ll
…
vector-rotate-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-rotate-256.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-rotate-512.ll
…
vector-sext.ll
[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoad
2020-05-02 15:18:10 -07:00
vector-shift-ashr-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shift-ashr-256.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shift-ashr-512.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shift-ashr-sub128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shift-by-select-loop.ll
[x86][CGP] improve sinking of splatted vector shift amount operand
2020-05-14 08:36:03 -04:00
vector-shift-lshr-128.ll
…
vector-shift-lshr-256.ll
…
vector-shift-lshr-512.ll
…
vector-shift-lshr-sub128.ll
…
vector-shift-shl-128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shift-shl-256.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shift-shl-512.ll
…
vector-shift-shl-sub128.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shuffle-128-unpck.ll
…
vector-shuffle-128-v2.ll
…
vector-shuffle-128-v4.ll
…
vector-shuffle-128-v8.ll
…
vector-shuffle-128-v16.ll
…
vector-shuffle-256-v4.ll
…
vector-shuffle-256-v8.ll
…
vector-shuffle-256-v16.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vector-shuffle-256-v32.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
vector-shuffle-512-v8.ll
[X86] Add a few more shuffles to hasUndefRegUpdate.
2020-05-10 12:30:16 -07:00
vector-shuffle-512-v16.ll
…
vector-shuffle-512-v32.ll
…
vector-shuffle-512-v64.ll
…
vector-shuffle-avx512.ll
…
vector-shuffle-combining-avx2.ll
[X86][AVX] Don't let X86ISD::BROADCAST peek through bitcasts to illegal types.
2020-05-08 12:30:50 +01:00
vector-shuffle-combining-avx512bw.ll
…
vector-shuffle-combining-avx512bwvl.ll
…
vector-shuffle-combining-avx512f.ll
…
vector-shuffle-combining-avx512vbmi.ll
…
vector-shuffle-combining-avx.ll
…
vector-shuffle-combining-sse4a.ll
…
vector-shuffle-combining-sse41.ll
…
vector-shuffle-combining-ssse3.ll
…
vector-shuffle-combining-xop.ll
…
vector-shuffle-combining.ll
[X86][SSE] getFauxShuffle - account for PEXTW/PEXTB implicit zero-extension
2020-04-27 12:46:50 +01:00
vector-shuffle-masked.ll
…
vector-shuffle-mmx.ll
…
vector-shuffle-sse1.ll
…
vector-shuffle-sse4a.ll
…
vector-shuffle-sse41.ll
[X86] Add PACK instructions to hasUndefRegUpdate so the BreakFalseDeps pass will reassign an undef second source to match the first source
2020-04-28 15:11:32 -07:00
vector-shuffle-v1.ll
…
vector-shuffle-v48.ll
…
vector-shuffle-variable-128.ll
…
vector-shuffle-variable-256.ll
…
vector-sqrt.ll
…
vector-trunc-math.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc-packus.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc-ssat.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc-usat.ll
[X86] Custom legalize v16i64->v16i8 truncate with avx512.
2020-05-03 23:26:04 -07:00
vector-trunc.ll
…
vector-truncate-combine.ll
…
vector-tzcnt-128.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
vector-tzcnt-256.ll
…
vector-tzcnt-512.ll
…
vector-unsigned-cmp.ll
…
vector-variable-idx2.ll
…
vector-variable-idx.ll
…
vector-width-store-merge.ll
…
vector-zext.ll
…
vector-zmov.ll
…
vector.ll
…
vectorcall.ll
…
version_directive.ll
…
vfcmp.ll
…
viabs.ll
…
virtreg-physreg-def-regallocfast.mir
…
virtual-registers-cleared-in-machine-functions-liveins.ll
…
visibility2.ll
…
visibility.ll
…
vmaskmov-offset.ll
…
vmovq.ll
[x86] favor vector constant load to avoid GPR to XMM transfer
2020-05-17 11:56:26 -04:00
volatile-memstores-nooverlapping-load-stores.ll
…
volatile.ll
…
vortex-bug.ll
…
vp2intersect_multiple_pairs.ll
[X86] Move expansion of MASKPAIR16LOAD and MASKPAIR16STORE from X86MCInstLower to X86ExpandPseudo.
2020-05-15 09:51:32 -07:00
vpshufbitqbm-intrinsics-upgrade.ll
…
vpshufbitqbm-intrinsics.ll
…
vsel-cmp-load.ll
…
vselect-2.ll
…
vselect-avx.ll
…
vselect-constants.ll
…
vselect-minmax.ll
…
vselect-packss.ll
…
vselect-pcmp.ll
…
vselect-zero.ll
…
vselect.ll
…
vshift_scalar.ll
…
vshift_split2.ll
…
vshift_split.ll
…
vshift-1.ll
…
vshift-2.ll
…
vshift-3.ll
…
vshift-4.ll
…
vshift-5.ll
…
vshift-6.ll
…
vshli-simplify-demanded-bits.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
vsplit-and.ll
…
vzero-excess.ll
…
waitpkg-intrinsics.ll
…
warn-stack.ll
…
wbinvd-intrinsic.ll
…
wbnoinvd-intrinsic.ll
…
weak_def_can_be_hidden.ll
…
weak-undef.ll
…
weak.ll
…
webkit-jscc.ll
…
wide-fma-contraction.ll
…
wide-integer-cmp.ll
…
wide-integer-fold.ll
…
widen_arith-1.ll
…
widen_arith-2.ll
…
widen_arith-3.ll
…
widen_arith-4.ll
…
widen_arith-5.ll
…
widen_arith-6.ll
…
widen_bitops-0.ll
…
widen_bitops-1.ll
…
widen_cast-1.ll
…
widen_cast-2.ll
…
widen_cast-3.ll
…
widen_cast-4.ll
…
widen_cast-5.ll
…
widen_cast-6.ll
…
widen_compare-1.ll
…
widen_conv-1.ll
…
widen_conv-2.ll
…
widen_conv-3.ll
…
widen_conv-4.ll
…
widen_conversions.ll
…
widen_extract-1.ll
…
widen_load-0.ll
…
widen_load-1.ll
…
widen_load-2.ll
…
widen_load-3.ll
…
widen_mul.ll
[X86] Teach getUndefRegClearance that we use undef for inputs to PUNPCK in some cases.
2020-05-09 12:19:30 -07:00
widen_shuffle-1.ll
…
WidenArith.ll
…
widened-broadcast.ll
…
win32_sret.ll
…
win32-bool.ll
…
win32-eh-available-externally.ll
…
win32-eh-states.ll
…
win32-eh.ll
…
win32-pic-jumptable.ll
…
win32-preemption.ll
…
win32-seh-catchpad-realign.ll
…
win32-seh-catchpad.ll
…
win32-seh-nested-finally.ll
…
win32-spill-xmm.ll
…
win32-ssp.ll
…
win64_alloca_dynalloca.ll
…
win64_call_epi.ll
…
win64_eh_leaf2.ll
…
win64_eh_leaf.ll
…
win64_eh.ll
…
win64_frame.ll
…
win64_nonvol.ll
…
win64_params.ll
…
win64_sibcall.ll
…
win64_vararg.ll
…
win64-bool.ll
…
win64-byval.ll
…
win64-eh-empty-block-2.mir
…
win64-eh-empty-block.ll
…
win64-funclet-savexmm.ll
…
win64-jumptable.ll
…
win64-long-double.ll
…
win64-nosse-csrs.ll
…
win64-stackprobe-overflow.ll
…
win_chkstk.ll
…
win_coreclr_chkstk_liveins.mir
…
win_coreclr_chkstk.ll
…
win_cst_pool.ll
…
win-alloca-expander.ll
…
win-catchpad-csrs.ll
…
win-catchpad-nested-cxx.ll
[Windows EH] Fix the order of Nested try-catches in $tryMap$ table
2020-05-15 22:03:43 -07:00
win-catchpad-nested.ll
…
win-catchpad-varargs.ll
…
win-catchpad.ll
…
win-cleanuppad.ll
…
win-funclet-cfi.ll
…
win-mixed-ehpersonality.ll
…
win-smallparams.ll
…
windows-itanium-alloca.ll
…
wineh-coreclr.ll
…
wineh-exceptionpointer.ll
…
wineh-no-ehpads.ll
…
x32-cet-intrinsics.ll
…
x32-function_pointer-1.ll
…
x32-function_pointer-2.ll
…
x32-function_pointer-3.ll
…
x32-indirectbr.ll
…
x32-landingpad.ll
…
x32-lea-1.ll
…
x32-movtopush64.ll
…
x32-va_start.ll
…
x64-cet-intrinsics.ll
…
x86_64-mul-by-const.ll
…
x86-16.ll
…
x86-32-intrcc.ll
…
x86-32-vector-calling-conv.ll
…
x86-64-and-mask.ll
…
x86-64-arg.ll
…
x86-64-asm.ll
…
x86-64-baseptr.ll
…
x86-64-bittest-logic.ll
…
x86-64-call.ll
…
x86-64-disp.ll
…
x86-64-double-precision-shift-left.ll
…
x86-64-double-precision-shift-right.ll
…
x86-64-double-shifts-Oz-Os-O2.ll
…
x86-64-double-shifts-var.ll
…
x86-64-extend-shift.ll
…
x86-64-flags-intrinsics.ll
…
x86-64-gv-offset.ll
…
x86-64-intrcc-nosse.ll
…
x86-64-intrcc.ll
…
x86-64-jumps.ll
…
x86-64-mem.ll
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x86-64-ms_abi-vararg.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-pic-12.ll
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x86-64-pic.ll
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x86-64-plt-relative-reloc.ll
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x86-64-psub.ll
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x86-64-ptr-arg-simple.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return-2.ll
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x86-64-sret-return.ll
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x86-64-stack-and-frame-ptr.ll
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x86-64-static-relo-movl.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-64-veccallcc.ll
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x86-big-ret.ll
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x86-cmov-converter.ll
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x86-flags-intrinsics.ll
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x86-fold-pshufb.ll
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x86-framelowering-trap.ll
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x86-inline-asm-validation.ll
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x86-interleaved-access.ll
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x86-interleaved-check.ll
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x86-interrupt_cc.ll
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x86-interrupt_cld.ll
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x86-interrupt_vzeroupper.ll
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x86-mixed-alignment-dagcombine.ll
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x86-no_caller_saved_registers-preserve.ll
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x86-no_caller_saved_registers.ll
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x86-plt-relative-reloc.ll
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x86-repmov-copy-eflags.ll
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x86-sanitizer-shrink-wrapping.ll
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x86-setcc-int-to-fp-combine.ll
[X86] Fix combineVectorCompareAndMaskUnaryOp regression after 0e8e731449
2020-05-10 19:03:38 -07:00
x86-shifts.ll
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x86-shrink-wrap-unwind.ll
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x86-shrink-wrapping.ll
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x86-store-gv-addr.ll
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x86-upgrade-avx2-vbroadcast.ll
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x86-upgrade-avx-vbroadcast.ll
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x86-win64-shrink-wrapping.ll
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x87-reg-usage.mir
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x87.ll
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xaluo.ll
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xchg-nofold.ll
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xmm-r64.ll
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xmulo.ll
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xop-ifma.ll
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xop-intrinsics-fast-isel.ll
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xop-intrinsics-x86_64-upgrade.ll
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xop-intrinsics-x86_64.ll
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xop-mask-comments.ll
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xop-pcmov.ll
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xor-combine-debugloc.ll
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xor-icmp.ll
[x86] add tests for awkward 'icmp eq i1'; NFC
2020-04-29 14:39:47 -04:00
xor-select-i1-combine.ll
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xor.ll
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xray-attribute-instrumentation.ll
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xray-custom-log.ll
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xray-empty-firstmbb.mir
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xray-ignore-loop-detection.ll
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xray-log-args.ll
[XRay] Change Sled.Function to PC-relative for sled version 2 and make llvm-xray support sled version 2 addresses
2020-04-24 14:41:56 -07:00
xray-loop-detection.ll
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xray-multiplerets-in-blocks.mir
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xray-partial-instrumentation-skip-entry.ll
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xray-partial-instrumentation-skip-exit.ll
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xray-section-group.ll
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xray-selective-instrumentation-miss.ll
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xray-selective-instrumentation.ll
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xray-tail-call-sled.ll
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xray-typed-event-log.ll
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xtest.ll
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zero-remat.ll
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zext-demanded.ll
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zext-extract_subreg.ll
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zext-fold.ll
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zext-inreg-0.ll
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zext-inreg-1.ll
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zext-logicop-shift-load.ll
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zext-sext.ll
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zext-shl.ll
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zext-trunc.ll
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zlib-longest-match.ll
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