51eefa8164
These registers are used as operands for instructions that expect an
integer register, so they should be added to Int32Regs or Int64Regs
register classes. Otherwise the machine verifier emits an error for
the following LIT tests when LLVM_ENABLE_MACHINE_VERIFIER=1
environment variable is set:
*** Bad machine code: Illegal physical register for instruction ***
- function: kernel_func
- basic block: %bb.0 entry (0x55c8903d5438)
- instruction: %3:int64regs = LEA_ADDRi64 $vrframelocal, 0
- operand 1: $vrframelocal
$vrframelocal is not a Int64Regs register.
CodeGen/NVPTX/call-with-alloca-buffer.ll
CodeGen/NVPTX/disable-opt.ll
CodeGen/NVPTX/lower-alloca.ll
CodeGen/NVPTX/lower-args.ll
CodeGen/NVPTX/param-align.ll
CodeGen/NVPTX/reg-types.ll
DebugInfo/NVPTX/dbg-declare-alloca.ll
DebugInfo/NVPTX/dbg-value-const-byref.ll
Differential Revision: https://reviews.llvm.org/D110164
95 lines
3.6 KiB
C++
95 lines
3.6 KiB
C++
//=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the NVPTX implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "NVPTXFrameLowering.h"
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#include "NVPTX.h"
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#include "NVPTXRegisterInfo.h"
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#include "NVPTXSubtarget.h"
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#include "NVPTXTargetMachine.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/MC/MachineLocation.h"
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using namespace llvm;
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NVPTXFrameLowering::NVPTXFrameLowering()
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: TargetFrameLowering(TargetFrameLowering::StackGrowsUp, Align(8), 0) {}
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bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
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void NVPTXFrameLowering::emitPrologue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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if (MF.getFrameInfo().hasStackObjects()) {
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assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
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MachineInstr *MI = &MBB.front();
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MachineRegisterInfo &MR = MF.getRegInfo();
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const NVPTXRegisterInfo *NRI =
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MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo();
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// This instruction really occurs before first instruction
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// in the BB, so giving it no debug location.
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DebugLoc dl = DebugLoc();
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// Emits
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// mov %SPL, %depot;
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// cvta.local %SP, %SPL;
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// for local address accesses in MF.
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bool Is64Bit =
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static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
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unsigned CvtaLocalOpcode =
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(Is64Bit ? NVPTX::cvta_local_yes_64 : NVPTX::cvta_local_yes);
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unsigned MovDepotOpcode =
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(Is64Bit ? NVPTX::MOV_DEPOT_ADDR_64 : NVPTX::MOV_DEPOT_ADDR);
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if (!MR.use_empty(NRI->getFrameRegister(MF))) {
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// If %SP is not used, do not bother emitting "cvta.local %SP, %SPL".
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MI = BuildMI(MBB, MI, dl,
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MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
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NRI->getFrameRegister(MF))
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.addReg(NRI->getFrameLocalRegister(MF));
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}
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BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
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NRI->getFrameLocalRegister(MF))
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.addImm(MF.getFunctionNumber());
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}
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}
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StackOffset
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NVPTXFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
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Register &FrameReg) const {
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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FrameReg = NVPTX::VRDepot;
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return StackOffset::getFixed(MFI.getObjectOffset(FI) -
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getOffsetOfLocalArea());
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}
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void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {}
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// This function eliminates ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP pseudo instructions
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MachineBasicBlock::iterator NVPTXFrameLowering::eliminateCallFramePseudoInstr(
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MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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// Simply discard ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP instructions.
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return MBB.erase(I);
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}
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TargetFrameLowering::DwarfFrameBase
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NVPTXFrameLowering::getDwarfFrameBase(const MachineFunction &MF) const {
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return {DwarfFrameBase::CFA, {0}};
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}
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