facff468b6
GPR uses argument registers as the first group of registers to allocate. This patch uses vector argument registers, v8 to v23, as the first group to allocate. Differential Revision: https://reviews.llvm.org/D111304
311 lines
10 KiB
LLVM
311 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; RUN: llc -relocation-model=pic -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I-PIC %s
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declare i32 @external_function(i32)
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define i32 @test_call_external(i32 %a) nounwind {
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; RV32I-LABEL: test_call_external:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: call external_function@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_external:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: call external_function@plt
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call i32 @external_function(i32 %a)
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ret i32 %1
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}
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declare dso_local i32 @dso_local_function(i32)
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define i32 @test_call_dso_local(i32 %a) nounwind {
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; RV32I-LABEL: test_call_dso_local:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: call dso_local_function
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_dso_local:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: call dso_local_function
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call i32 @dso_local_function(i32 %a)
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ret i32 %1
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}
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define i32 @defined_function(i32 %a) nounwind {
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; RV32I-LABEL: defined_function:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi a0, a0, 1
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: defined_function:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi a0, a0, 1
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; RV32I-PIC-NEXT: ret
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%1 = add i32 %a, 1
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ret i32 %1
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}
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define i32 @test_call_defined(i32 %a) nounwind {
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; RV32I-LABEL: test_call_defined:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: call defined_function@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_defined:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: call defined_function@plt
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call i32 @defined_function(i32 %a)
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ret i32 %1
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}
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define i32 @test_call_indirect(i32 (i32)* %a, i32 %b) nounwind {
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; RV32I-LABEL: test_call_indirect:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv a2, a0
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; RV32I-NEXT: mv a0, a1
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_indirect:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: mv a2, a0
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; RV32I-PIC-NEXT: mv a0, a1
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; RV32I-PIC-NEXT: jalr a2
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call i32 %a(i32 %b)
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ret i32 %1
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}
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; Make sure we don't use t0 as the source for jalr as that is a hint to pop the
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; return address stack on some microarchitectures.
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define i32 @test_call_indirect_no_t0(i32 (i32, i32, i32, i32, i32, i32, i32)* %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) nounwind {
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; RV32I-LABEL: test_call_indirect_no_t0:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv t1, a0
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; RV32I-NEXT: mv a0, a1
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; RV32I-NEXT: mv a1, a2
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; RV32I-NEXT: mv a2, a3
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; RV32I-NEXT: mv a3, a4
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; RV32I-NEXT: mv a4, a5
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; RV32I-NEXT: mv a5, a6
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; RV32I-NEXT: mv a6, a7
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; RV32I-NEXT: jalr t1
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_indirect_no_t0:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: mv t1, a0
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; RV32I-PIC-NEXT: mv a0, a1
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; RV32I-PIC-NEXT: mv a1, a2
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; RV32I-PIC-NEXT: mv a2, a3
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; RV32I-PIC-NEXT: mv a3, a4
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; RV32I-PIC-NEXT: mv a4, a5
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; RV32I-PIC-NEXT: mv a5, a6
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; RV32I-PIC-NEXT: mv a6, a7
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; RV32I-PIC-NEXT: jalr t1
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call i32 %a(i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h)
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ret i32 %1
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}
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; Ensure that calls to fastcc functions aren't rejected. Such calls may be
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; introduced when compiling with optimisation.
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define fastcc i32 @fastcc_function(i32 %a, i32 %b) nounwind {
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; RV32I-LABEL: fastcc_function:
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; RV32I: # %bb.0:
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; RV32I-NEXT: add a0, a0, a1
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: fastcc_function:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: add a0, a0, a1
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; RV32I-PIC-NEXT: ret
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%1 = add i32 %a, %b
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ret i32 %1
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}
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define i32 @test_call_fastcc(i32 %a, i32 %b) nounwind {
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; RV32I-LABEL: test_call_fastcc:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv s0, a0
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; RV32I-NEXT: call fastcc_function@plt
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; RV32I-NEXT: mv a0, s0
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; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_fastcc:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: mv s0, a0
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; RV32I-PIC-NEXT: call fastcc_function@plt
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; RV32I-PIC-NEXT: mv a0, s0
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; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call fastcc i32 @fastcc_function(i32 %a, i32 %b)
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ret i32 %a
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}
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declare i32 @external_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind
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define i32 @test_call_external_many_args(i32 %a) nounwind {
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; RV32I-LABEL: test_call_external_many_args:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32I-NEXT: mv s0, a0
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; RV32I-NEXT: sw a0, 4(sp)
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; RV32I-NEXT: sw a0, 0(sp)
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; RV32I-NEXT: mv a1, a0
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; RV32I-NEXT: mv a2, a0
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; RV32I-NEXT: mv a3, a0
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; RV32I-NEXT: mv a4, a0
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; RV32I-NEXT: mv a5, a0
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; RV32I-NEXT: mv a6, a0
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; RV32I-NEXT: mv a7, a0
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; RV32I-NEXT: call external_many_args@plt
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; RV32I-NEXT: mv a0, s0
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; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_external_many_args:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: mv s0, a0
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; RV32I-PIC-NEXT: sw a0, 4(sp)
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; RV32I-PIC-NEXT: sw a0, 0(sp)
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; RV32I-PIC-NEXT: mv a1, a0
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; RV32I-PIC-NEXT: mv a2, a0
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; RV32I-PIC-NEXT: mv a3, a0
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; RV32I-PIC-NEXT: mv a4, a0
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; RV32I-PIC-NEXT: mv a5, a0
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; RV32I-PIC-NEXT: mv a6, a0
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; RV32I-PIC-NEXT: mv a7, a0
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; RV32I-PIC-NEXT: call external_many_args@plt
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; RV32I-PIC-NEXT: mv a0, s0
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; RV32I-PIC-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call i32 @external_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
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i32 %a, i32 %a, i32 %a, i32 %a, i32 %a)
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ret i32 %a
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}
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define i32 @defined_many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 %j) nounwind {
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; RV32I-LABEL: defined_many_args:
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; RV32I: # %bb.0:
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; RV32I-NEXT: lw a0, 4(sp)
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; RV32I-NEXT: addi a0, a0, 1
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: defined_many_args:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: lw a0, 4(sp)
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; RV32I-PIC-NEXT: addi a0, a0, 1
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; RV32I-PIC-NEXT: ret
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%added = add i32 %j, 1
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ret i32 %added
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}
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define i32 @test_call_defined_many_args(i32 %a) nounwind {
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; RV32I-LABEL: test_call_defined_many_args:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-NEXT: sw a0, 4(sp)
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; RV32I-NEXT: sw a0, 0(sp)
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; RV32I-NEXT: mv a1, a0
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; RV32I-NEXT: mv a2, a0
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; RV32I-NEXT: mv a3, a0
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; RV32I-NEXT: mv a4, a0
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; RV32I-NEXT: mv a5, a0
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; RV32I-NEXT: mv a6, a0
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; RV32I-NEXT: mv a7, a0
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; RV32I-NEXT: call defined_many_args@plt
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; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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;
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; RV32I-PIC-LABEL: test_call_defined_many_args:
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; RV32I-PIC: # %bb.0:
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; RV32I-PIC-NEXT: addi sp, sp, -16
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; RV32I-PIC-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32I-PIC-NEXT: sw a0, 4(sp)
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; RV32I-PIC-NEXT: sw a0, 0(sp)
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; RV32I-PIC-NEXT: mv a1, a0
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; RV32I-PIC-NEXT: mv a2, a0
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; RV32I-PIC-NEXT: mv a3, a0
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; RV32I-PIC-NEXT: mv a4, a0
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; RV32I-PIC-NEXT: mv a5, a0
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; RV32I-PIC-NEXT: mv a6, a0
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; RV32I-PIC-NEXT: mv a7, a0
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; RV32I-PIC-NEXT: call defined_many_args@plt
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; RV32I-PIC-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32I-PIC-NEXT: addi sp, sp, 16
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; RV32I-PIC-NEXT: ret
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%1 = call i32 @defined_many_args(i32 %a, i32 %a, i32 %a, i32 %a, i32 %a,
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i32 %a, i32 %a, i32 %a, i32 %a, i32 %a)
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ret i32 %1
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}
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