caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
b52a8564ce99c0244fcf2db315c5555a46883ff2
clang-p2996/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Benjamin Kramer 5ea0349ef5 When lowering an inreg sext first shift left, then right arithmetically. 
Shifting right two times will only yield zero. Should fix
SingleSource/UnitTests/SignlessTypes/factor.

llvm-svn: 172322
2013-01-12 19:06:44 +00:00

24 KiB
Raw Blame History

View Raw
Reference in New Issue View Git Blame Copy Permalink