b5d8a03de4
Some ASIMD FP convert instructions have incorrect scheduling information. These instructions currently have latency 2, throughput 4 and utilise pipeline V. This patch corrects the scheduling models to match the relevant Software Optimization Guide. The V1 and V2 Software Optimization Guide show that ASIMD FP convert instructions should all utilise pipelines V02. Their execution latency and throughput should also differ depending on form. See section 3.17 "ASIMD floating-point instructions" in the Neoverse-V1 and Neoverse-V2 Software Optimization Guide for characteristics of instruction performance. Reference: - V1 SOG: https://developer.arm.com/documentation/109897/latest/ - V2 SOG: https://developer.arm.com/documentation/109898/latest/
The LLVM Compiler Infrastructure
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