Files
clang-p2996/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Stanislav Mekhanoshin 747f67e034 [AMDGPU] Fix adjustWritemask subreg handling
If we happen to extract a non-dword subreg that breaks the
logic of the function and it may shrink the dmask because
it does not recognize the use of a lane(s).

This bug is next to impossible to trigger with the current
lowering in the BE, but it breaks in one of my future patches.

Differential Revision: https://reviews.llvm.org/D93782
2020-12-23 14:43:31 -08:00

436 KiB