Files
clang-p2996/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
Florian Hahn 603c6455d2 [AArch64][SVE] Asm: Extend EnforceVectorSubVectorTypeIs to distinguish Scalable Vectors
Patch [1/5] in a series to add assembler/disassembler support for AArch64 SVE
unpredicated ADD/SUB instructions.

Patch by Sander De Smalen.

Reviewed by: rengolin

Differential Revision: https://reviews.llvm.org/D39087

llvm-svn: 317564
2017-11-07 10:43:56 +00:00

154 KiB