Files
clang-p2996/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
Andrew Litteken 0c4bbd293e [IRSim] Make sure the first instruction of a block doesn't get missed if it is the first valid instruction in Module.
If an instruction is first legal instruction in the module, and is the only legal instruction in its basic block, it will be ignored by the outliner due to a length check inherited from the older version of the outliner that was restricted to outlining within a single basic block. This removes that check, and updates any tests that broke because of it.

Reviewer: paquette

Differential Revision: https://reviews.llvm.org/D120786
2022-03-13 23:13:09 -05:00

48 KiB