Files
clang-p2996/llvm/lib/Target/AArch64/AArch64SystemOperands.td
Simon Tatham a4ac40e92f [AArch64] Remove PRBAR0_ELn and PRLAR0_ELn sysregs.
The Armv8-R.64 architecture defines numbered MPU region registers with
indices 1-15, not 0-15. So there's no such register as PRBAR0_EL2 or
PRLAR0_EL1 (for example). The encodings that they would occupy are
used for the unnumbered PRBAR_ELn and PRLAR_ELn registers.

Reviewed By: labrinea

Differential Revision: https://reviews.llvm.org/D117755
2022-01-20 13:37:58 +00:00

89 KiB