alex-t 9e03e8c99e [AMDGPU] Enable fneg and fabs divergence-driven instruction selection. ...

Detailed description: We currently have a set of patterns to select ISD::FNEG and ISD::FABS to the bitwise operations.  We need to make them predicated to select the VALU or SALU bitwise operation variant according to the SDNode divergence bit.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D114257

2021-11-23 19:37:07 +03:00

3.2 KiB

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