Files
clang-p2996/llvm/test/CodeGen/PowerPC/fp-strict.ll
Jessica Clarke 95ef464ac9 Handle subregs and superregs in callee-saved register mask
If a target lists both a subreg and a superreg in a callee-saved
register mask, the prolog will spill both aliasing registers. Instead,
don't spill the subreg if a superreg is being spilled. This case is hit by the
PowerPC SPE code, as well as a modified RISC-V backend for CHERI I maintain out
of tree.

Reviewed By: jhibbits

Differential Revision: https://reviews.llvm.org/D73170
2021-07-29 16:53:29 +01:00

64 KiB