31f9519d48
Full write up: https://gist.github.com/mshockwave/66e98d099256deefc062633909bb7b5b The existing CodeEmitterGen infrastructure is unable to generate encoder function for ISAs with variable-length instructions. This patch introduces a new infrastructure to support variable-length instruction encoding, including a new TableGen syntax for writing instruction encoding directives and a new TableGen backend component, VarLenCodeEmitterGen, built on top of CodeEmitterGen. Differential Revision: https://reviews.llvm.org/D115128
26 lines
835 B
C++
26 lines
835 B
C++
//===- VarLenCodeEmitterGen.h - CEG for variable-length insts ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declare the CodeEmitterGen component for variable-length
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// instructions. See the .cpp file for more details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_UTILS_TABLEGEN_VARLENCODEEMITTERGEN_H
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#define LLVM_UTILS_TABLEGEN_VARLENCODEEMITTERGEN_H
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namespace llvm {
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class RecordKeeper;
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class raw_ostream;
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void emitVarLenCodeEmitter(RecordKeeper &R, raw_ostream &OS);
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} // end namespace llvm
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#endif
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