Files
clang-p2996/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Carl Ritson 8967d044fc [AMDGPU] Add SIMemoryLegalizer comments to clarify bit usage
Attempt to further document the intended cache policies requested
by different combinations of GLC, SLC and DLC bits.
GFX10 non-temporal stores are updated to set GLC.

Reviewed By: t-tye

Differential Revision: https://reviews.llvm.org/D114351
2021-11-26 21:05:58 +09:00

68 KiB