Files
clang-p2996/llvm/lib/Target/Mips/MipsFrameLowering.cpp
Simon Dardis 725acb2d91 [mips] Use register scavenging with MSA.
MSA stores and loads to the stack are more likely to require an
emergency GPR spill slot due to the smaller offsets available
with those instructions.

Handle this by overestimating the size of the stack by determining
the largest offset presuming that all callee save registers are
spilled and accounting of incoming arguments when determining
whether an emergency spill slot is required.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D39056

llvm-svn: 317204
2017-11-02 12:47:22 +00:00

5.7 KiB