725584e26d
Summary: Make it possible to feed runtime information back to tablegen to enable profile-guided tablegen-eration, detection of untested tablegen definitions, etc. Being a cross-compiler by nature, LLVM will potentially collect data for multiple architectures (e.g. when running 'ninja check'). We therefore need a way for TableGen to figure out what data applies to the backend it is generating at the time. This patch achieves that by including the name of the 'def X : Target ...' for the backend in the TargetRegistry. Reviewers: qcolombet Reviewed By: qcolombet Subscribers: jholewinski, arsenm, jyknight, aditya_nandakumar, sdardis, nemanjai, ab, nhaehnle, t.p.northover, javed.absar, qcolombet, llvm-commits, fedor.sergeev Differential Revision: https://reviews.llvm.org/D39742 llvm-svn: 318352
30 lines
956 B
C++
30 lines
956 B
C++
//===-- X86TargetInfo.cpp - X86 Target Implementation ---------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/X86MCTargetDesc.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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Target &llvm::getTheX86_32Target() {
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static Target TheX86_32Target;
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return TheX86_32Target;
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}
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Target &llvm::getTheX86_64Target() {
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static Target TheX86_64Target;
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return TheX86_64Target;
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}
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extern "C" void LLVMInitializeX86TargetInfo() {
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RegisterTarget<Triple::x86, /*HasJIT=*/true> X(
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getTheX86_32Target(), "x86", "32-bit X86: Pentium-Pro and above", "X86");
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RegisterTarget<Triple::x86_64, /*HasJIT=*/true> Y(
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getTheX86_64Target(), "x86-64", "64-bit X86: EM64T and AMD64", "X86");
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}
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