Files
clang-p2996/llvm/test/CodeGen/PowerPC/2012-10-11-dynalloc.ll
Ulrich Weigand 3946877f88 Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.

llvm-svn: 167855
2012-11-13 18:40:58 +00:00

554 B