e2bfcd6394
This patch aims to provide correct dwarf unwind information in function epilogue for X86. It consists of two parts. The first part inserts CFI instructions that set appropriate cfa offset and cfa register in emitEpilogue() in X86FrameLowering. This part is X86 specific. The second part is platform independent and ensures that: * CFI instructions do not affect code generation (they are not counted as instructions when tail duplicating or tail merging) * Unwind information remains correct when a function is modified by different passes. This is done in a late pass by analyzing information about cfa offset and cfa register in BBs and inserting additional CFI directives where necessary. Added CFIInstrInserter pass: * analyzes each basic block to determine cfa offset and register are valid at its entry and exit * verifies that outgoing cfa offset and register of predecessor blocks match incoming values of their successors * inserts additional CFI directives at basic block beginning to correct the rule for calculating CFA Having CFI instructions in function epilogue can cause incorrect CFA calculation rule for some basic blocks. This can happen if, due to basic block reordering, or the existence of multiple epilogue blocks, some of the blocks have wrong cfa offset and register values set by the epilogue block above them. CFIInstrInserter is currently run only on X86, but can be used by any target that implements support for adding CFI instructions in epilogue. Patch by Violeta Vukobrat. Differential Revision: https://reviews.llvm.org/D42848 llvm-svn: 330706
436 lines
13 KiB
LLVM
436 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
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; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
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define i32 @test_ret_i32() {
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; X32-LABEL: test_ret_i32:
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; X32: # %bb.0:
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; X32-NEXT: movl $20, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_ret_i32:
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; X64: # %bb.0:
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; X64-NEXT: movl $20, %eax
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; X64-NEXT: retq
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ret i32 20
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}
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define i64 @test_ret_i64() {
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; X32-LABEL: test_ret_i64:
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; X32: # %bb.0:
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; X32-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF
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; X32-NEXT: movl $15, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test_ret_i64:
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; X64: # %bb.0:
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; X64-NEXT: movabsq $68719476735, %rax # imm = 0xFFFFFFFFF
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; X64-NEXT: retq
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ret i64 68719476735
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}
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define i8 @test_arg_i8(i8 %a) {
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; X32-LABEL: test_arg_i8:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: retl
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;
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; X64-LABEL: test_arg_i8:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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ret i8 %a
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}
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define i16 @test_arg_i16(i16 %a) {
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; X32-LABEL: test_arg_i16:
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; X32: # %bb.0:
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_arg_i16:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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ret i16 %a
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}
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define i32 @test_arg_i32(i32 %a) {
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; X32-LABEL: test_arg_i32:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test_arg_i32:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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ret i32 %a
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}
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define i64 @test_arg_i64(i64 %a) {
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; X32-LABEL: test_arg_i64:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test_arg_i64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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ret i64 %a
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}
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define i64 @test_i64_args_8(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %arg5, i64 %arg6, i64 %arg7, i64 %arg8) {
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; X32-LABEL: test_i64_args_8:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test_i64_args_8:
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; X64: # %bb.0:
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; X64-NEXT: retq
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ret i64 %arg8
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}
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define <4 x i32> @test_v4i32_args(<4 x i32> %arg1, <4 x i32> %arg2) {
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; X32-LABEL: test_v4i32_args:
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; X32: # %bb.0:
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; X32-NEXT: movaps %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_v4i32_args:
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; X64: # %bb.0:
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; X64-NEXT: movaps %xmm1, %xmm0
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; X64-NEXT: retq
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ret <4 x i32> %arg2
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}
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define <8 x i32> @test_v8i32_args(<8 x i32> %arg1, <8 x i32> %arg2) {
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; X32-LABEL: test_v8i32_args:
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; X32: # %bb.0:
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 16
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; X32-NEXT: movups {{[0-9]+}}(%esp), %xmm1
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; X32-NEXT: movaps %xmm2, %xmm0
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_v8i32_args:
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; X64: # %bb.0:
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; X64-NEXT: movaps %xmm2, %xmm0
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; X64-NEXT: movaps %xmm3, %xmm1
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; X64-NEXT: retq
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ret <8 x i32> %arg2
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}
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declare void @trivial_callee()
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define void @test_trivial_call() {
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; X32-LABEL: test_trivial_call:
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; X32: # %bb.0:
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 16
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; X32-NEXT: calll trivial_callee
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_trivial_call:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: callq trivial_callee
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; X64-NEXT: popq %rax
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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call void @trivial_callee()
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ret void
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}
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declare void @simple_arg_callee(i32 %in0, i32 %in1)
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define void @test_simple_arg_call(i32 %in0, i32 %in1) {
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; X32-LABEL: test_simple_arg_call:
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; X32: # %bb.0:
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 16
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %ecx, (%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: calll simple_arg_callee
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_simple_arg_call:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: movl %esi, %edi
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; X64-NEXT: movl %eax, %esi
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; X64-NEXT: callq simple_arg_callee
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; X64-NEXT: popq %rax
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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call void @simple_arg_callee(i32 %in1, i32 %in0)
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ret void
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}
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declare void @simple_arg8_callee(i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8)
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define void @test_simple_arg8_call(i32 %in0) {
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; X32-LABEL: test_simple_arg8_call:
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; X32: # %bb.0:
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; X32-NEXT: subl $44, %esp
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; X32-NEXT: .cfi_def_cfa_offset 48
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X32-NEXT: calll simple_arg8_callee
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; X32-NEXT: addl $44, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_simple_arg8_call:
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; X64: # %bb.0:
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; X64-NEXT: subq $24, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 32
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; X64-NEXT: movl %edi, (%rsp)
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; X64-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; X64-NEXT: movl %edi, %esi
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; X64-NEXT: movl %edi, %edx
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; X64-NEXT: movl %edi, %ecx
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; X64-NEXT: movl %edi, %r8d
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; X64-NEXT: movl %edi, %r9d
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; X64-NEXT: callq simple_arg8_callee
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; X64-NEXT: addq $24, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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call void @simple_arg8_callee(i32 %in0, i32 %in0, i32 %in0, i32 %in0,i32 %in0, i32 %in0, i32 %in0, i32 %in0)
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ret void
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}
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declare i32 @simple_return_callee(i32 %in0)
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define i32 @test_simple_return_callee() {
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; X32-LABEL: test_simple_return_callee:
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; X32: # %bb.0:
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 16
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; X32-NEXT: movl $5, %eax
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: calll simple_return_callee
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; X32-NEXT: addl %eax, %eax
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_simple_return_callee:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: movl $5, %edi
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; X64-NEXT: callq simple_return_callee
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; X64-NEXT: addl %eax, %eax
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; X64-NEXT: popq %rcx
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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%call = call i32 @simple_return_callee(i32 5)
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%r = add i32 %call, %call
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ret i32 %r
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}
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declare <8 x i32> @split_return_callee(<8 x i32> %in0)
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define <8 x i32> @test_split_return_callee(<8 x i32> %arg1, <8 x i32> %arg2) {
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; X32-LABEL: test_split_return_callee:
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; X32: # %bb.0:
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; X32-NEXT: subl $44, %esp
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; X32-NEXT: .cfi_def_cfa_offset 48
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; X32-NEXT: movaps %xmm0, (%esp) # 16-byte Spill
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; X32-NEXT: movaps %xmm1, {{[0-9]+}}(%esp) # 16-byte Spill
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; X32-NEXT: movdqu {{[0-9]+}}(%esp), %xmm1
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; X32-NEXT: movdqa %xmm2, %xmm0
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; X32-NEXT: calll split_return_callee
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; X32-NEXT: paddd (%esp), %xmm0 # 16-byte Folded Reload
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; X32-NEXT: paddd {{[0-9]+}}(%esp), %xmm1 # 16-byte Folded Reload
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; X32-NEXT: addl $44, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_split_return_callee:
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; X64: # %bb.0:
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; X64-NEXT: subq $40, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 48
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; X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; X64-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
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; X64-NEXT: movdqa %xmm2, %xmm0
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; X64-NEXT: movdqa %xmm3, %xmm1
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; X64-NEXT: callq split_return_callee
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; X64-NEXT: paddd (%rsp), %xmm0 # 16-byte Folded Reload
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; X64-NEXT: paddd {{[0-9]+}}(%rsp), %xmm1 # 16-byte Folded Reload
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; X64-NEXT: addq $40, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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%call = call <8 x i32> @split_return_callee(<8 x i32> %arg2)
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%r = add <8 x i32> %arg1, %call
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ret <8 x i32> %r
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}
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define void @test_indirect_call(void()* %func) {
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; X32-LABEL: test_indirect_call:
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; X32: # %bb.0:
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 16
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; X32-NEXT: calll *{{[0-9]+}}(%esp)
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_indirect_call:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: callq *%rdi
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; X64-NEXT: popq %rax
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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call void %func()
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ret void
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}
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declare void @take_char(i8)
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define void @test_abi_exts_call(i8* %addr) {
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; X32-LABEL: test_abi_exts_call:
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; X32: # %bb.0:
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; X32-NEXT: pushl %ebx
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: pushl %esi
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; X32-NEXT: .cfi_def_cfa_offset 12
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; X32-NEXT: pushl %eax
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; X32-NEXT: .cfi_def_cfa_offset 16
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; X32-NEXT: .cfi_offset %esi, -12
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; X32-NEXT: .cfi_offset %ebx, -8
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movb (%eax), %bl
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; X32-NEXT: movzbl %bl, %esi
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; X32-NEXT: movl %esi, (%esp)
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; X32-NEXT: calll take_char
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; X32-NEXT: movsbl %bl, %eax
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: calll take_char
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; X32-NEXT: movl %esi, (%esp)
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; X32-NEXT: calll take_char
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; X32-NEXT: addl $4, %esp
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; X32-NEXT: .cfi_def_cfa_offset 12
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; X32-NEXT: popl %esi
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: popl %ebx
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; X32-NEXT: .cfi_def_cfa_offset 4
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; X32-NEXT: retl
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;
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; X64-LABEL: test_abi_exts_call:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rbx
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: .cfi_offset %rbx, -16
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; X64-NEXT: movb (%rdi), %al
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; X64-NEXT: movzbl %al, %ebx
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; X64-NEXT: movl %ebx, %edi
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; X64-NEXT: callq take_char
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; X64-NEXT: movsbl %bl, %edi
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; X64-NEXT: callq take_char
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; X64-NEXT: movl %ebx, %edi
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; X64-NEXT: callq take_char
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; X64-NEXT: popq %rbx
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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%val = load i8, i8* %addr
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call void @take_char(i8 %val)
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call void @take_char(i8 signext %val)
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call void @take_char(i8 zeroext %val)
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ret void
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}
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declare void @variadic_callee(i8*, ...)
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define void @test_variadic_call_1(i8** %addr_ptr, i32* %val_ptr) {
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; X32-LABEL: test_variadic_call_1:
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; X32: # %bb.0:
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 16
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: movl (%ecx), %ecx
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; X32-NEXT: calll variadic_callee
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: .cfi_def_cfa_offset 4
|
|
; X32-NEXT: retl
|
|
;
|
|
; X64-LABEL: test_variadic_call_1:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: pushq %rax
|
|
; X64-NEXT: .cfi_def_cfa_offset 16
|
|
; X64-NEXT: movq (%rdi), %rdi
|
|
; X64-NEXT: movl (%rsi), %esi
|
|
; X64-NEXT: movb $0, %al
|
|
; X64-NEXT: callq variadic_callee
|
|
; X64-NEXT: popq %rax
|
|
; X64-NEXT: .cfi_def_cfa_offset 8
|
|
; X64-NEXT: retq
|
|
|
|
%addr = load i8*, i8** %addr_ptr
|
|
%val = load i32, i32* %val_ptr
|
|
call void (i8*, ...) @variadic_callee(i8* %addr, i32 %val)
|
|
ret void
|
|
}
|
|
|
|
define void @test_variadic_call_2(i8** %addr_ptr, double* %val_ptr) {
|
|
; X32-LABEL: test_variadic_call_2:
|
|
; X32: # %bb.0:
|
|
; X32-NEXT: subl $12, %esp
|
|
; X32-NEXT: .cfi_def_cfa_offset 16
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X32-NEXT: movl (%eax), %eax
|
|
; X32-NEXT: movl (%ecx), %edx
|
|
; X32-NEXT: movl 4(%ecx), %ecx
|
|
; X32-NEXT: movl %eax, (%esp)
|
|
; X32-NEXT: movl $4, %eax
|
|
; X32-NEXT: leal (%esp,%eax), %eax
|
|
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
|
; X32-NEXT: movl %ecx, 4(%eax)
|
|
; X32-NEXT: calll variadic_callee
|
|
; X32-NEXT: addl $12, %esp
|
|
; X32-NEXT: .cfi_def_cfa_offset 4
|
|
; X32-NEXT: retl
|
|
;
|
|
; X64-LABEL: test_variadic_call_2:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: pushq %rax
|
|
; X64-NEXT: .cfi_def_cfa_offset 16
|
|
; X64-NEXT: movq (%rdi), %rdi
|
|
; X64-NEXT: movq (%rsi), %rax
|
|
; X64-NEXT: movq %rax, %xmm0
|
|
; X64-NEXT: movb $1, %al
|
|
; X64-NEXT: callq variadic_callee
|
|
; X64-NEXT: popq %rax
|
|
; X64-NEXT: .cfi_def_cfa_offset 8
|
|
; X64-NEXT: retq
|
|
|
|
%addr = load i8*, i8** %addr_ptr
|
|
%val = load double, double* %val_ptr
|
|
call void (i8*, ...) @variadic_callee(i8* %addr, double %val)
|
|
ret void
|
|
}
|