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Craig Topper f107123a88 [X86] Type legalize v2i32 div/rem by scalarizing rather than promoting 
Summary:
Previously we type legalized v2i32 div/rem by promoting to v2i64. But we don't support div/rem of vectors so op legalization would then scalarize it using i64 scalar ops since it doesn't know about the original promotion. 64-bit scalar divides on Intel hardware are known to be slow and in 32-bit mode they require a libcall.

This patch switches type legalization to do the scalarizing itself using i32.

It looks like the division by power of 2 optimization is still kicking in and leaving the code as a vector. The division by other constant optimization doesn't kick in pre type legalization since it ignores illegal types. And previously, after type legalization we scalarized the v2i64 since we don't have v2i64 MULHS/MULHU support.

Another option might be to widen v2i32 to v4i32 so we could do division by constant optimizations, but we'd have to be careful to only do that for constant divisors or we risk scalaring to 4 scalar divides.

Reviewers: RKSimon, spatel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51325

llvm-svn: 342114
2018-09-13 06:13:37 +00:00
..
avx512-shuffles
[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
2018-08-03 07:01:10 +00:00
GC
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GlobalISel
[GlobalISel][X86] Add the support for G_FPTRUNC
2018-08-31 11:26:51 +00:00
3addr-16bit.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
3addr-or.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
3dnow-intrinsics.ll
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3dnow-schedule.ll
[X86] Add GPR<->XMM Schedule Tags
2018-05-18 17:58:36 +00:00
4char-promote.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2004-10-08-SelectSetCCFold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
2006-03-02-InstrSchedBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-11-InstrSched.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
2006-05-17-VectorArg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2006-11-17-IllegalMove.ll
[X86] Make requested test changes from D50636
2018-08-25 14:16:03 +00:00
2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-01-08-InstrSched.ll
Add LiveRangeShrink pass to shrink live range within BB.
2017-05-31 23:25:25 +00:00
2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-24-InlineAsmPModifier.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-24-InlineAsmVectorOp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
2007-04-27-InlineAsm-IntMemInput.ll
Fix the remaining TCL-style quotes found in the testsuite. This is
2012-07-02 19:09:46 +00:00
2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
2007-07-18-Vector-Extract.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2007-08-01-LiveVariablesBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
2014-02-13 14:44:26 +00:00
2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2007-11-07-MulBy4.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-01-16-InvalidDAGCombineXform.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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2008-02-14-BitMiscompile.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2008-02-18-TailMergingBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-02-25-InlineAsmBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-10-RegAllocInfLoop.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2008-03-12-ThreadLocalAlias.ll
[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
2015-09-11 03:22:04 +00:00
2008-03-13-TwoAddrPassCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-14-SpillerCrash.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-13-NotVolatileLoadStore.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-06-13-VolatileLoadStore.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2008-06-16-SubregsBug.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
2008-07-11-SHLBy1.ll
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2008-07-16-CoalescerCrash.ll
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2008-07-19-movups-spills.ll
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2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2008-08-17-UComiCodeGenBug.ll
Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc
2016-07-07 22:50:23 +00:00
2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
2008-09-11-CoalescerBug2.ll
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2008-09-11-CoalescerBug.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
2008-09-29-ReMatBug.ll
Make "@name =" mandatory for globals in .ll files.
2016-05-10 18:22:45 +00:00
2008-09-29-VolatileBug.ll
[X86] Switch a test from grep to FileCheck. NFC
2018-04-11 01:05:32 +00:00
2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-ULT-Sign.ll
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2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-01-SpillerAssert.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
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2008-12-02-IllegalResultType.ll
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2008-12-16-dagcombine-4.ll
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2008-12-19-EarlyClobberBug.ll
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2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
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2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-01-18-ConstantExprCrash.ll
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2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-01-31-BigShift.ll
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2009-02-01-LargeMask.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-08-CoalescerBug.ll
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2009-02-09-ivs-different-sizes.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
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2009-02-21-ExtWeakInitializer.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
2009-02-25-CommuteBug.ll
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2017-08-02 00:28:10 +00:00
2009-02-26-MachineLICMBug.ll
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2009-03-03-BitcastLongDouble.ll
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2009-03-03-BTHang.ll
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2009-03-05-burr-list-crash.ll
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2009-03-07-FPConstSelect.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-03-09-APIntCrash.ll
X86: Do not use llc -march in tests.
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2009-03-09-SpillerBug.ll
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2009-03-10-CoalescerBug.ll
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2009-03-12-CPAlignBug.ll
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2009-03-13-PHIElimBug.ll
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2009-03-16-PHIElimInLPad.ll
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2009-03-23-i80-fp80.ll
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2009-03-23-LinearScanBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
2009-03-23-MultiUseSched.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2009-03-25-TestBug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-03-26-NoImplicitFPBug.ll
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2009-04-12-FastIselOverflowCrash.ll
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2009-04-12-picrel.ll
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2009-04-13-2AddrAssert-2.ll
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2009-04-13-2AddrAssert.ll
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2009-04-14-IllegalRegs.ll
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2009-04-16-SpillerUnfold.ll
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2009-04-24.ll
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2009-04-25-CoalescerBug.ll
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2009-04-27-CoalescerAssert.ll
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2009-04-27-LiveIntervalsAssert2.ll
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2009-04-27-LiveIntervalsAssert.ll
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2009-04-29-IndirectDestOperands.ll
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2009-04-29-LinearScanBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2009-04-29-RegAllocAssert.ll
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2009-04-scale.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-05-08-InlineAsmIOffset.ll
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2009-05-11-tailmerge-crash.ll
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2009-05-19-SingleElementExtractElement.ll
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2017-08-02 00:28:10 +00:00
2009-05-23-available_externally.ll
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2009-05-23-dagcombine-shifts.ll
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2009-05-28-DAGCombineCrash.ll
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2009-05-30-ISelBug.ll
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2009-06-02-RewriterBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2009-06-03-Win64DisableRedZone.ll
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2009-06-03-Win64SpillXMM.ll
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2009-06-04-VirtualLiveIn.ll
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2009-06-05-sitofpCrash.ll
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2009-06-05-VariableIndexInsert.ll
Make the default triple optional by allowing an empty string
2015-09-16 05:34:32 +00:00
2009-06-05-VZextByteShort.ll
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2009-06-06-ConcatVectors.ll
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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2009-06-15-not-a-tail-call.ll
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2009-06-18-movlp-shuffle-register.ll
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2009-07-06-TwoAddrAssert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-07-07-SplitICmp.ll
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2009-07-09-ExtractBoolFromVector.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2009-07-15-CoalescerBug.ll
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2009-07-16-CoalescerBug.ll
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2009-07-19-AsmExtraOperands.ll
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2009-07-20-CoalescerBug.ll
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2009-07-20-DAGCombineBug.ll
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2009-08-06-branchfolder-crash.ll
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2009-08-06-inlineasm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
2009-08-08-CastError.ll
Rewrite X86 codegen regression test with FileCheck
2013-04-30 07:51:08 +00:00
2009-08-12-badswitch.ll
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2009-08-14-Win64MemoryIndirectArg.ll
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2009-08-19-LoadNarrowingMiscompile.ll
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2009-08-23-SubRegReuseUndo.ll
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2009-09-10-LoadFoldingBug.ll
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2009-09-10-SpillComments.ll
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2009-09-16-CoalescerBug.ll
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2009-09-19-earlyclobber.ll
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2009-09-21-NoSpillLoopCount.ll
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2009-09-22-CoalescerBug.ll
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2009-09-23-LiveVariablesBug.ll
Clean up LiveVariables and change how it deals with partial updates and kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate.
2009-09-24 02:15:22 +00:00
2009-10-14-LiveVariablesBug.ll
When LiveVariables is adding implicit-def to model "partial dead", add the earlyclobber marker if the superreg def has it.
2009-10-14 23:39:27 +00:00
2009-10-16-Scope.ll
…
2009-10-19-atomic-cmp-eflags.ll
…
2009-10-19-EmergencySpill.ll
…
2009-10-25-RewriterBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2009-11-04-SubregCoalescingBug.ll
…
2009-11-13-VirtRegRewriterBug.ll
…
2009-11-16-MachineLICM.ll
…
2009-11-16-UnfoldMemOpBug.ll
…
2009-11-17-UpdateTerminator.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
2009-11-18-TwoAddrKill.ll
Fix PR5300.
2009-11-18 21:33:35 +00:00
2009-11-25-ImpDefBug.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
2009-12-01-EarlyClobberBug.ll
…
2009-12-11-TLSNoRedZone.ll
…
2010-01-05-ZExt-Shl.ll
…
2010-01-07-ISelBug.ll
…
2010-01-08-Atomic64Bug.ll
…
2010-01-11-ExtraPHIArg.ll
…
2010-01-13-OptExtBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2010-01-15-SelectionDAGCycle.ll
…
2010-01-18-DbgValue.ll
…
2010-01-19-OptExtBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2010-02-01-DbgValueCrash.ll
…
2010-02-01-TaillCallCrash.ll
…
2010-02-03-DualUndef.ll
…
2010-02-04-SchedulerBug.ll
…
2010-02-11-NonTemporal.ll
…
2010-02-12-CoalescerBug-Impdef.ll
…
2010-02-15-ImplicitDefBug.ll
…
2010-02-19-TailCallRetAddrBug.ll
…
2010-02-23-DAGCombineBug.ll
…
2010-02-23-DIV8rDefinesAX.ll
…
2010-02-23-RematImplicitSubreg.ll
…
2010-02-23-SingleDefPhiJoin.ll
…
2010-03-04-Mul8Bug.ll
…
2010-03-05-ConstantFoldCFG.ll
…
2010-03-05-EFLAGS-Redef.ll
…
2010-03-17-ISelBug.ll
…
2010-04-06-SSEDomainFixCrash.ll
…
2010-04-08-CoalescerBug.ll
…
2010-04-13-AnalyzeBranchCrash.ll
…
2010-04-21-CoalescerBug.ll
…
2010-04-29-CoalescerCrash.ll
…
2010-04-30-LocalAlloc-LandingPad.ll
…
2010-05-03-CoalescerSubRegClobber.ll
…
2010-05-05-LocalAllocEarlyClobber.ll
…
2010-05-06-LocalInlineAsmClobber.ll
…
2010-05-07-ldconvert.ll
…
2010-05-10-DAGCombinerBug.ll
…
2010-05-12-FastAllocKills.ll
…
2010-05-16-nosseconversion.ll
…
2010-05-25-DotDebugLoc.ll
…
2010-05-26-DotDebugLoc.ll
…
2010-05-26-FP_TO_INT-crash.ll
…
2010-05-28-Crash.ll
…
2010-06-01-DeadArg-DbgInfo.ll
…
2010-06-09-FastAllocRegisters.ll
…
2010-06-14-fast-isel-fs-load.ll
…
2010-06-15-FastAllocEarlyCLobber.ll
…
2010-06-24-g-constraint-crash.ll
…
2010-06-25-asm-RA-crash.ll
…
2010-06-25-CoalescerSubRegDefDead.ll
…
2010-06-28-FastAllocTiedOperand.ll
…
2010-06-28-matched-g-constraint.ll
…
2010-07-02-asm-alignstack.ll
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
2014-02-13 14:44:26 +00:00
2010-07-02-UnfoldBug.ll
…
2010-07-06-asm-RIP.ll
…
2010-07-06-DbgCrash.ll
…
2010-07-11-FPStackLoneUse.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2010-07-13-indirectXconstraint.ll
…
2010-07-15-Crash.ll
…
2010-07-29-SetccSimplify.ll
…
2010-08-04-MaskedSignedCompare.ll
…
2010-08-04-MingWCrash.ll
…
2010-08-04-StackVariable.ll
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
2016-04-15 15:57:41 +00:00
2010-09-01-RemoveCopyByCommutingDef.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2010-09-16-asmcrash.ll
…
2010-09-16-EmptyFilename.ll
…
2010-09-17-SideEffectsInChain.ll
…
2010-09-30-CMOV-JumpTable-PHI.ll
…
2010-10-08-cmpxchg8b.ll
…
2010-11-02-DbgParameter.ll
…
2010-11-09-MOVLPS.ll
…
2010-11-18-SelectOfExtload.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-01-07-LegalizeTypesCrash.ll
…
2011-01-10-DagCombineHang.ll
…
2011-01-24-DbgValue-Before-Use.ll
…
2011-02-04-FastRegallocNoFP.ll
Mark that the return is using EAX so that we don't use it for some other
2011-02-04 22:44:08 +00:00
2011-02-12-shuffle.ll
…
2011-02-21-VirtRegRewriter-KillSubReg.ll
…
2011-02-23-UnfoldBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
2011-02-27-Fpextend.ll
…
2011-03-02-DAGCombiner.ll
…
2011-03-08-Sched-crash.ll
…
2011-03-09-Physreg-Coalescing.ll
…
2011-03-30-CreateFixedObjCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-04-13-SchedCmpJmp.ll
…
2011-04-19-sclr-bb.ll
…
2011-05-09-loaduse.ll
…
2011-05-26-UnreachableBlockElim.ll
…
2011-05-27-CrossClassCoalescing.ll
…
2011-06-01-fildll.ll
…
2011-06-03-x87chain.ll
…
2011-06-06-fgetsign80bit.ll
…
2011-06-12-FastAllocSpill.ll
…
2011-06-14-mmx-inlineasm.ll
…
2011-06-14-PreschedRegalias.ll
…
2011-06-19-QuicksortCoalescerBug.ll
…
2011-07-13-BadFrameIndexDisplacement.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-08-23-PerformSubCombine128.ll
…
2011-08-23-Trampoline.ll
…
2011-08-29-BlockConstant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-08-29-InitOrder.ll
Replace -use-init-array with -use-ctors.
2014-09-02 13:54:53 +00:00
2011-09-14-valcoalesce.ll
…
2011-09-18-sse2cmp.ll
…
2011-09-21-setcc-bug.ll
…
2011-10-11-SpillDead.ll
…
2011-10-11-srl.ll
…
2011-10-12-MachineCSE.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
2011-10-18-FastISel-VectorParams.ll
…
2011-10-19-LegelizeLoad.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-10-19-widen_vselect.ll
…
2011-10-21-widen-cmp.ll
…
2011-10-27-tstore.ll
…
2011-10-30-padd.ll
…
2011-11-07-LegalizeBuildVector.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-11-22-AVX2-Domains.ll
…
2011-11-30-or.ll
…
2011-12-8-bitcastintprom.ll
…
2011-12-06-AVXVectorExtractCombine.ll
[DAGCombiner] Added SMAX/SMIN/UMAX/UMIN constant folding
2015-08-19 21:11:58 +00:00
2011-12-06-BitcastVectorGlobal.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-12-08-AVXISelBugs.ll
…
2011-12-15-vec_shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2011-12-26-extractelement-duplicate-load.ll
…
2011-12-28-vselecti8.ll
…
2011-20-21-zext-ui2fp.ll
…
2012-1-10-buildvector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2012-01-10-UndefExceptionEdge.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2012-01-11-split-cv.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2012-01-12-extract-sv.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
2012-01-16-mfence-nosse-flags.ll
…
2012-01-18-vbitcast.ll
…
2012-02-12-dagco.ll
…
2012-02-14-scalar.ll
…
2012-02-23-mmx-inlineasm.ll
…
2012-02-29-CoalescerBug.ll
…
2012-03-15-build_vector_wl.ll
…
2012-03-20-LargeConstantExpr.ll
It's possible to have a constant expression who's size is quite big (e.g.,
2012-03-20 08:56:43 +00:00
2012-03-26-PostRALICMBug.ll
…
2012-04-09-TwoAddrPassBug.ll
Test case for PR12495.
2012-04-09 23:58:59 +00:00
2012-04-26-sdglue.ll
…
2012-05-17-TwoAddressBug.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
2012-05-19-CoalescerCrash.ll
…
2012-07-10-extload64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
2012-07-10-shufnorm.ll
…
2012-07-15-broadcastfold.ll
…
2012-07-15-BuildVectorPromote.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-07-15-tconst_shl.ll
…
2012-07-15-vshl.ll
…
2012-07-16-fp2ui-i1.ll
…
2012-07-16-LeaUndef.ll
…
2012-07-17-vtrunc.ll
…
2012-07-23-select_cc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2012-08-07-CmpISelBug.ll
…
2012-08-16-setcc.ll
[X86] Turn X86ISD::AND nodes that have no flag users back into ISD::AND just before isel to enable test instruction matching
2018-02-01 17:08:39 +00:00
2012-08-17-legalizer-crash.ll
…
2012-08-28-UnsafeMathCrash.ll
The commutative flag is already correctly set within the multiclass. If we set
2012-08-28 07:36:46 +00:00
2012-09-13-dagco-fneg.ll
…
2012-09-28-CGPBug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
2012-10-02-DAGCycle.ll
…
2012-10-03-DAGCycle.ll
…
2012-10-18-crash-dagco.ll
…
2012-11-28-merge-store-alias.ll
…
2012-12-1-merge-multiple.ll
…
2012-12-12-DAGCombineCrash.ll
…
2012-12-14-v8fp80-crash.ll
…
2012-12-19-NoImplicitFloat.ll
…
2013-01-09-DAGCombineBug.ll
…
2013-03-13-VEX-DestReg.ll
…
2013-05-06-ConactVectorCrash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
2013-10-14-FastISel-incorrect-vreg.ll
…
2014-05-29-factorial.ll
…
2014-08-29-CompactUnwind.ll
[SCEV] createAddRecFromPHI: Optimize for the most common case.
2017-05-03 23:53:38 +00:00
9601.ll
Oddly people want to use the 'r' constraint for fp constants on x86.
2011-05-19 21:33:47 +00:00
20090313-signext.ll
…
abi-isel.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
absolute-bit-mask-fastisel.ll
[X86] FastISel fall back on !absolute_symbol GVs
2018-08-01 17:44:37 +00:00
absolute-bit-mask.ll
[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem
2017-10-01 23:53:53 +00:00
absolute-bt.ll
IR, X86: Understand !absolute_symbol metadata on global variables.
2016-12-08 19:01:00 +00:00
absolute-cmp.ll
X86: Introduce relocImm-based patterns for cmp.
2017-02-09 22:02:28 +00:00
absolute-constant.ll
IR, X86: Understand !absolute_symbol metadata on global variables.
2016-12-08 19:01:00 +00:00
absolute-rotate.ll
X86: Produce @ABS8 symbol modifiers for absolute symbols in range [0,128).
2017-02-02 00:32:03 +00:00
add32ri8.ll
Use add32ri8 and friends on fast isel.
2015-03-13 22:18:18 +00:00
add_shl_constant.ll
…
add-ext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
add-i64.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
add-of-carry.ll
…
add-sub-nsw-nuw.ll
…
add.ll
[DAGcombine] Teach the combiner about -a = ~a + 1
2018-06-04 19:23:22 +00:00
addcarry2.ll
[X86] Extend load-op-store fusion merge to ADC/SBB.
2018-01-19 15:37:57 +00:00
addcarry.ll
[X86] Teach X86DAGToDAGISel::foldLoadStoreIntoMemOperand to handle loads in operand 1 of commutable operations.
2018-09-07 16:27:55 +00:00
addr-label-difference.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
addr-mode-matcher.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
addr-of-ret-addr.ll
…
address-type-promotion-constantexpr.ll
…
addrsig.ll
CodeGen: Add two more conditions for adding symbols to the address-significance table.
2018-08-24 20:37:09 +00:00
adx-commute.mir
[X86] Mark the ADCX and ADOX instruction as commutable.
2018-09-08 18:47:56 +00:00
adx-intrinsics-upgrade.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
adx-intrinsics.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
adx-schedule.ll
[X86] Split WriteADC/WriteADCRMW scheduler classes
2018-05-17 12:43:42 +00:00
aes_intrinsics.ll
…
aes-schedule.ll
[X89] Explicitly enable aes in aes-schedule.ll to fix failures after r341861.
2018-09-10 21:49:01 +00:00
alias-gep.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
alias-static-alloca.ll
[DAG] Improve Aliasing of operations to static alloca
2017-07-18 20:06:24 +00:00
aliases.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
aligned-comm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
aligned-variadic.ll
Implemented stack symbol table ordering/packing optimization to improve data locality and code size from SP/FP offset encoding.
2016-02-15 23:44:13 +00:00
alignment-2.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
alignment.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
all-ones-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
alldiv-divdi3.ll
…
alloca-align-rounding-32.ll
…
alloca-align-rounding.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
allrem-moddi3.ll
Add _allrem, _aullrem and _allmul to the runtime for MSVC.
2011-07-08 21:40:25 +00:00
and-encoding.ll
[X86] Teach X86DAGToDAGISel::shrinkAndImmediate to preserve upper 32 zeroes of a 64 bit mask.
2018-02-05 16:54:07 +00:00
and-load-fold.ll
[DAGCombiner] Fix wrong folding of AND dag nodes.
2015-03-07 12:24:55 +00:00
and-or-fold.ll
[X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead.
2015-04-04 02:08:20 +00:00
and-sink.ll
[DAGCOmbine] Ensure that (brcond (setcc ...)) is handled in a canonical manner.
2018-02-23 11:50:42 +00:00
and-su.ll
Regenerate test results for and-su.ll . NFC
2018-01-27 16:00:10 +00:00
andimm8.ll
[X86] Regenerate and + immediate mask tests
2018-04-08 12:31:52 +00:00
anyext.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
anyregcc-crash.ll
…
anyregcc.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
apm.ll
[X86][SSE3] Regenerate mwait/monitor intrinsic tests
2018-04-08 12:29:11 +00:00
AppendingLinkage.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
arg-cast.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
arg-copy-elide.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
asm-block-labels.ll
Delete -std-compile-opts.
2014-10-16 20:00:02 +00:00
asm-global-imm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
asm-indirect-mem.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
asm-invalid-register-class-crasher.ll
…
asm-label2.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
asm-label.ll
SelectionDAG switch lowering: Replace unreachable default with most popular case.
2014-12-06 01:28:50 +00:00
asm-mismatched-types.ll
…
asm-modifier-P.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
asm-modifier.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
asm-reg-type-mismatch.ll
…
asm-reject-reg-type-mismatch.ll
…
asm-reject-rex.ll
[X86] Reject registers that require a REX prefix in inline asm constraints in 32-bit mode
2018-03-06 18:56:33 +00:00
asm-reject-xmm16.ll
…
atom-call-reg-indirect-foldedreload32.ll
…
atom-call-reg-indirect-foldedreload64.ll
…
atom-call-reg-indirect.ll
…
atom-cmpb.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atom-fixup-lea1.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
atom-fixup-lea2.ll
[X86] Stop accidentally running the Bonnell LEA fixup path on Goldmont.
2018-07-31 00:43:54 +00:00
atom-fixup-lea3.ll
…
atom-fixup-lea4.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
atom-lea-addw-bug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
atom-lea-sp.ll
[X86] Enable call frame optimization ("mov to push") not only for optsize (PR26325)
2016-03-30 23:38:01 +00:00
atom-pad-short-functions.ll
Update patch for the pad short functions pass for Intel Atom (only).
2013-01-11 22:06:56 +00:00
atom-sched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atom-shuf.ll
[X86] Regenerate atom pshufb test
2018-04-07 19:50:09 +00:00
atomic8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic16.ll
[X86]: Quit promoting 8 and 16 bit compares to 32 bit.
2016-06-15 16:37:46 +00:00
atomic32.ll
[X86] Add FeatureCMOV explicitly to all CPUs that support it. Remove FeatureCMOV implication from Feature64Bit and FeatureSSE1
2018-08-26 18:29:33 +00:00
atomic64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic128.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
atomic6432.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic_add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic_idempotent.ll
[X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use isel patterns and the normal instructions instead
2018-08-03 21:40:44 +00:00
atomic_mi.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
atomic_op.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-dagsched.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-eflags-reuse.ll
…
atomic-flags.ll
x86: preserve flags when folding atomic operations
2015-10-15 18:24:52 +00:00
atomic-load-store-wide.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-load-store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
atomic-minmax-i6432.ll
[X86] Add FeatureCMOV explicitly to all CPUs that support it. Remove FeatureCMOV implication from Feature64Bit and FeatureSSE1
2018-08-26 18:29:33 +00:00
atomic-non-integer.ll
[X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use isel patterns and the normal instructions instead
2018-08-03 21:40:44 +00:00
atomic-ops-ancient-64.ll
X86: correct 64-bit atomics on 32-bit
2014-07-14 16:28:13 +00:00
atomic-or.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic-pointer.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
Atomics-64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
attribute-sections.ll
Be nice to Xcore and the XMOS assembler and avoid quoting section names
2011-03-04 20:03:14 +00:00
avg-mask.ll
[X86] Legalize v32i1 without BWI via splitting to v16i1 rather than the default of promoting to v32i8.
2018-01-23 14:25:39 +00:00
avg.ll
[X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for v1iX vectors.
2018-09-07 20:56:03 +00:00
avoid_complex_am.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
avoid-lea-scale2.ll
test/CodeGen/X86: FileCheck-ize and add actions for x86_64-linux and x86_64-win32.
2011-03-16 13:53:07 +00:00
avoid-loop-align-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
avoid-loop-align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
avoid-sfb-kill-flags.mir
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
2018-04-26 13:16:11 +00:00
avoid-sfb-offset.mir
[X86] - Avoid SFB pass - fix bug in updating the offsets for newly created copies
2018-05-21 16:23:16 +00:00
avoid-sfb-overlaps.ll
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
2018-04-26 13:16:11 +00:00
avoid-sfb.ll
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
2018-04-26 13:16:11 +00:00
avx1-logical-load-folding.ll
…
avx2-arith.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-conversions.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx2-fma-fneg-combine.ll
[X86] Recognize a splat of negate in isFNEG
2018-08-06 19:23:38 +00:00
avx2-gather.ll
…
avx2-intrinsics-canonical.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx2-intrinsics-fast-isel.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx2-intrinsics-x86-upgrade.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx2-intrinsics-x86.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx2-logic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx2-masked-gather.ll
…
avx2-nontemporal.ll
…
avx2-phaddsub.ll
…
avx2-pmovxrm.ll
…
avx2-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
avx2-shift.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx2-vbroadcast.ll
…
avx2-vbroadcasti128.ll
…
avx2-vector-shifts.ll
…
avx2-vperm.ll
…
avx512-adc-sbb.ll
…
avx512-any_extend_load.ll
…
avx512-arith.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-bugfix-23634.ll
…
avx512-bugfix-25270.ll
…
avx512-bugfix-26264.ll
[SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DAG.setRoot.
2018-07-26 23:22:11 +00:00
avx512-build-vector.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-calling-conv.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
avx512-cmp-kor-sequence.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
avx512-cmp.ll
[X86] Don't use EXTRACT_ELEMENT from v1i1 with i8/i32 result type when we need to guarantee zeroes in the upper bits of return.
2018-02-28 08:14:28 +00:00
avx512-cvt.ll
[X86] Add -x86-experimental-vector-widening-legalization run line to avx512-cvt.ll
2018-08-31 07:05:36 +00:00
avx512-cvttp2i.ll
…
avx512-ext.ll
[X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.
2018-04-17 17:30:06 +00:00
avx512-extract-subvector-load-store.ll
…
avx512-extract-subvector.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-fma-commute.ll
…
avx512-fma-intrinsics-upgrade.ll
[X86] Cleanup some of the avx512 masked fma tests to prepare for removing and autoupgrading.
2018-07-06 03:42:06 +00:00
avx512-fma-intrinsics.ll
[X86] In combineFMA, make sure we bitcast the result of isFNEG back the expected type before creating the new FMA node.
2018-07-09 17:43:24 +00:00
avx512-fma.ll
…
avx512-fsel.ll
…
avx512-gather-scatter-intrin.ll
…
avx512-gfni-intrinsics.ll
…
avx512-hadd-hsub.ll
[DAGCombiner] Add EXTRACT_SUBVECTOR to SimplifyDemandedVectorElts
2018-07-07 17:30:06 +00:00
avx512-i1test.ll
…
avx512-inc-dec.ll
…
avx512-insert-extract_i1.ll
…
avx512-insert-extract.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
avx512-intel-ocl.ll
…
avx512-intrinsics-canonical.ll
[X86] Add support for combining FMSUB/FNMADD/FNMSUB ISD nodes with an fneg input.
2018-07-05 02:52:56 +00:00
avx512-intrinsics-fast-isel.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
avx512-intrinsics-upgrade.ll
[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
2018-08-03 07:01:10 +00:00
avx512-intrinsics.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
avx512-load-store.ll
…
avx512-load-trunc-store-i1.ll
…
avx512-logic.ll
…
avx512-mask-op.ll
…
avx512-mask-spills.ll
…
avx512-mask-zext-bugfix.ll
…
avx512-masked_memop-16-8.ll
…
avx512-masked-memop-64-32.ll
[SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DAG.setRoot.
2018-07-26 23:22:11 +00:00
avx512-memfold.ll
…
avx512-mov.ll
…
avx512-nontemporal.ll
…
avx512-pmovxrm.ll
…
avx512-regcall-Mask.ll
…
avx512-regcall-NoMask.ll
…
avx512-rndscale.ll
[X86] Add full set of patterns for turning ceil/floor/trunc/rint/nearbyint into rndscale with loads, broadcast, and masking.
2018-07-17 05:48:48 +00:00
avx512-rotate.ll
…
avx512-scalar_mask.ll
[X86] Remove and autoupgrade the scalar fma intrinsics with masking.
2018-07-12 00:29:56 +00:00
avx512-scalar.ll
…
avx512-scalarIntrinsics.ll
…
avx512-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
avx512-select.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
avx512-shift.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx512-shuffle-schedule.ll
[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
2018-08-03 07:01:10 +00:00
avx512-skx-insert-subvec.ll
[X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR.
2018-08-31 17:17:21 +00:00
avx512-trunc.ll
…
avx512-unsafe-fp-math.ll
…
avx512-vbroadcast.ll
…
avx512-vbroadcasti128.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
avx512-vbroadcasti256.ll
…
avx512-vec3-crash.ll
…
avx512-vec-cmp.ll
[X86] Stop swapping the operands of AVX512 setge.
2018-02-19 19:23:35 +00:00
avx512-vpclmulqdq.ll
…
avx512-vpermv3-commute.ll
…
avx512-vpternlog-commute.ll
…
avx512-vselect-crash.ll
…
avx512-vselect.ll
[X86] Use vpmovq2m/vpmovd2m for truncate to vXi1 when possible.
2018-02-19 22:07:31 +00:00
avx512bw-arith.ll
…
avx512bw-intrinsics-canonical.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx512bw-intrinsics-fast-isel.ll
…
avx512bw-intrinsics-upgrade.ll
[X86] Remove masking from the 512-bit padds and psubs intrinsics. Use select in IR instead.
2018-08-16 06:20:24 +00:00
avx512bw-intrinsics.ll
[X86] Add intrinsics for KTEST instructions.
2018-08-31 21:31:53 +00:00
avx512bw-mask-op.ll
…
avx512bw-mov.ll
…
avx512bw-vec-cmp.ll
[X86] Stop swapping the operands of AVX512 setge.
2018-02-19 19:23:35 +00:00
avx512bw-vec-test-testn.ll
…
avx512bwvl-arith.ll
…
avx512bwvl-intrinsics-canonical.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
avx512bwvl-intrinsics-fast-isel.ll
[X86] Fast-isel tests for lowered truncation intrinsics
2018-07-10 08:26:54 +00:00
avx512bwvl-intrinsics-upgrade.ll
[X86] Remove the unused masked 128 and 256-bit masked padds/psubs intrinsics.
2018-08-16 06:20:22 +00:00
avx512bwvl-intrinsics.ll
[X86] Remove the unused masked 128 and 256-bit masked padds/psubs intrinsics.
2018-08-16 06:20:22 +00:00
avx512bwvl-mov.ll
…
avx512bwvl-vec-cmp.ll
…
avx512bwvl-vec-test-testn.ll
…
avx512cd-intrinsics-fast-isel.ll
…
avx512cd-intrinsics-upgrade.ll
…
avx512cd-intrinsics.ll
…
avx512cdvl-intrinsics-upgrade.ll
…
avx512cdvl-intrinsics.ll
…
avx512dq-intrinsics-fast-isel.ll
…
avx512dq-intrinsics-upgrade.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
avx512dq-intrinsics.ll
[X86] Add intrinsics for KTEST instructions.
2018-08-31 21:31:53 +00:00
avx512dq-mask-op.ll
…
avx512dqvl-intrinsics-fast-isel.ll
…
avx512dqvl-intrinsics-upgrade.ll
…
avx512dqvl-intrinsics.ll
…
avx512er-intrinsics.ll
…
avx512f-vec-test-testn.ll
…
avx512ifma-intrinsics-fast-isel.ll
…
avx512ifma-intrinsics-upgrade.ll
…
avx512ifma-intrinsics.ll
…
avx512ifmavl-intrinsics-fast-isel.ll
…
avx512ifmavl-intrinsics-upgrade.ll
…
avx512ifmavl-intrinsics.ll
…
avx512vbmi2-intrinsics-fast-isel.ll
…
avx512vbmi2-intrinsics-upgrade.ll
…
avx512vbmi2-intrinsics.ll
…
avx512vbmi2vl-intrinsics-fast-isel.ll
…
avx512vbmi2vl-intrinsics-upgrade.ll
…
avx512vbmi2vl-intrinsics.ll
…
avx512vbmi-intrinsics-fast-isel.ll
…
avx512vbmi-intrinsics-upgrade.ll
…
avx512vbmi-intrinsics.ll
…
avx512vbmivl-intrinsics-fast-isel.ll
…
avx512vbmivl-intrinsics-upgrade.ll
…
avx512vbmivl-intrinsics.ll
…
avx512vl_vnni-intrinsics-upgrade.ll
…
avx512vl_vnni-intrinsics.ll
…
avx512vl-arith.ll
…
avx512vl-intrinsics-canonical.ll
…
avx512vl-intrinsics-fast-isel.ll
[X86] Fast-isel tests for lowered truncation intrinsics
2018-07-10 08:26:54 +00:00
avx512vl-intrinsics-upgrade.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
avx512vl-intrinsics.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
avx512vl-logic.ll
…
avx512vl-mov.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
avx512vl-nontemporal.ll
…
avx512vl-vbroadcast.ll
…
avx512vl-vec-cmp.ll
…
avx512vl-vec-masked-cmp.ll
…
avx512vl-vec-test-testn.ll
…
avx512vl-vpclmulqdq.ll
…
avx512vlcd-intrinsics-fast-isel.ll
…
avx512vnni-intrinsics-upgrade.ll
…
avx512vnni-intrinsics.ll
…
avx512vpopcntdq-intrinsics.ll
…
avx512vpopcntdq-schedule.ll
…
avx-arith.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-basic.ll
[x86] try harder to use broadcast to load a scalar into vector reg
2018-08-25 14:56:05 +00:00
avx-bitcast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-brcond.ll
Regenrate test results for avx-brcond.ll . NFC
2018-01-27 16:44:00 +00:00
avx-cast.ll
[X86][SSE] Utilize ZeroableElements for canWidenShuffleElements
2018-07-12 13:29:41 +00:00
avx-cmp.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
avx-cvt-2.ll
…
avx-cvt-3.ll
…
avx-cvt.ll
…
avx-cvttp2si.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
avx-fp2int.ll
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
2016-11-14 01:53:29 +00:00
avx-gfni-intrinsics.ll
…
avx-insertelt.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx-intel-ocl.ll
…
avx-intrinsics-fast-isel.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
avx-intrinsics-x86_64.ll
…
avx-intrinsics-x86-upgrade.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
avx-intrinsics-x86.ll
…
avx-isa-check.ll
…
avx-load-store.ll
[X86] Use 128-bit ops for 256-bit vzmovl patterns.
2018-07-15 18:51:07 +00:00
avx-logic.ll
[x86] be more selective about converting 'and' to shuffle (PR37749)
2018-06-14 19:55:02 +00:00
avx-minmax.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
avx-schedule.ll
[X86][BtVer2] Fix WriteFShuffle256 schedule write info.
2018-08-31 08:30:47 +00:00
avx-select.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-shuffle-x86_32.ll
…
avx-splat.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
avx-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-unpack.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
avx-varargs-x86_64.ll
…
avx-vbroadcast.ll
…
avx-vbroadcastf128.ll
…
avx-vextractf128.ll
…
avx-vinsertf128.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
avx-vpclmulqdq.ll
…
avx-vperm2x128.ll
[DAGCombiner] Add EXTRACT_SUBVECTOR to SimplifyDemandedVectorElts
2018-07-07 17:30:06 +00:00
avx-vzeroupper.ll
[X86] Re-generate test to get proper capitalization of its CHECK lines. NFC
2018-03-13 23:31:48 +00:00
avx-win64-args.ll
Cleanup: test source files do not need to be executable
2013-04-22 08:02:43 +00:00
avx-win64.ll
[x86] Fix AVX maskload/store intrinsic prototypes.
2015-10-20 11:20:13 +00:00
avx.ll
Add LiveRangeShrink pass to shrink live range within BB.
2017-05-31 23:25:25 +00:00
backpropmask.ll
[x86] restore test comment; NFC
2018-06-08 13:53:13 +00:00
bad-tls-fold.mir
…
barrier-sse.ll
Convert test to FileCheck.
2014-01-16 06:31:20 +00:00
barrier.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
base-pointer-and-cmpxchg.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
basic-promote-integers.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bc-extract.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bigstructret2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bigstructret.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bit-piece-comment.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
bit-test-shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bitcast2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bitcast-and-setcc-128.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
bitcast-and-setcc-256.ll
…
bitcast-and-setcc-512.ll
…
bitcast-i256.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bitcast-int-to-vector-bool-sext.ll
…
bitcast-int-to-vector-bool-zext.ll
…
bitcast-int-to-vector-bool.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
bitcast-int-to-vector.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
bitcast-mmx.ll
…
bitcast-setcc-128.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
bitcast-setcc-256.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
bitcast-setcc-512.ll
[X86] Add a custom legalization for (i16 (bitcast v16i1)) and (i32 (bitcast v32i1)) without AVX512 to prevent scalarization
2018-02-26 20:32:27 +00:00
bitcast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bitcnt-false-dep.ll
[X86] Enable popcnt false dependency breaking on Silvermont and Goldmont.
2018-04-19 19:25:24 +00:00
bitreverse.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
block-placement.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
block-placement.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
bmi2-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
bmi2-x86_64.ll
…
bmi2.ll
[X86][BMI2] Test i32 intrinsics on 32/64 bits + branch off i64 tests
2018-06-02 17:22:13 +00:00
bmi-intrinsics-fast-isel-x86_64.ll
…
bmi-intrinsics-fast-isel.ll
…
bmi-schedule.ll
[X86][BMI1] Remove test for non-existent andn i16 instruction
2018-06-02 17:02:27 +00:00
bmi-x86_64.ll
…
bmi.ll
[NFC][X86][AArch64] Reorganize/cleanup BZHI test patterns
2018-06-06 19:38:10 +00:00
bool-ext-inc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bool-math.ll
[X86] Use XOR for SUB (C, X) during isel if will help fold an immediate
2018-06-26 03:11:15 +00:00
bool-simplify.ll
[X86] Promote 16-bit cmovs to 32-bits
2018-02-20 17:41:00 +00:00
bool-vector.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
bool-zext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
br-fold.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
branch_instruction_and_target_split_perf_nops.mir
…
branchfolding-catchpads.ll
…
branchfolding-debugloc.ll
[CodeGen] Add a new pass for PostRA sink
2018-03-22 20:06:47 +00:00
branchfolding-landingpads.ll
…
branchfolding-undef.mir
…
brcond.ll
Regenrate brcond.ll test results. NFC
2018-01-27 16:57:15 +00:00
break-anti-dependencies.ll
…
break-false-dep.ll
[X86] Add avx512vl command line to break-false-dep.ll
2018-07-03 04:43:49 +00:00
broadcast-elm-cross-splat-vec.ll
…
broadcastm-lowering.ll
[X86] Use setcc ISD opcode for AVX512 integer comparisons all the way to isel
2018-06-20 21:05:02 +00:00
bss_pagealigned.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bswap_tree2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap_tree.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap-inline-asm.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
bswap-rotate.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap-wide-int.ll
…
bswap.ll
[X86] Autogenerate complete checks on a couple tests. NFC
2018-01-19 22:04:20 +00:00
bt.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
btc_bts_btr.ll
…
btq.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bug26810.ll
Take into account the cost of local intervals when selecting split candidate.
2018-01-31 13:31:08 +00:00
bug37521.ll
DAG: Fix crash on shift with large shift amounts
2018-05-18 21:54:16 +00:00
build-vector-128.ll
[X86][SSE] Don't vectorize splat buildvector of binops (PR30780)
2017-12-31 17:07:47 +00:00
build-vector-256.ll
[X86][SSE] Don't vectorize splat buildvector of binops (PR30780)
2017-12-31 17:07:47 +00:00
build-vector-512.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
buildvec-insertvec.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
bypass-slow-division-32.ll
…
bypass-slow-division-64.ll
…
bypass-slow-division-tune.ll
…
byval2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval4.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval5.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval7.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
byval-align.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
byval-callee-cleanup.ll
…
byval.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
cache-intrinsic.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
call-imm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
call-push.ll
[X86] Enable call frame optimization ("mov to push") not only for optsize (PR26325)
2016-03-30 23:38:01 +00:00
cas.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
cast-vsel.ll
[X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)
2017-12-29 14:41:50 +00:00
catch.ll
Align stubs for external and common global variables to pointer size.
2018-04-02 23:20:30 +00:00
catchpad-dynamic-alloca.ll
[X86] Don't give catch objects a displacement of zero
2016-03-03 00:01:25 +00:00
catchpad-lifetime.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
catchpad-realign-savexmm.ll
…
catchpad-regmask.ll
[IR] Reformulate LLVM's EH funclet IR
2015-12-12 05:38:55 +00:00
catchpad-reuse.ll
[WinEH] Allow catchpads to reuse the same catch object
2016-10-19 17:08:23 +00:00
catchpad-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
catchret-empty-fallthrough.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
catchret-fallthrough.ll
[IR] Reformulate LLVM's EH funclet IR
2015-12-12 05:38:55 +00:00
catchret-regmask.ll
…
cfi-inserter-cfg-with-merge.mir
…
cfi-inserter-check-order.ll
…
cfi-inserter-noreturnblock.mir
Allow inconsistent offsets for 'noreturn' basic blocks when '-verify-cfiinstrs'
2018-08-30 17:31:38 +00:00
cfi-inserter-verify-inconsistent-offset.mir
…
cfi-inserter-verify-inconsistent-register.mir
…
cfi-xmm.ll
[X86] Output cfi directives for saved XMM registers even if no GPRs are saved
2017-11-18 06:23:48 +00:00
cfi.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
cfstring.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
chain_order.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
change-compare-stride-1.ll
…
change-compare-stride-trickiness-0.ll
…
change-compare-stride-trickiness-1.ll
…
change-compare-stride-trickiness-2.ll
…
change-unsafe-fp-math.ll
[TM] Restore default TargetOptions in TargetMachine::resetTargetOptions.
2017-01-10 23:43:04 +00:00
cldemote-intrinsic.ll
…
cleanuppad-inalloca.ll
…
cleanuppad-large-codemodel.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
cleanuppad-realign.ll
…
clear_upper_vector_element_bits.ll
…
clear-highbits.ll
[X86][TLI] DAGCombine: Unfold variable bit-clearing mask to two shifts.
2018-07-09 19:06:42 +00:00
clear-lowbits.ll
[X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware
2018-08-22 19:39:09 +00:00
clflushopt-schedule.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
clflushopt.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
clwb-schedule.ll
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
2018-04-06 11:00:51 +00:00
clwb.ll
[X86] Split up -march=icelake to -client & -server
2018-04-10 18:59:13 +00:00
clz.ll
[X86] Add test cases that exercise the BSR/BSF optimization combineCMov.
2018-02-06 21:47:04 +00:00
clzero-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
clzero.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cmov-double.ll
DAGCombiner: Canonicalize select(and/or,x,y) depending on target.
2015-03-06 19:49:10 +00:00
cmov-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
cmov-into-branch.ll
…
cmov-promotion.ll
…
cmov-schedule.ll
[X86] Give CMOV 2 cycle latency on SLM.
2018-04-18 06:04:30 +00:00
cmov.ll
[CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
2018-06-05 21:03:52 +00:00
cmovcmov.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
cmp-fast-isel.ll
Use the i8 immediate cmp instructions when possible.
2015-03-16 14:25:08 +00:00
cmp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
cmpxchg8b_alloca_regalloc_handling.ll
…
cmpxchg8b.ll
[X86] Regenerate cmpxchg tests
2018-02-28 22:57:23 +00:00
cmpxchg16b.ll
[X86] Regenerate cmpxchg tests
2018-02-28 22:57:23 +00:00
cmpxchg-clobber-flags.ll
…
cmpxchg-i1.ll
…
cmpxchg-i128-i1.ll
…
coal-sections.ll
[MachO] Stop generating *coal* sections.
2015-10-15 05:28:38 +00:00
coalesce_commute_movsd.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
coalesce_commute_subreg.ll
…
coalesce-dbg-value-subreg-rewrite.mir
[RegisterCoalescer] Use substPhysReg in reMaterializeTrivialDef
2018-08-21 19:47:32 +00:00
coalesce-dead-lanes.mir
[RegisterCoalescer] Do not assert when trying to remat dead values
2018-08-21 07:49:05 +00:00
coalesce-esp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
coalesce-implicitdef.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
coalescer-commute1.ll
…
coalescer-commute2.ll
…
coalescer-commute3.ll
…
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-cross.ll
…
coalescer-dce2.ll
…
coalescer-dce.ll
…
coalescer-identity.ll
…
coalescer-remat.ll
…
coalescer-subreg.ll
…
coalescer-win64.ll
…
code_placement_align_all.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
code_placement_cold_loop_blocks.ll
Revert Revert [MBP] do not rotate loop if it creates extra branch
2017-07-11 08:34:58 +00:00
code_placement_eh.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
code_placement_ignore_succ_in_inner_loop.ll
…
code_placement_loop_rotation2.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
code_placement_loop_rotation3.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
code_placement_loop_rotation.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
code_placement.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
code-model-elf-memset.ll
Load from the GOT for external symbols in the large, PIC code model
2018-08-01 22:56:05 +00:00
code-model-elf.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
code-model-kernel.ll
Restore correct x86_64 EH encodings in kernel code model
2018-08-13 06:06:53 +00:00
codegen-prepare-addrmode-sext.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
codegen-prepare-cast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
codegen-prepare-crash.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
codegen-prepare-extload.ll
[CodeGenPrep]Restructure promoting Ext to form ExtLoad
2017-03-17 19:05:21 +00:00
codegen-prepare.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
codemodel.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
coff-comdat2.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
coff-comdat3.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
coff-comdat.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
coff-feat00.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
coff-no-dead-strip.ll
…
coff-weak.ll
COFF: Do not assign linker-weak symbols to selectany comdat sections.
2015-06-30 19:10:31 +00:00
coldcc64.ll
Fix test by matching movaps instead of AVX-only vmovaps
2013-02-22 19:53:30 +00:00
combine-64bit-vec-binop.ll
…
combine-abs.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
combine-add.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-and.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
combine-avx2-intrinsics.ll
…
combine-avx-intrinsics.ll
…
combine-fabs.ll
…
combine-fcopysign.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
combine-lds.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
combine-mul.ll
[X86] Remove sse41 specific code from lowering v16i8 multiply
2018-03-19 17:31:41 +00:00
combine-multiplies.ll
…
combine-or.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
combine-pmuldq.ll
…
combine-rotates.ll
[DAGCombiner] extractShiftForRotate - fix out of range shift issue
2018-08-17 12:25:18 +00:00
combine-sdiv.ll
[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds
2018-08-29 11:30:16 +00:00
combine-select.ll
[X86] Fix a potential crash that occur after r333419.
2018-05-29 20:04:10 +00:00
combine-sext-in-reg.ll
…
combine-shl.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
combine-smax.ll
…
combine-smin.ll
…
combine-sra.ll
[DAGCombine] Improve (sra (sra x, c1), c2) -> (sra x, (add c1, c2)) folding
2018-08-17 10:52:49 +00:00
combine-srem.ll
[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds
2018-08-29 11:30:16 +00:00
combine-srl.ll
[X86][SSE] Reduce instruction/register usages for v4i32 vector shifts (PR37441)
2018-05-16 20:52:52 +00:00
combine-sse41-intrinsics.ll
…
combine-sub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
combine-testm-and.ll
…
combine-udiv.ll
[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds
2018-08-29 11:30:16 +00:00
combine-umax.ll
…
combine-umin.ll
[X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for all legal types
2018-02-11 10:52:37 +00:00
combine-urem.ll
[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds
2018-08-29 11:30:16 +00:00
commute-3dnow.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
commute-blend-avx2.ll
…
commute-blend-sse41.ll
…
commute-clmul.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
commute-fcmp.ll
…
commute-intrinsic.ll
…
commute-two-addr.ll
[TwoAddressInstructionPass] When looking for a 3 addr conversion after commuting, make sure regB has been updated to take into account the commute.
2015-10-06 05:39:59 +00:00
commute-vpclmulqdq-avx512.ll
…
commute-vpclmulqdq-avx.ll
…
commute-xop.ll
[X86] Mark XOP vpmac* and vpmadc intrinsics as being commutative so that tablegen will generate patterns with the load in operand 0.
2018-02-20 03:58:14 +00:00
commuted-blend-mask.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
compact-unwind.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
compare_folding.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compare-add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compare-global.ll
X86: Teach X86InstrInfo::analyzeCompare to recognize compares of symbols.
2017-02-09 21:58:24 +00:00
compare-inf.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compiler_used.ll
s/compiler_used/compiler.used/.
2013-07-19 18:44:51 +00:00
complex-asm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
complex-fastmath.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
complex-fca.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
compress_expand.ll
[X86] Use vpmovq2m/vpmovd2m for truncate to vXi1 when possible.
2018-02-19 22:07:31 +00:00
computeKnownBits_urem.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
conditional-indecrement.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
conditional-tailcall-samedest.mir
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
conditional-tailcall.ll
Re-apply r282920 "X86: Allow conditional tail calls in Win64 "leaf" functions (PR26302)"
2017-02-16 19:04:42 +00:00
const-base-addr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
constant-combines.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
constant-hoisting-and.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constant-hoisting-bfi.ll
[ConstHoisting] choose to hoist when frequency is the same.
2017-07-06 22:32:27 +00:00
constant-hoisting-cmp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constant-hoisting-optnone.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
constant-hoisting-shift-immediate.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constant-pool-remat-0.ll
…
constant-pool-sharing.ll
CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF
2014-07-14 22:57:27 +00:00
constpool.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constructor.ll
[COFF] Implement constructor priorities
2017-11-28 08:07:18 +00:00
convert-2-addr-3-addr-inc64.ll
…
copy-eflags.ll
[x86][eflags] Fix PR37431 by teaching the EFLAGS copy lowering to
2018-05-15 20:16:57 +00:00
copy-propagation.ll
MachineCopyPropagation: Do not consider undef operands as clobbers
2017-02-04 02:27:13 +00:00
copysign-constant-magnitude.ll
…
cpus.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
crash-lre-eliminate-dead-def.ll
…
crash-nosse.ll
…
crash-O0.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
crash.ll
[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output
2017-11-30 12:12:19 +00:00
critical-anti-dep-breaker.ll
…
critical-edge-split-2.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cse-add-with-overflow.ll
…
cstring.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
ctor-priority-coff.ll
[COFF] Implement llvm.global_ctors priorities for MSVC COFF targets
2018-09-07 23:07:55 +00:00
ctpop-combine.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cvt16.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
cvtv2f32.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
cxx_tlscc64.ll
…
dag-fmf-cse.ll
…
dag-merge-fast-accesses.ll
…
dag-optnone.ll
In dag-optnone.ll, use varargs instead of win64 to fast SDIsel.
2016-07-15 15:30:18 +00:00
dag-rauw-cse.ll
…
dag-update-nodetomatch.ll
…
dagcombine-and-setcc.ll
…
dagcombine-buildvector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
dagcombine-cse.ll
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
2018-07-17 09:45:35 +00:00
dagcombine-select.ll
[X86] Canonicalize the pattern for __builtin_ffs in a similar way to '__builtin_ffs + 5'
2018-08-01 18:38:46 +00:00
dagcombine-shifts.ll
…
dagcombine-unsafe-math.ll
…
darwin-bzero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
darwin-no-dead-strip.ll
…
darwin-preemption.ll
Represent runtime preemption in the IR.
2017-10-26 15:00:26 +00:00
darwin-quote.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
darwin-tls.ll
[TLS on Darwin] use a different mask for tls calls on x86-64.
2015-11-12 00:54:04 +00:00
dbg-baseptr.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-changes-codegen-branch-folding2.mir
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-changes-codegen-branch-folding.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-changes-codegen.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dbg-combine.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg-line-0-no-discriminator.ll
…
dbg-value-superreg-copy.mir
[LiveDebugVariables] Avoid faulty addDefsFromCopies in computeIntervals
2018-08-25 10:02:03 +00:00
DbgValueOtherTargets.test
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
debug-nodebug-crash.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debuginfo-locations-dce.ll
Test commit.
2018-09-03 09:41:43 +00:00
debugloc-argsize.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debugloc-no-line-0.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
deopt-bundles.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
deopt-intrinsic-cconv.ll
…
deopt-intrinsic.ll
…
disable-tail-calls.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
discontiguous-loops.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
div8.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
div-rem-simplify.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
divide-by-constant.ll
[BypassSlowDivision] Teach bypass slow division not to interfere with div by constant where constants have been constant hoisted, but not moved from their basic block
2018-08-21 17:15:33 +00:00
divide-windows-itanium.ll
CodeGen: use MSVC division on windows itanium
2016-10-13 23:00:11 +00:00
divrem8_ext.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
divrem.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
dllexport-x86_64.ll
…
dllexport.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
dllimport-x86_64.ll
…
dllimport.ll
[X86] Teach fastisel to select calls to dllimport functions
2017-08-05 00:10:43 +00:00
dollar-name.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
domain-reassignment-implicit-def.ll
[X86DomainReassignment] Don't delete IMPLICIT_DEF nodes
2018-05-18 00:40:52 +00:00
domain-reassignment-test.ll
[X86DomainReassignment] Hopefully fix buildbot failure
2018-05-18 04:36:38 +00:00
domain-reassignment.mir
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
dont-trunc-store-double-to-float.ll
…
dropped_constructor.ll
Don't create a comdat group for a dropped def with initializer
2017-01-18 16:58:43 +00:00
dwarf-comp-dir.ll
[DebugInfo] Support DWARF v5 source code embedding extension
2018-02-23 23:01:06 +00:00
dwarf-eh-prepare.ll
…
dwarf-headers.ll
[DWARFv5] Put the DWO ID in its place.
2018-05-22 17:27:31 +00:00
dwarf-split-line-1.ll
CodeGen: Add a dwo output file argument to addPassesToEmitFile and hook it up to dwo output.
2018-05-21 20:16:41 +00:00
dwarf-split-line-2.ll
CodeGen: Add a dwo output file argument to addPassesToEmitFile and hook it up to dwo output.
2018-05-21 20:16:41 +00:00
dyn_alloca_aligned.ll
Fixed a bug in dynamic allocation memory on stack.
2013-10-14 07:26:51 +00:00
dyn-stackalloc.ll
test/CodeGen/X86/dyn-stackalloc.ll: FileCheck-ize.
2011-03-16 13:52:08 +00:00
dynamic-alloca-in-entry.ll
…
dynamic-alloca-lifetime.ll
…
dynamic-allocas-VLAs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dynamic-regmask.ll
[X86] Add phony registers for high halves of regs with low halves
2018-07-02 19:05:09 +00:00
DynamicCalleeSavedRegisters.ll
…
early-cfi-sections.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
early-ifcvt-crash.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
early-ifcvt.ll
…
eh_frame.ll
Bring r252305 back with a test fix.
2015-11-06 15:30:45 +00:00
eh-frame-unreachable.ll
…
eh-label.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
eh-nolandingpads.ll
…
eh-null-personality.ll
[EH] Handle non-Function personalities like unknown personalities
2015-08-31 20:02:16 +00:00
eh-unknown.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
eip-addressing-i386.ll
[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.
2018-09-06 02:03:14 +00:00
element-wise-atomic-memory-intrinsics.ll
Changing constants in a test (NFC)
2018-05-08 19:08:12 +00:00
elf-associated.ll
Ignore !associated metadata with null argument.
2017-05-08 23:46:20 +00:00
elf-comdat2.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
elf-comdat.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
emit-big-cst.ll
…
empty-function.ll
Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"
2017-04-21 21:48:41 +00:00
empty-functions.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
empty-struct-return-type.ll
…
emutls_generic.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
emutls-pic.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
emutls-pie.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
emutls.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
epilogue-cfi-fp.ll
…
epilogue-cfi-no-fp.ll
…
epilogue.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
equiv_with_fndef.ll
…
equiv_with_vardef.ll
CodeGen: Error on redefinitions instead of asserting
2014-12-24 23:06:55 +00:00
evex-to-vex-compress.mir
…
exception-label.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
exedeps-movq.ll
…
exedepsfix-broadcast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
expand-opaque-const.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
expand-vr64-gr64-copy.mir
…
extend-set-cc-uses-dbg.ll
…
extend.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extended-fma-contraction.ll
…
extern_weak.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
extmul64.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extmul128.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extract-combine.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extract-concat.ll
Revert part of r166049 back and enable test case in r166125.
2012-10-17 23:45:54 +00:00
extract-extract.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extract-insert.ll
[DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices
2018-01-03 22:42:33 +00:00
extract-lowbits.ll
[X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware
2018-08-22 19:39:09 +00:00
extract-store.ll
[X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned.
2018-07-02 17:01:54 +00:00
extractelement-from-arg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extractelement-index.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
extractelement-legalization-cycle.ll
…
extractelement-legalization-store-ordering.ll
…
extractelement-load.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
extractelement-shuffle.ll
Make the default triple optional by allowing an empty string
2015-09-16 05:34:32 +00:00
extractps.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
f16c-intrinsics-fast-isel.ll
…
f16c-intrinsics.ll
…
f16c-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
fabs.ll
[SelectionDAG] Removing FABS folding from DAGCombiner
2018-03-30 15:42:52 +00:00
fadd-combines.ll
[DAGCombiner] remove hasOneUse() check from fadd constants transform
2018-06-13 15:22:48 +00:00
fast-cc-callee-pops.ll
…
fast-cc-merge-stack-adj.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-cc-pass-in-regs.ll
…
fast-isel-abort-warm.ll
[FastISel] fix a fallback diagnostic.
2017-07-09 05:55:20 +00:00
fast-isel-agg-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-args-fail2.ll
Fix the test for r231201. We don't crash anymore.
2015-03-04 02:09:40 +00:00
fast-isel-args-fail.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-args.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-atomic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-avoid-unnecessary-pic-base.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-bail.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-bc.ll
[X86][MMX] Improve handling of 64-bit MMX constants
2018-03-01 22:22:31 +00:00
fast-isel-bitcasts-avx512.ll
[AVX-512] Teach fast isel to handle 512-bit vector bitcasts.
2016-12-05 05:50:51 +00:00
fast-isel-bitcasts-avx.ll
Reapply r249121 : "[FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types."
2015-10-02 16:08:05 +00:00
fast-isel-bitcasts.ll
Reapply r249121 : "[FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types."
2015-10-02 16:08:05 +00:00
fast-isel-branch_weights.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-call-bool.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-call-cleanup.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
fast-isel-call.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fast-isel-cmp-branch2.ll
Allow X86::COND_NE_OR_P and X86::COND_NP_OR_E to be reversed.
2016-03-23 21:45:37 +00:00
fast-isel-cmp-branch3.ll
Allow X86::COND_NE_OR_P and X86::COND_NP_OR_E to be reversed.
2016-03-23 21:45:37 +00:00
fast-isel-cmp-branch.ll
FastISel: Avoid adding a successor block twice for degenerate IR.
2015-08-26 20:46:49 +00:00
fast-isel-cmp.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fast-isel-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-constpool.ll
Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models""
2018-06-28 17:56:43 +00:00
fast-isel-constrain-store-indexreg.ll
…
fast-isel-deadcode.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fast-isel-divrem-x86-64.ll
…
fast-isel-divrem.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-double-half-convertion.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-emutls.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
fast-isel-expect.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-extract.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-float-half-convertion.ll
[X86][FastISel] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR.
2016-02-02 01:44:03 +00:00
fast-isel-fneg.ll
…
fast-isel-fold-mem.ll
[X86] Regenerate fast-isel tests.
2018-07-30 16:13:40 +00:00
fast-isel-fptrunc-fpext.ll
…
fast-isel-gc-intrinsics.ll
…
fast-isel-gep.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-gv.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-i1.ll
Use sext in fast isel.
2015-04-06 22:29:07 +00:00
fast-isel-int-float-conversion-x86-64.ll
[X86][FastISel] Add EVEX support to sitofp handling.
2018-07-13 21:03:43 +00:00
fast-isel-int-float-conversion.ll
[X86][FastISel] Add EVEX support to sitofp handling.
2018-07-13 21:03:43 +00:00
fast-isel-load-i1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-mem.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
fast-isel-movsbl-indexreg.ll
…
fast-isel-nontemporal.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fast-isel-noplt-pic.ll
…
fast-isel-ret-ext.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-select-cmov2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-select-cmov.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-select-cmp.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
fast-isel-select-pseudo-cmov.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-select-sse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-select.ll
[X86] Regenerate fast-isel tests.
2018-07-30 16:13:40 +00:00
fast-isel-sext-zext.ll
[X86] Regenerate fast-isel tests.
2018-07-30 16:13:40 +00:00
fast-isel-sext.ll
Use sext in fast isel.
2015-04-06 22:29:07 +00:00
fast-isel-shift.ll
[X86] Add back fast-isel code for handling i8 shifts.
2018-03-14 17:57:19 +00:00
fast-isel-sse12-fptoint.ll
…
fast-isel-stackcheck.ll
[SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARD
2016-04-19 19:40:37 +00:00
fast-isel-store.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
fast-isel-tailcall.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-tls.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-trunc-kill-subreg.ll
[X86] Fast-ISel was incorrectly always killing the source of a truncate.
2015-05-08 18:29:42 +00:00
fast-isel-uint-float-conversion-x86-64.ll
[X86][FastISel] Support uitofp with avx512.
2018-07-13 22:09:30 +00:00
fast-isel-uint-float-conversion.ll
[X86][FastISel] Support uitofp with avx512.
2018-07-13 22:09:30 +00:00
fast-isel-vecload.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-x32.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-x86-64.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fast-isel-x86.ll
[X86] Teach fastisel to select calls to dllimport functions
2017-08-05 00:10:43 +00:00
fast-isel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcall-correct-mangling.ll
Correct PrivateLinkage for COFF
2016-10-13 00:55:24 +00:00
fastcc3struct.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcc-2.ll
Rewrite some of the test/CodeGen/X86 tests to use FileCheck instead of grep
2013-04-10 23:30:20 +00:00
fastcc-byval.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fastcc-sret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcc.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fastisel-gep-promote-before-add.ll
…
fastisel-softfloat.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fastmath-float-half-conversion.ll
[X86] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR.
2016-02-02 01:32:50 +00:00
fcmove.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
fdiv-combine.ll
[DAGCombine] foldBinOpIntoSelect can fail to constant fold in some cases.
2017-12-27 11:36:18 +00:00
fdiv.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fentry-insertion.ll
[X86] Fix a crash in FEntryInserter Pass.
2017-08-01 15:39:12 +00:00
field-extract-use-trunc.ll
…
fildll.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
file-directive.ll
Make .file directive to have basename only
2017-08-10 18:17:11 +00:00
file-source-filename.ll
CodeGen: Use the source filename as the argument to .file, rather than the module ID.
2017-03-15 16:24:52 +00:00
finite-libcalls.ll
[X86] Properly implement the calling convention for f80 for mingw/x86_64
2018-03-20 06:19:38 +00:00
fixed-stack-di-mir.ll
[MIR] Add support for debug metadata for fixed stack objects
2018-04-25 18:58:06 +00:00
fixup-bw-copy.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
fixup-bw-copy.mir
…
fixup-bw-inst.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fixup-bw-inst.mir
…
fixup-lea.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
flags-copy-lowering.mir
[X86] In EFLAGS copy pass, don't emit EXTRACT_SUBREG instructions since we're after peephole
2018-08-16 21:54:02 +00:00
float-asmprint.ll
IR: Allow vectors of halfs to be ConstantDataVectors
2015-12-08 03:01:16 +00:00
float-conv-elim.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
floor-soft-float.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fltused_function_pointer.ll
[NFC] fix trivial typos in comments and documents
2018-01-29 05:17:03 +00:00
fltused.ll
[NFC] fix trivial typos in comments and documents
2018-01-29 05:17:03 +00:00
fma4-commute-x86.ll
[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
2018-07-06 07:14:41 +00:00
fma4-fneg-combine.ll
[X86] Enhance combineFMA to look for FNEG behind an EXTRACT_VECTOR_ELT.
2018-07-08 18:04:00 +00:00
fma4-intrinsics-x86_64-folded-load.ll
…
fma4-intrinsics-x86-upgrade.ll
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
2018-07-05 18:43:58 +00:00
fma4-intrinsics-x86.ll
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
2018-07-05 18:43:58 +00:00
fma4-scalar-memfold.ll
[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
2018-07-06 07:14:41 +00:00
fma4-schedule.ll
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
2018-04-06 11:00:51 +00:00
fma_patterns_wide.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fma_patterns.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fma-commute-x86.ll
[X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independent FMA and extractelement/insertelement.
2018-07-05 06:52:55 +00:00
fma-do-not-commute.ll
…
fma-fneg-combine.ll
[X86] Remove and autoupgrade the scalar fma intrinsics with masking.
2018-07-12 00:29:56 +00:00
fma-intrinsics-canonical.ll
…
fma-intrinsics-fast-isel.ll
…
fma-intrinsics-phi-213-to-231.ll
…
fma-intrinsics-x86-upgrade.ll
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
2018-07-05 18:43:58 +00:00
fma-intrinsics-x86.ll
[X86] Add a missing FMA3 scalar intrinsic pattern.
2018-07-16 23:10:58 +00:00
fma-phi-213-to-231.ll
…
fma-scalar-combine.ll
…
fma-scalar-memfold.ll
[X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independent FMA and extractelement/insertelement.
2018-07-05 06:52:55 +00:00
fma-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
fma.ll
[X86] Enable commuting of VUNPCKHPD to VMOVLHPS to enable load folding by using VMOVLPS with a modified address.
2018-07-18 07:31:32 +00:00
fmaddsub-combine.ll
…
fmaxnum.ll
[DAG] propagate FMF for all FPMathOperators
2018-05-15 14:16:24 +00:00
fmf-flags.ll
Utilize new SDNode flag functionality to expand current support for fadd
2018-06-18 23:44:59 +00:00
fmf-propagation.ll
…
fminnum.ll
[DAG] propagate FMF for all FPMathOperators
2018-05-15 14:16:24 +00:00
fmsubadd-combine.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
fmul-combines.ll
Utilize new SDNode flag functionality to expand current support for fmul
2018-06-12 16:13:11 +00:00
fmul-zero.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fnabs.ll
fixed to test feature, not CPU
2015-03-06 20:51:25 +00:00
fold-add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-and-shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-call-2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fold-call-3.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fold-call-oper.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fold-call.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-imm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-load-binops.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fold-load-unops.ll
[X86] Lowering sqrt intrinsics to native IR
2018-06-15 18:05:24 +00:00
fold-load-vec.ll
Regenerate partial vector fold test. NFCI.
2018-07-20 13:58:57 +00:00
fold-load.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fold-mul-lohi.ll
…
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
…
fold-push.ll
Mark Knights Landing as having slow two memory operand instructions
2017-08-29 05:14:27 +00:00
fold-rmw-ops.ll
[DAGCOmbine] Ensure that (brcond (setcc ...)) is handled in a canonical manner.
2018-02-23 11:50:42 +00:00
fold-sext-trunc.ll
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
2018-05-11 18:40:08 +00:00
fold-tied-op.ll
…
fold-vector-bv-crash.ll
[SelectionDAG] Unary vector constant folding integer legality fixes
2015-05-01 08:20:04 +00:00
fold-vector-sext-crash2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fold-vector-sext-crash.ll
[X86] Turn selects with constant condition into vector shuffles during DAG combine
2018-02-17 00:30:30 +00:00
fold-vector-sext-zext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fold-vector-shl-crash.ll
…
fold-vector-shuffle-crash.ll
CONCAT_VECTOR of BUILD_VECTOR - minor fix
2015-04-21 08:05:43 +00:00
fold-vector-trunc-sitofp.ll
[SelectionDAG] Unary vector constant folding integer legality fixes
2015-05-01 08:20:04 +00:00
fold-vex.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fold-xmm-zero.ll
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
2014-02-13 14:44:26 +00:00
fold-zext-trunc.ll
…
fops-windows-itanium.ll
CodeGen: adjust floating point operations in Windows itanium
2016-10-13 22:38:15 +00:00
force-align-stack-alloca.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
force-align-stack.ll
Use function attribute "stackrealign" to decide whether stack
2015-09-11 18:54:38 +00:00
fp2sint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp128-calling-conv.ll
[X86] Part 2 to fix x86-64 fp128 calling convention.
2015-12-14 22:08:36 +00:00
fp128-cast.ll
Add support for emitting libcalls for x86_fp80 -> fp128 and vice-versa
2018-01-17 22:29:16 +00:00
fp128-compare.ll
[legalize-types] Remove stale entries from SoftenedFloats.
2017-03-04 12:00:35 +00:00
fp128-extract.ll
[X86] Regenerate fp128 test
2018-01-14 19:07:41 +00:00
fp128-g.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
fp128-i128.ll
[DAGCombiner] Reduce load widths of shifted masks
2018-08-21 10:26:59 +00:00
fp128-libcalls.ll
[legalize-types] Remove stale entries from SoftenedFloats.
2017-03-04 12:00:35 +00:00
fp128-load.ll
[legalize-types] Remove stale entries from SoftenedFloats.
2017-03-04 12:00:35 +00:00
fp128-select.ll
[X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned.
2018-07-02 17:01:54 +00:00
fp128-store.ll
[X86] Part 2 to fix x86-64 fp128 calling convention.
2015-12-14 22:08:36 +00:00
fp_constant_op.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp_load_cast_fold.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
fp_load_fold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-arith.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
fp-cvt.ll
Go back to sometimes assuming intristics are local.
2018-03-10 02:42:14 +00:00
fp-double-rounding.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-elim-and-no-fp-elim.ll
…
fp-elim.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-fast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-fold.ll
extend folding fsub/fadd to fneg for FMF
2018-08-09 17:00:03 +00:00
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-intrinsics.ll
[FPEnv] Support constrained FREM intrinsic
2018-08-20 19:28:56 +00:00
fp-load-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-logic-replace.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-logic.ll
[X86][SSE] Add additional fadd/fsub(x, bitcast_fneg(y)) tests with different integer bitwidths
2018-09-07 13:27:07 +00:00
fp-select-cmp-and.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-stack-2results.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-compare-cmov.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-compare.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-direct-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-O0-crash.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-stack-O0.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
fp-stack-ret-conv.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
fp-stack-ret-store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
fp-stack-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-retcopy.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-set-st1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-undef.ll
[DAG] fold FP binops with undef operands to NaN
2018-05-21 23:54:19 +00:00
fp-une-cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fpcmp-soft-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fpstack-debuginstr-kill.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
fptosi-constant.ll
…
frame-base.ll
X86: FrameIndex addressing modes do have a base register.
2013-09-19 11:33:53 +00:00
frame-lowering-debug-intrinsic-2.ll
…
frame-lowering-debug-intrinsic.ll
…
frame-order.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
frameaddr.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
frameregister.ll
…
frem-msvc32.ll
[CodeGen] Fix FREM on 32-bit MSVC on x86
2015-09-02 01:31:58 +00:00
fsgsbase-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
fsgsbase.ll
[X86] Regenerate fsgsbase intrinsic tests. NFCI.
2017-12-11 12:22:15 +00:00
fsxor-alignment.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ftrunc.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
full-lsr.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
funclet-layout.ll
[WinEH] Use operand bundles to describe call sites
2015-12-15 21:27:27 +00:00
function-alias.ll
Move llvm/test/CodeGen/Generic/function-alias.ll to X86. It is incompatible to PECOFF.
2015-12-04 02:00:12 +00:00
function-subtarget-features-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
function-subtarget-features.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
funnel-shift-rot.ll
[x86] remove stale FIXME note from test; NFC
2018-08-01 17:18:50 +00:00
funnel-shift.ll
[SelectionDAG] fix bug in translating funnel shift with non-power-of-2 type
2018-08-01 17:17:08 +00:00
ga-offset2.ll
Use shouldAssumeDSOLocal in isOffsetFoldingLegal.
2016-06-24 18:48:36 +00:00
ga-offset.ll
Use FileCheck. NFC.
2016-06-24 18:04:39 +00:00
gather-addresses.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
gcc_except_table_functions.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
gcc_except_table.ll
[WinEH] Teach AsmPrinter about funclets
2015-09-29 20:12:33 +00:00
gep-expanded-vector.ll
Fix bug in DAGBuilder for getelementptr with expanded vector.
2016-08-17 07:52:15 +00:00
getelementptr.ll
[CGP] Fix GEP issue with out of range APInt constant values not fitting in int64_t
2018-08-13 12:10:09 +00:00
gfni-intrinsics.ll
…
ghc-cc64.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
ghc-cc.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
global-access-pie-copyrelocs.ll
…
global-access-pie.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
global-fill.ll
[AsmPrinter] Make isRepeatedByteSequence smarter about odd integer types
2015-06-17 23:55:17 +00:00
global-sections-comdat.ll
Implement unique sections with an unique ID.
2015-04-04 18:02:01 +00:00
global-sections-tls.ll
…
global-sections.ll
[MachO] Emit Weak ReadOnlyWithRel to ConstDataSection
2018-04-10 20:16:35 +00:00
gnu-seh-nolpads.ll
[EH] Recognize __(gxx|gcc)_personality_seh0 as the GNU EH personalities
2017-05-31 22:35:52 +00:00
gpr-to-mask.ll
…
greedy_regalloc_bad_eviction_sequence.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
gs-fold.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
…
haddsub-2.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
haddsub-3.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
haddsub-shuf.ll
[X86][SSE] Use SplitOpsAndApply to improve HADD/HSUB lowering
2018-07-20 16:20:45 +00:00
haddsub-undef.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
haddsub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
half.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
handle-move.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
hhvm-cc.ll
HHVM calling conventions.
2015-09-29 22:09:16 +00:00
hidden-vis-2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
hidden-vis-3.ll
Use a got to access a hidden weak undefined on MachO.
2018-01-17 19:19:55 +00:00
hidden-vis-4.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
hidden-vis-pic.ll
CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
2016-08-24 01:52:46 +00:00
hidden-vis.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
hipe-cc64.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
hipe-cc.ll
[DAG] Improve Aliasing of operations to static alloca
2017-07-18 20:06:24 +00:00
hipe-prologue.ll
…
hoist-common.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
hoist-invariant-load.ll
…
hoist-spill-lpad.ll
…
hoist-spill.ll
…
horizontal-reduce-smax.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
horizontal-reduce-smin.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
horizontal-reduce-umax.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
horizontal-reduce-umin.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
horizontal-shuffle.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
huge-stack-offset2.ll
[X86] Emit fewer instructions to allocate >16GB stack frames
2017-03-17 20:25:49 +00:00
huge-stack-offset.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
i1narrowfail.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
i2k.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i16lshr8pat.ll
…
i64-mem-copy.ll
…
i64-to-float.ll
[SelectionDAG] ComputeNumSignBits - add support for SMIN+SMAX clamp patterns
2018-02-17 22:19:50 +00:00
i128-and-beyond.ll
…
i128-immediate.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i128-mul.ll
[CodeGen] Add a new pass for PostRA sink
2018-03-22 20:06:47 +00:00
i128-ret.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
i128-sdiv.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
i256-add.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
i386-setjmp-pic.ll
…
i386-shrink-wrapping.ll
…
i386-tlscall-fastregalloc.ll
…
i486-fence-loop.ll
…
i686-win-shrink-wrapping.ll
…
iabs.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
icall-branch-funnel.ll
…
icmp-opt.ll
[DagCombiner] Not all 'andn''s work with immediates.
2018-05-07 21:52:11 +00:00
ident-metadata.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
ifunc-asm.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
illegal-bitfield-loadstore.ll
…
illegal-insert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
illegal-vector-args-return.ll
…
immediate_merging64.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
immediate_merging.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
implicit-null-check-negative.ll
Fix implicit null check with negative offset
2017-10-17 11:47:36 +00:00
implicit-null-check.ll
Fix implicit null check with negative offset
2017-10-17 11:47:36 +00:00
implicit-null-checks.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
implicit-null-chk-reg-rewrite.mir
[ImplicitNullChecks] Check for rewrite of register used in 'test' instruction
2018-07-04 08:01:26 +00:00
implicit-use-spill.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
imul-lea-2.ll
…
imul-lea.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
imul.ll
[X86] Remove an unnecessary 'if' that prevented treating INT64_MAX and -INT64_MAX as power of 2 minus 1 in the multiply expansion code.
2018-07-27 05:56:27 +00:00
inalloca-ctor.ll
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
2016-05-18 16:10:17 +00:00
inalloca-invoke.ll
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
2016-05-18 16:10:17 +00:00
inalloca-regparm.ll
…
inalloca-stdcall.ll
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
2016-05-18 16:10:17 +00:00
inalloca.ll
Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
2016-05-18 16:10:17 +00:00
inconsistent_landingpad.ll
[SelectionDAGBuilder] Adds support for landingpads of token type
2015-12-16 04:48:42 +00:00
indirect-branch-tracking.ll
…
indirect-hidden.ll
Simplify handling of hidden stub.
2016-05-17 16:01:32 +00:00
init-priority.ll
[CodeGen] Switch test as FreeBSD will support .init_array soon.
2016-09-26 22:38:17 +00:00
inline-0bh.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
inline-asm-2addr.ll
Specify triple so 'make check' passes on darwin x86-64
2015-12-28 18:28:44 +00:00
inline-asm-A-constraint.ll
Allow usage of X86-prefixes as separate instrs.
2018-01-17 10:12:06 +00:00
inline-asm-avx512f-v-constraint.ll
…
inline-asm-avx512vl-v-constraint-32bit.ll
…
inline-asm-avx512vl-v-constraint.ll
…
inline-asm-avx-v-constraint-32bit.ll
…
inline-asm-avx-v-constraint.ll
…
inline-asm-bad-constraint-n.ll
…
inline-asm-bad-modifier.ll
[X86] Don't crash on bad operand modifiers in inline assembly
2018-04-18 05:15:24 +00:00
inline-asm-duplicated-constraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-error.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-flag-clobber.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-fpstack.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
inline-asm-h.ll
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
2014-02-13 14:44:26 +00:00
inline-asm-modifier-n.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-modifier-q.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-modifier-V.ll
[X86] Support 'V' register operand modifier
2018-02-08 20:06:05 +00:00
inline-asm-mrv.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-out-regs.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
inline-asm-pic.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
inline-asm-ptr-cast.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
inline-asm-q-regs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-R-constraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-sp-clobber-memcpy.ll
…
inline-asm-stack-realign2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
inline-asm-stack-realign3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-stack-realign.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-tied.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-x-scalar.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-sse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
inlineasm-sched-bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inreg.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
ins_split_regalloc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insert-into-constant-vector.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
insert-loaded-scalar.ll
[x86] try harder to use broadcast to load a scalar into vector reg
2018-08-25 14:56:05 +00:00
insert-positions.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
insertelement-copytoregs.ll
…
insertelement-duplicates.ll
…
insertelement-legalize.ll
…
insertelement-ones.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
insertelement-shuffle.ll
…
insertelement-var-index.ll
[SelectionDAG][x86] turn insertelement into undef with variable index into splat
2018-08-26 18:20:41 +00:00
insertelement-zero.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
insertps-combine.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
insertps-from-constantpool.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
insertps-O0-bug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
insertps-unfold-load-bug.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
instr-symbols.mir
[x86] Fix test breaking on Darwin after r339962
2018-08-17 14:47:01 +00:00
int-intrinsic.ll
…
intersect-fma-fmf.ll
Guard FMF context by excluding some FP operators from FPMathOperator
2018-09-12 21:09:59 +00:00
interval-update-remat.ll
Don't skip splitSeparateComponents in eliminateDeadDefs for HoistSpillHelper::hoistAllSpills.
2016-04-15 23:16:44 +00:00
invalid-liveness.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
invalid-shift-immediate.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
invpcid-intrinsic.ll
…
ipra-inline-asm.ll
[X86] Add phony registers for high halves of regs with low halves
2018-07-02 19:05:09 +00:00
ipra-local-linkage.ll
…
ipra-reg-alias.ll
[X86] Add phony registers for high halves of regs with low halves
2018-03-20 18:46:55 +00:00
ipra-reg-usage.ll
[X86] Add phony registers for high halves of regs with low halves
2018-07-02 19:05:09 +00:00
ipra-transform.ll
Move CodeGen test from Generic to X86 specific directory
2016-06-10 19:14:01 +00:00
isel-optnone.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isel-sink2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isel-sink3.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
isel-sink.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isint.ll
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
2017-04-26 07:08:44 +00:00
isnan2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isnan.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ispositive.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
jump_sign.ll
[X86] Turn X86ISD::AND nodes that have no flag users back into ISD::AND just before isel to enable test instruction matching
2018-02-01 17:08:39 +00:00
known-bits-vector.ll
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
2018-07-17 09:45:35 +00:00
known-bits.ll
[X86] Make requested test changes from D50636
2018-08-25 14:16:03 +00:00
known-signbits-vector.ll
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
2018-05-11 18:40:08 +00:00
kshift.ll
[X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR.
2018-08-31 17:17:21 +00:00
label-annotation.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
label-redefinition.ll
Convert the uses of '|&' to use '2>&1 |' instead, which works on old
2012-07-02 18:37:59 +00:00
lack-of-signed-truncation-check.ll
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
2018-09-02 13:56:22 +00:00
lakemont.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-code-model-isel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-constants.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
large-gep-chain.ll
…
large-gep-scale.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-global.ll
EmitZerofill should take a 64-bit size or else it's chopping off large zero-filled global. rdar://11729134
2012-06-22 20:14:46 +00:00
large-pic-string.ll
[X86] Fix assertion in subreg extraction
2018-08-06 21:16:16 +00:00
late-address-taken.ll
…
late-remat-update.mir
[RegisterCoalescer] Delay live interval update work until the rematerialization
2018-08-06 17:30:45 +00:00
ldzero.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
lea32-schedule.ll
[X86][BtVer2] correctly model the latency/throughput of LEA instructions.
2018-07-19 16:42:15 +00:00
lea64-schedule.ll
[X86][BtVer2] correctly model the latency/throughput of LEA instructions.
2018-07-19 16:42:15 +00:00
lea-2.ll
Fix test case I missed in r225432.
2015-01-08 07:57:27 +00:00
lea-3.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
lea-4.ll
[x32] Fix FrameIndex check in SelectLEA64_32Addr
2014-08-20 11:59:22 +00:00
lea-5.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
lea-opt-cse1.ll
…
lea-opt-cse2.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
lea-opt-cse3.ll
…
lea-opt-cse4.ll
…
lea-opt-memop-check-1.ll
…
lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
lea-opt.ll
[X86] Adding more test patterns for lea-opt (PR37939)
2018-08-01 03:53:27 +00:00
lea-recursion.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lea.ll
[x32] Fix FrameIndex check in SelectLEA64_32Addr
2014-08-20 11:59:22 +00:00
leaf-fp-elim.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
leaFixup32.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
leaFixup64.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
legalize-fmp-oeq-vector-select.ll
…
legalize-libcalls.ll
…
legalize-shift-64.ll
…
legalize-shift.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
legalize-shl-vec.ll
…
legalize-sub-zero-2.ll
…
legalize-sub-zero.ll
…
legalize-types-remapid.ll
…
legalizedag_vec.ll
…
libcall-sret.ll
[X86] Do not generate __multi3 for mul i128 on X86
2017-10-21 02:26:00 +00:00
licm-dominance.ll
…
licm-nested.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
licm-regpressure.ll
…
licm-symbol.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
limit-split-cost.mir
[RegAlloc] Skip global splitting if the live range is huge and its spill is
2018-07-16 15:42:20 +00:00
limited-prec.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
linux-preemption.ll
Represent runtime preemption in the IR.
2017-10-26 15:00:26 +00:00
lit.local.cfg
Add a test case for r242191 ([MMX] Use the appropriate instructions for
2015-07-28 17:52:59 +00:00
live-out-reg-info.ll
…
live-range-nosubreg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
liveness-local-regalloc.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
llc-override-mcpu-mattr.ll
…
load-combine-dbg.ll
Debug Info: Fix the SDLoc propagation for a DAGCombiner rule
2017-10-10 18:08:32 +00:00
load-combine.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
load-scalar-as-vector.ll
[x86] add AVX runs to show more potential scalar->vector mov opportunities; NFC
2018-08-27 22:29:06 +00:00
load-slice.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
loadStore_vectorizer.ll
Reapply "[LSV] Refactoring + supporting bitcasts to a type of different size"
2018-07-20 20:10:04 +00:00
loc-remat.ll
…
local_stack_symbol_ordering.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
localescape.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
log2_not_readnone.ll
Revert r151816 as Jim has the appropriate fix.
2012-03-01 17:41:19 +00:00
logical-load-fold.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
long-setcc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
longlong-deadload.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
loop-blocks.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-hoist.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
loop-search.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
loop-strength-reduce2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
loop-strength-reduce4.ll
Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
2017-08-07 19:56:34 +00:00
loop-strength-reduce5.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce7.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce8.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
loop-strength-reduce-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
loop-strength-reduce-3.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
loop-strength-reduce-crash.ll
…
loop-strength-reduce.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lower-bitcast.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
lower-vec-shift-2.ll
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
2018-08-28 10:14:09 +00:00
lower-vec-shift.ll
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
2018-07-10 07:58:33 +00:00
lower-vec-shuffle-bug.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
lrshrink.ll
Add LiveRangeShrink pass to shrink live range within BB.
2017-05-31 23:25:25 +00:00
lsr-crash-empty-uses.ll
Add a CHECK line for r337072.
2018-07-13 23:48:59 +00:00
lsr-delayed-fold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-i386.ll
…
lsr-interesting-step.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-loop-exit-cond.ll
[X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)
2018-04-11 18:23:01 +00:00
lsr-negative-stride.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-nonaffine.ll
…
lsr-normalization.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
lsr-overflow.ll
When checking for signed multiplication overflow, watch out for INT_MIN and -1.
2011-05-23 21:07:39 +00:00
lsr-quadratic-expand.ll
…
lsr-redundant-addressing.ll
…
lsr-reuse-trunc.ll
…
lsr-reuse.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-sort.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lsr-static-addr.ll
[X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)
2018-04-11 18:23:01 +00:00
lsr-wrap.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lwp-intrinsics-x86_64.ll
…
lwp-intrinsics.ll
…
lwp-schedule.ll
[X86] Add LWP schedule tests
2017-12-11 16:47:21 +00:00
lzcnt-schedule.ll
…
lzcnt-tzcnt.ll
…
lzcnt-zext-cmp.ll
…
lzcnt.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
machine-combiner-int-vec.ll
[MachineCombiner] Add check for optimal pattern order.
2018-01-31 13:54:30 +00:00
machine-combiner-int.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
machine-combiner.ll
[MachineCombiner] Add check for optimal pattern order.
2018-01-31 13:54:30 +00:00
machine-copy-prop.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
machine-cp-debug.mir
[CodeGen] Ignore debug uses in MachineCopyPropagation
2018-07-11 13:30:27 +00:00
machine-cp.ll
[DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.
2018-05-21 21:41:02 +00:00
machine-cse.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
machine-outliner-debuginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
machine-outliner-disubprogram.ll
[MachineOutliner] Check the last instruction from the sequence when updating liveness
2018-07-14 09:40:01 +00:00
machine-outliner-noredzone.ll
…
machine-outliner-tailcalls.ll
[MachineOutliner][X86] Use TAILJMPd64 instead of JMP_1 for TailCall construction
2018-07-30 09:59:33 +00:00
machine-outliner.ll
[MachineOutliner][NFC] Make outlined functions have internal linkage
2018-04-03 21:36:00 +00:00
machine-region-info.mir
…
machine-sink-and-implicit-null-checks.ll
…
machine-sink.ll
Using branch probability to guide critical edge splitting.
2016-10-20 18:06:52 +00:00
machine-trace-metrics-crash.ll
…
MachineBranchProb.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
MachineSink-CritEdge.ll
X86: Stop LEA64_32r doing unspeakable things to its arguments.
2013-06-10 20:43:49 +00:00
MachineSink-DbgValue.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
MachineSink-eflags.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
machinesink-merge-debuginfo.ll
…
machinesink-null-debuginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
MachineSink-PHIUse.ll
Revert the test moves from 176733. Use "REQUIRES: asserts" instead.
2013-03-12 16:27:52 +00:00
MachineSink-SubReg.ll
Recommit 'Remove the restriction that MachineSinking is now stopped by
2016-08-12 03:33:22 +00:00
macho-comdat.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
macho-trap.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
madd.ll
[X86] Teach combineLoopMAddPattern to handle cases where there is no loop and the add has two multiply inputs
2018-08-24 18:05:04 +00:00
mangle-question-mark.ll
[IR] Avoid the need to prefix MS C++ symbols with '\01'
2018-03-16 20:13:32 +00:00
mask-negated-bool.ll
…
masked_gather_scatter_widen.ll
[X86] Support v2i32 gather/scatter indices with -x86-experimental-vector-widening-legalization
2018-08-29 02:12:49 +00:00
masked_gather_scatter.ll
[SelectionDAG] When splitting scatter nodes during DAGCombine, create a serial chain dependency.
2018-08-07 17:35:02 +00:00
masked_memop.ll
[SelectionDAG] Teach LegalizeVectorTypes to widen the mask input to a masked store.
2018-08-03 20:14:18 +00:00
masked-iv-safe.ll
…
masked-iv-unsafe.ll
…
maskmovdqu.ll
…
materialize.ll
VirtRegMap: Replace some identity copies with KILL instructions.
2016-07-09 00:19:07 +00:00
mature-mc-support.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mbp-false-cfg-break.ll
…
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
Recommit r274692 - [X86] Transform setcc + movzbl into xorl + setcc
2016-07-07 22:50:23 +00:00
mcu-abi.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mem-intrin-base-reg.ll
…
mem-promote-integers.ll
…
membarrier.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
memcmp-mergeexpand.ll
…
memcmp-minsize.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
memcmp-optsize.ll
[x86, MemCmpExpansion] allow 2 pairs of loads per block (PR33325)
2018-01-06 16:16:04 +00:00
memcmp.ll
[x86, MemCmpExpansion] allow 2 pairs of loads per block (PR33325)
2018-01-06 16:16:04 +00:00
memcpy-2.ll
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
2018-04-05 20:04:06 +00:00
memcpy-from-string.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memcpy-struct-by-value.ll
add skylake
2017-04-21 09:21:01 +00:00
memcpy.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mempcpy-32.ll
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
2017-02-03 19:11:19 +00:00
mempcpy.ll
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
2017-02-03 19:11:19 +00:00
memset64-on-x86-32.ll
…
memset-2.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-3.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-nonzero.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
memset-sse-stack-realignment.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
merge_store_duplicated_loads.ll
…
merge_store.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
merge-consecutive-loads-128.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
merge-consecutive-loads-256.ll
[X86] Remove patterns for inserting a load into a zero vector.
2018-07-11 18:09:04 +00:00
merge-consecutive-loads-512.ll
…
merge-consecutive-stores-i1.ll
…
merge-consecutive-stores.ll
…
merge-sp-update-lea.ll
…
merge-sp-updates-cfi.ll
…
merge-store-constants.ll
…
merge-store-partially-alias-loads.ll
…
MergeConsecutiveStores.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
mfence.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
mingw-alloca.ll
[X86] Enable call frame optimization ("mov to push") not only for optsize (PR26325)
2016-03-30 23:38:01 +00:00
mingw-comdats-xdata.ll
[COFF] Fix assembly output of comdat sections without an attached symbol
2018-07-23 22:15:19 +00:00
mingw-comdats.ll
[X86] Fix 32-bit mingw comdat names, only add one underscore
2018-06-21 23:06:33 +00:00
mingw-refptr.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
misaligned-memset.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
misched-aa-colored.ll
…
misched-aa-mmos.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
misched-balance.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
misched-code-difference-with-debug.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
misched-copy.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
misched-crash.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
misched-fusion.ll
…
misched-ilp.ll
[X86] Replace -mcpu with -mattr in several tests
2016-04-26 23:36:38 +00:00
misched-matmul.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
misched-matrix.ll
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
2018-04-05 20:04:06 +00:00
misched-new.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
mmx-arg-passing-x86-64.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
[X86][SSE] Remove PMULDQ/PMULUDQ by zero
2018-08-09 12:37:36 +00:00
mmx-bitcast-fold.ll
Don't fold double constant to an integer if dest type not integral
2016-04-04 23:50:46 +00:00
mmx-bitcast.ll
[X86] Stop printing moves between VR64 and GR64 with 'movd' mnemonic. Use 'movq' instead.
2018-01-05 20:55:12 +00:00
mmx-build-vector.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
mmx-coalescing.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
mmx-copy-gprs.ll
…
mmx-cvt.ll
…
mmx-fold-load.ll
[X86][MMX] Improve MMX constant generation
2018-01-16 14:21:28 +00:00
mmx-fold-zero.ll
[X86][MMX] Add support for MMX zero vector creation
2018-01-15 22:32:40 +00:00
mmx-intrinsics.ll
…
mmx-only.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mmx-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
mod128.ll
[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
2017-04-26 07:08:44 +00:00
movbe-schedule.ll
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
2018-04-06 11:00:51 +00:00
movbe.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
movdir-intrinsic-x86_64.ll
…
movdir-intrinsic-x86.ll
…
movfs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
movgs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
movmsk-cmp.ll
[X86] In combineMOVMSK, look through int->fp bitcasts before callling SimplifyDemandedBits.
2018-09-11 08:20:02 +00:00
movmsk.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
movntdq-no-avx.ll
…
movpc32-check.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
movtopush64.ll
…
movtopush.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
movtopush.mir
…
ms-inline-asm-avx512.ll
[ms-inline-asm] Use the frontend size only for ambiguous instructions
2017-05-04 18:19:52 +00:00
ms-inline-asm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
mul128_sext_loop.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul128.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
mul-constant-i16.ll
[X86] Add support expanding multiplies by constant where the constant is -3/-5/-9 multplied by a power of 2.
2018-07-27 23:04:59 +00:00
mul-constant-i32.ll
[X86] Add support expanding multiplies by constant where the constant is -3/-5/-9 multplied by a power of 2.
2018-07-27 23:04:59 +00:00
mul-constant-i64.ll
[X86] Qualify one of the heuristics in combineMul to only apply to positive multiply amounts.
2018-08-09 23:27:42 +00:00
mul-constant-result.ll
[X86] Change multiply by 26 to use two multiplies by 5 and an add instead of multiply by 3 and 9 and a subtract.
2018-07-24 23:44:12 +00:00
mul-i256.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
mul-i512.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
mul-i1024.ll
[x86] Introduce a pass to begin more systematically fixing PR36028 and similar issues.
2018-04-10 01:41:17 +00:00
mul-legalize.ll
…
mul-remat.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul-shift-reassoc.ll
…
muloti.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
mult-alt-generic-i686.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mult-alt-generic-x86_64.ll
…
mult-alt-x86.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
multiple-loop-post-inc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
multiple-return-values-cross-block.ll
…
mulvi32.ll
[X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering.
2018-04-07 19:09:52 +00:00
mulx32.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
mulx64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
musttail-fastcall.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
musttail-indirect.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
musttail-thiscall.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
musttail-varargs.ll
[x86] Update the CHECK lines of this test to use the latest patterns
2018-07-24 03:07:07 +00:00
musttail.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mwaitx-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
mwaitx.ll
Add new flag and intrinsic support for MWAITX and MONITORX instructions
2016-05-18 11:59:12 +00:00
named-reg-alloc.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
named-reg-notareg.ll
…
nancvt.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
narrow_op-1.ll
…
narrow-shl-cst.ll
…
narrow-shl-load.ll
…
neg_cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
neg_fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
neg-shl-add.ll
…
negate-add-zero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
negate-i1.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
negate-shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
negate.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
negative_zero.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
negative-offset.ll
[SelectionDAG] Fold more offsets into GlobalAddresses
2016-01-22 03:57:34 +00:00
negative-sin.ll
Go back to sometimes assuming intristics are local.
2018-03-10 02:42:14 +00:00
negative-stride-fptosi-user.ll
…
negative-subscript.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
new-remat.ll
Recommit r265547, and r265610,r265639,r265657 on top of it, plus
2016-04-13 03:08:27 +00:00
newline-and-quote.ll
…
no-and8ri8.ll
…
no-cmov.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
no-plt-libcalls.ll
…
no-plt.ll
GOTPCREL references must always use RIP.
2018-04-10 22:50:05 +00:00
no-prolog-kill.ll
X86FrameLowering: Check subregs when deciding prolog kill flags
2016-06-28 20:31:56 +00:00
no-sse2-avg.ll
…
no-stack-arg-probe.ll
Support for the mno-stack-arg-probe flag
2018-02-23 13:46:25 +00:00
nobt.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nocf_check.ll
[X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)
2018-05-18 11:58:25 +00:00
nocx16.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
non-lazy-bind.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
non-unique-sections.ll
Add testcases I missed in r229541.
2015-02-17 20:50:39 +00:00
non-value-mem-operand.mir
…
nonconst-static-ev.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nonconst-static-iv.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nontemporal-2.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
nontemporal-loads.ll
[X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector.
2018-01-27 20:19:09 +00:00
nontemporal.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
noreturn-call.ll
…
norex-subreg.ll
…
nosse-error1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nosse-error2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nosse-varargs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
nosse-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
not-and-simplify.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
note-cet-property.ll
[X86][ELF][CET] Adding the .note.gnu.property ELF section in X86
2018-06-04 21:07:35 +00:00
note-sections.ll
Mark ELF sections whose name start with .note as note
2016-09-20 20:21:13 +00:00
null-streamer.ll
Canonicalize the representation of empty an expression in DIGlobalVariableExpression
2017-08-30 18:06:51 +00:00
O0-pipeline.ll
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
2018-09-04 12:38:00 +00:00
O3-pipeline.ll
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
2018-09-04 12:38:00 +00:00
objc-gc-module-flags.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
object-size.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
oddshuffles.ll
[X86][SSE] Add shuffle combine support for OR(PSHUFB,PSHUFB) style patterns.
2018-08-14 16:00:05 +00:00
opaque-constant-asm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
opt_phis.mir
Move tests to the correct place
2018-01-19 06:08:15 +00:00
opt-ext-uses.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
opt-shuff-tstore.ll
…
optimize-max-0.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
optimize-max-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
optimize-max-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
optimize-max-3.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
or-address.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
or-branch.ll
[DAGCOmbine] Ensure that (brcond (setcc ...)) is handled in a canonical manner.
2018-02-23 11:50:42 +00:00
or-lea.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
osx-private-labels.ll
…
overflow-intrinsic-setcc-fold.ll
…
overflow.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
overlap-shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
packed_struct.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
packss.ll
[SelectionDAG] Add partial sign-bit support to ComputeNumSignBits for BITCAST nodes
2018-08-20 13:05:48 +00:00
paddus.ll
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
2018-09-08 19:32:58 +00:00
palignr.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
parity.ll
[X86] Add a DAG combine for the __builtin_parity idiom used by clang to enable better codegen
2018-08-03 18:00:29 +00:00
partial-fold32.ll
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
2016-11-23 18:33:49 +00:00
partial-fold64.ll
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
2016-11-23 18:33:49 +00:00
pass-three.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
patchable-prologue.ll
PatchableFunction: Skip pseudos that do not create code
2016-07-13 16:37:29 +00:00
patchpoint-invoke.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
patchpoint-verifiable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
patchpoint-webkit_jscc.ll
[MC] Suppress .Lcfi labels when emitting textual assembly
2017-10-10 00:57:36 +00:00
patchpoint.ll
[CodeGen] fix argument attribute in lowering statepoint/patchpoint
2018-03-01 13:31:57 +00:00
pause.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
peep-setb.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
peep-test-0.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
peep-test-4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
peephole-cvt-sse.ll
…
peephole-fold-movsd.ll
…
peephole-multiple-folds.ll
…
peephole-na-phys-copy-folding.ll
…
peephole-recurrence.mir
…
peephole.mir
MIR: Print the register class or bank in vreg defs
2017-10-24 18:04:54 +00:00
personality_size.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
personality.ll
[CodeGen] Don't emit a random reference to the personality function
2015-06-18 18:31:46 +00:00
phaddsub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
phi-bit-propagation.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
phi-immediate-factoring.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
phielim-split.ll
During PHI elimination, split critical edges that move copies out of loops.
2015-03-03 10:23:11 +00:00
phys_subreg_coalesce-2.ll
…
phys_subreg_coalesce-3.ll
…
phys_subreg_coalesce.ll
…
phys-reg-local-regalloc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pic_jumptable.ll
X86-Darwin: start emitting data-region directives for jump-tables.
2016-05-03 21:03:41 +00:00
pic-load-remat.ll
…
pic.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
pie.ll
dos2unix this test. NFC.
2016-06-16 18:21:11 +00:00
pku.ll
[X86] Regenerate PKU test to merge 32/64-bit rdpkru checks
2018-07-30 16:15:18 +00:00
pmaddubsw.ll
[X86] Add pattern matching for PMADDUBSW
2018-07-31 17:12:08 +00:00
pmovext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pmovsx-inreg.ll
…
pmul.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
pmulh.ll
[X86] Add DAG combine to turn (trunc (srl (mul ext, ext), 16) into PMULHW/PMULHUW.
2018-04-21 18:39:21 +00:00
pmulld.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pointer-vector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pop-stack-cleanup-msvc.ll
[X86] Don't clobber reserved registers with stack adjustments
2017-11-07 08:50:21 +00:00
pop-stack-cleanup.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
popcnt-schedule.ll
Fix newlines. NFCI.
2018-03-26 21:07:59 +00:00
popcnt.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
post-ra-sched-with-debug.mir
…
post-ra-sched.ll
…
postalloc-coalescing.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
postra-ignore-dbg-instrs.mir
…
postra-licm.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
pow.ll
[x86] add tests for pow --> cbrt; NFC
2018-09-06 18:42:55 +00:00
powi.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
pr1462.ll
Store a DataLayout in Module.
2014-02-25 20:01:08 +00:00
pr1489.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
pr1505.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-08 23:54:48 +00:00
pr1505b.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
pr2177.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr2182.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr2326.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr2585.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr2656.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr2659.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr2849.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr2924.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr2982.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3154.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
pr3216.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3241.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3243.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3244.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3250.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3317.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3366.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr3457.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
pr3522.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr5145.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr7882.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr9127.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr9517.ll
Add inline asm aliasing test.
2018-07-23 20:19:10 +00:00
pr9743.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr10068.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10475.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr10499.ll
Fix PR10499
2013-02-25 23:01:03 +00:00
pr10523.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10524.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10525.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr10526.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr11202.ll
Codegen: Tail-duplicate during placement.
2016-10-11 20:36:43 +00:00
pr11334.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
pr11415.ll
[X86] Add intrinsics for reading and writing to the flags register
2016-01-01 06:50:01 +00:00
pr11468.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr11985.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
pr11998.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr12360.ll
[X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.
2018-03-14 16:55:15 +00:00
pr12889.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr13209.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr13220.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr13458.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
pr13577.ll
[DAG] make binops with undef operands consistent with IR
2018-02-12 21:37:27 +00:00
pr13859.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr13899.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr14088.ll
[X86] Regenerate PR14088 test. NFCI.
2018-07-07 20:08:27 +00:00
pr14098.ll
Avoid rematerializing a redef immediately after the old def.
2012-10-16 22:51:58 +00:00
pr14161.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr14204.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr14314.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr14333.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
pr14562.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr15267.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr15296.ll
Fix PR15296
2013-03-20 02:33:21 +00:00
pr15309.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr15705.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr15981.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr16031.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr16360.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr16807.ll
Fix PR16807
2013-10-15 17:51:02 +00:00
pr17546.ll
Fix PR17546
2013-10-15 17:51:58 +00:00
pr17631.ll
[X86] Fix fptoui conversions
2015-08-25 07:42:09 +00:00
pr17764.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr18014.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr18054.ll
Fix PR18054
2013-11-26 20:31:31 +00:00
pr18162.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr18344.ll
[X86][SSE] Don't colaesce v4i32 extracts
2018-01-26 17:11:34 +00:00
pr18846.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr19049.ll
Always print the implicit .text at the start of an asm file.
2014-03-05 20:09:15 +00:00
pr20011.ll
[SelectionDAG] Fix codegen of vector stores with non byte-sized elements.
2018-01-20 16:05:10 +00:00
pr20012.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr20020.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr20088.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr21099.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr21792.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr22019.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
pr22103.ll
[x86] Remove some windows line endings that snuck into the tests here.
2015-01-11 01:36:20 +00:00
pr22338.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr22774.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr22970.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr23103.ll
Revert "Regenerate expected test results for test/CodeGen/X86/pr23103.ll . NFC"
2018-06-04 21:49:23 +00:00
pr23246.ll
[X86] Make all instructions that operate on MMX types, but were added after the initial MMX support via one of the SSE features flags make them require the MMX feature as well.
2018-06-05 06:20:06 +00:00
pr23273.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr23603.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr23664.ll
[X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
2016-05-07 01:11:17 +00:00
pr24139.ll
Fix several accidental DOS line endings in source files
2016-01-03 17:22:03 +00:00
pr24374.ll
Win64: Don't emit unwind info for "leaf" functions (PR30337)
2016-09-22 19:50:05 +00:00
pr24602.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr25828.ll
[X86] MOVPC32r should only emit CFI adjustments when needed
2015-12-15 18:50:32 +00:00
pr26350.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr26625.ll
Fix incorrect selection of AVX512 sqrt when OptForSize is on
2016-02-19 20:14:11 +00:00
pr26652.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
pr26757.ll
[WinEH] Allocate the registration node before the catch objects
2016-03-01 04:30:16 +00:00
pr26835.ll
[DAGCombine] Fix divrem combine not to assume div/rem type is simple.
2016-03-04 21:23:29 +00:00
pr26870.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
pr27071.ll
MCStreamer: Use "cfi" for CFI related temp labels.
2016-11-30 23:48:26 +00:00
pr27501.ll
[WinEH] Update SplitAnalysis::computeLastSplitPoint to cope with multiple EH successors
2016-04-25 14:31:32 +00:00
pr27591.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
pr27681.mir
…
pr28129.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr28173.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr28444.ll
Reapply r274829 with fix for FP vectors
2016-07-08 21:25:33 +00:00
pr28472.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr28489.ll
[X86] Disable FixupSetCC for CodeGenOpt::None
2016-07-11 20:40:44 +00:00
pr28504.ll
[DAGCombine] Make sext(setcc) combine respect getBooleanContents
2016-08-01 19:39:49 +00:00
pr28515.ll
[DAG] Correctly chain masked loads
2016-07-13 23:23:40 +00:00
pr28560.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr28824.ll
Make TwoAddressInstructionPass::rescheduleMIBelowKill subreg-aware
2016-08-11 17:38:33 +00:00
pr29010.ll
[NFC] fix trivial typos in comments
2018-04-13 11:37:06 +00:00
pr29022.ll
[X86] Optimization for replacing LEA with MOV at frame index elimination time
2016-09-26 06:42:07 +00:00
pr29061.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr29112.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
pr29170.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr29222.ll
[X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)
2018-03-11 19:22:13 +00:00
pr30284.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr30290.ll
[X86] Mark all byval parameters as aliased
2018-05-08 09:18:01 +00:00
pr30430.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
pr30511.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr30562.ll
Test commit.
2017-05-15 13:14:04 +00:00
pr30813.ll
Add triple to test so it does not fail on windows.
2016-10-31 11:40:14 +00:00
pr30821.mir
…
pr31045.ll
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
2018-04-05 20:04:06 +00:00
pr31088.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr31143.ll
[X86] Fix non-intrinsic roundss/roundsd to not read the destination register
2016-12-05 20:57:37 +00:00
pr31242.ll
[X86] Skip over DEBUG_VALUE while looking for start of call sequence
2016-12-07 19:31:08 +00:00
pr31271.ll
[X86] Do not assume "ri" instructions always have an immediate operand
2016-12-07 19:29:18 +00:00
pr31323.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr31593.ll
…
pr31773.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr31956.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
pr32108.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
pr32241.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr32256.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr32278.ll
Second attempt for fix Hexagon buildbot by moving test to under X86/
2017-03-15 21:13:45 +00:00
pr32282.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
pr32284.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
pr32329.ll
Revert 336426 (and follow-ups 428, 440), it very likely caused PR38084.
2018-07-06 17:37:24 +00:00
pr32340.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
pr32345.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
pr32368.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr32420.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
pr32451.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr32484.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
pr32515.ll
[DAG] Avoid deleting nodes before combining them.
2017-07-18 17:39:15 +00:00
pr32588.ll
[X86] Create the correct ADC/SBB SDNode when lowering add.
2017-04-11 19:11:20 +00:00
pr32610.ll
[ScheduleDAG] Deal with already scheduled loads in ScheduleDAG.
2017-05-31 18:43:17 +00:00
pr32659.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr32907.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr33290.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr33349.ll
[X86] Lower extract_element from k-registers by bitcasting from v16i1 to i16 and extending/truncating.
2018-02-28 22:23:55 +00:00
pr33396.ll
[SelectionDAG] Update Loop info after splitting critical edges.
2017-06-17 00:56:27 +00:00
pr33715.ll
[X86] Relax an assertion when legalizing vector types.
2017-07-09 19:22:48 +00:00
pr33747.ll
[X86] Add PR33747 test case
2018-02-11 13:12:50 +00:00
pr33772.ll
[x86] Add a missing triple, without which the CPU won't parse.
2017-07-18 08:16:32 +00:00
pr33828.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr33844.ll
[x86] shrink 'and' immediate values by setting the high bits (PR35907)
2018-01-19 16:37:25 +00:00
pr33954.ll
[X86] Improved X86::CMOV to Branch heuristic.
2017-08-08 12:17:56 +00:00
pr33960.ll
[DAG] make binops with undef operands consistent with IR
2018-02-12 21:37:27 +00:00
pr34080-2.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
pr34080.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
pr34088.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr34137.ll
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
2018-04-24 22:35:27 +00:00
pr34139.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34149.ll
[DAG] propagate FMF for all FPMathOperators
2018-05-15 14:16:24 +00:00
pr34177.ll
Remove various use of undef in the X86 test suite as patern involving undef can collapse them. NFC
2018-06-04 22:09:26 +00:00
pr34271-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34271.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34381.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34397.ll
[X86] Add RUN line for LIT test committed in "rL312438: [X86] Fix crash on assert of non-simple type after type-legalization.".
2017-09-03 10:44:18 +00:00
pr34421.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
pr34592.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
pr34605.ll
[X86] Use vmovdqu64/vmovdqa64 for unmasked integer vector stores for consistency with loads.
2018-01-18 07:44:09 +00:00
pr34629.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34634.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34653.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
pr34657.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr34855.ll
[DAGCombiner] Support folding (mulhs/u X, 0)->0 for vectors.
2017-12-11 08:33:20 +00:00
pr35272.ll
[X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector.
2018-01-27 20:19:09 +00:00
pr35316.ll
[X86] Rename function main->foo in CodeGen/X86/pr35316.ll. NFC
2018-02-13 10:58:19 +00:00
pr35399.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pr35443.ll
[X86] Rename function in recently added test case to not be 'main' returning 'void'. NFC
2017-12-07 17:02:49 +00:00
pr35636.ll
[X86] Add haswell testing for PR35635 as well.
2018-03-14 21:03:09 +00:00
pr35761.ll
[DAGCombine] Fix for PR35761
2018-01-08 13:21:24 +00:00
pr35763.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
pr35765.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pr35918.ll
[X86][SSE] Add target shuffle support to X86TargetLowering::computeKnownBitsForTargetNode
2018-06-05 10:52:29 +00:00
pr35972.ll
[X86] When legalizing (v64i1 select i8, v64i1, v64i1) make sure not to introduce bitcasts to i64 in 32-bit mode
2018-01-17 18:46:01 +00:00
pr35982.ll
[X86][MMX] Add PR35982 test cases
2018-01-17 22:19:31 +00:00
pr36199.ll
[x86] preserve test intent by removing undef
2018-05-16 17:57:35 +00:00
pr36274.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
pr36312.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
pr36553.ll
[X86] Make sure we don't combine (fneg (fma X, Y, Z)) to a target specific node when there are no FMA instructions.
2018-03-01 00:08:38 +00:00
pr36602.ll
[DAG] Avoid using deleted node in rebuildSetCC
2018-05-10 14:28:54 +00:00
pr36865.ll
[DAG, X86] Fix ISel-time node insertion ids
2018-03-22 19:32:07 +00:00
pr37063.ll
[X86] Prevent folding loads with 64-bit ANDs with immediates that fit in 32-bits.
2018-04-10 03:44:15 +00:00
pr37264.ll
Follow-up to rL332176 by adding a test case for PR37264.
2018-05-13 14:32:23 +00:00
pr37359.ll
[SelectionDAG] Don't crash on inline assembly errors when the inline assembly return type is a struct.
2018-06-20 04:32:05 +00:00
pr37499.ll
[X86] Directly legalize v16i16/v8i16 vselect to vXi8 vselect to use VPBLENDVB
2018-05-18 17:48:06 +00:00
pr37820.ll
[DAG] Fix and-mask folding when narrowing loads.
2018-06-20 15:36:29 +00:00
pr37826.ll
[DAG] Fix Memory ordering check in ReduceLoadOpStore.
2018-07-20 15:20:50 +00:00
pr37879.ll
[X86] Remove the changes to combineScalarToVector made in r335037.
2018-06-25 00:21:53 +00:00
pr37916.ll
[ScheduleDAG] Fix unfolding of SUnits to already existent nodes.
2018-07-18 18:01:03 +00:00
pr38038.ll
Add x86_64-unkown triple to llc for x86 test.
2018-07-20 03:50:55 +00:00
pr38185.ll
[DAG] Avoid Node Update assertion due to AND simplification
2018-07-20 15:27:24 +00:00
pr38533.ll
[SelectionDAG] In PromoteFloatOp_BITCAST, insert a bitcast after the fp_to_fp16 in case the result type isn't a scalar integer.
2018-08-13 06:53:49 +00:00
pr38539.ll
[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks)
2018-08-29 11:23:59 +00:00
pr38639.ll
[X86] Prevent lowerVectorShuffleByMerging128BitLanes from creating cycles
2018-08-20 21:08:35 +00:00
pr38771.ll
[X86] Weaken an overly aggressive assert.
2018-08-30 19:35:38 +00:00
pr38865-2.ll
[X86] Teach X86FastISel::X86SelectRet to use EAX for the sret pointer in GNUX32
2018-09-11 17:57:23 +00:00
pr38865.ll
[X86] Teach X86SelectionDAGInfo::EmitTargetCodeForMemcpy about GNUX32
2018-09-12 01:57:22 +00:00
PR34565.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
PR37310.mir
StackColoring: better handling of statically unreachable code
2018-05-29 13:52:24 +00:00
pre-coalesce-2.ll
…
pre-coalesce.ll
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
2017-01-28 01:05:27 +00:00
pre-coalesce.mir
…
pre-ra-sched.ll
…
prefer-avx256-lzcnt.ll
…
prefer-avx256-mask-extend.ll
…
prefer-avx256-mask-shuffle.ll
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
2018-08-15 21:21:52 +00:00
prefer-avx256-popcnt.ll
…
prefer-avx256-shift.ll
…
prefer-avx256-trunc.ll
…
prefer-avx256-wide-mul.ll
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
2018-08-27 17:20:41 +00:00
prefetch.ll
[X86] Add prefetchwt1 instruction and overhaul priorities and isel enabling for prefetch instructions.
2017-12-22 02:30:30 +00:00
prefixdata.ll
Ensure that prefix data is preserved with subsections-via-symbols
2017-03-15 04:18:16 +00:00
preserve_allcc64.ll
…
preserve_mostcc64.ll
…
private-2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
private.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
prolog-push-seq.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
prologue-epilogue-remarks.mir
…
prologuedata.ll
Prologue support
2014-12-03 02:08:38 +00:00
promote-assert-zext.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
promote-i16.ll
…
promote-trunc.ll
…
promote-vec3.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
promote.ll
[X86][SSE] Aggressively use PMADDWD for v4i32 multiplies with 17 or more leading zeros
2018-01-24 19:20:02 +00:00
ps4-noreturn.ll
…
pseudo_cmov_lower1.ll
…
pseudo_cmov_lower2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
pseudo_cmov_lower.ll
[X86] Improve EmitLoweredSelect for contiguous CMOV pseudo instructions.
2015-08-06 08:45:34 +00:00
pshufb-mask-comments.ll
…
pshufd-combine-crash.ll
…
psubus.ll
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
2018-09-08 19:32:58 +00:00
ptest.ll
[X86] Add avx512 command line to ptest.ll to demonstrate that 512-bit vectors are not handled by LowerVectorAllZeroTest.
2018-02-02 20:12:45 +00:00
ptr-rotate.ll
…
ptrtoint-constexpr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
ptwrite32-intrinsic.ll
…
ptwrite64-intrinsic.ll
…
push-cfi-debug.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
push-cfi-obj.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
push-cfi.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
ragreedy-bug.ll
Codegen: Tail-duplicate during placement.
2016-10-11 20:36:43 +00:00
ragreedy-hoist-spill.ll
…
ragreedy-last-chance-recoloring.ll
…
rd-mod-wr-eflags.ll
…
rdpid-schedule.ll
[X86] Split up -march=icelake to -client & -server
2018-04-10 18:59:13 +00:00
rdpid.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
rdpmc.ll
[X86] Regenerate RDPMC intrinsic test
2018-01-19 12:05:58 +00:00
rdrand-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
rdrand-x86_64.ll
…
rdrand.ll
[LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (PR35681)
2018-02-05 23:43:05 +00:00
rdseed-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
rdseed-x86_64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rdseed.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rdtsc-upgrade.ll
[X86] Modify the the rdtscp intrinsic to return values instead of taking a pointer argument
2018-09-07 19:14:15 +00:00
rdtsc.ll
[X86] Modify the the rdtscp intrinsic to return values instead of taking a pointer argument
2018-09-07 19:14:15 +00:00
read-fp-no-frame-pointer.ll
Allow {e,r}bp as the target of {read,write}_register.
2015-07-09 17:40:29 +00:00
recip-fastmath2.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
recip-fastmath.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
recip-pic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
red-zone2.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
red-zone.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
reduce-trunc-shl.ll
…
regalloc-advanced-split-cost.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
regalloc-reconcile-broken-hints.ll
[LSR] Narrow search space by filtering non-optimal formulae with the same ScaledReg and Scale.
2017-07-06 15:52:14 +00:00
regalloc-spill-at-ehpad.ll
…
regcall-no-plt.ll
…
reghinting.ll
Instruction scheduling itinerary for Intel Atom.
2012-02-01 23:20:51 +00:00
regparm.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
regpressure.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rem_crash.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rem.ll
[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)
2018-07-28 00:27:25 +00:00
remat-constant.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
remat-fold-load.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
remat-mov-0.ll
…
remat-phys-dead.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
remat-scalar-zero.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
replace_unsupported_masked_mem_intrin.ll
…
replace-load-and-with-bzhi.ll
…
required-vector-width.ll
[X86] Remove the max vector width restriction from combineLoopMAddPattern and rely splitOpsAndApply to handle splitting.
2018-07-22 19:44:35 +00:00
ret-addr.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ret-i64-0.ll
…
ret-mmx.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
retpoline-external.ll
[x86/retpoline] Split the LLVM concept of retpolines into separate
2018-08-23 06:06:38 +00:00
retpoline-regparm.ll
[x86/retpoline] Split the LLVM concept of retpolines into separate
2018-08-23 06:06:38 +00:00
retpoline.ll
[x86/retpoline] Split the LLVM concept of retpolines into separate
2018-08-23 06:06:38 +00:00
return_zeroext_i2.ll
…
return-ext.ll
…
returned-trunc-tail-calls.ll
…
reverse_branches.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
rip-rel-address.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
rip-rel-lea.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
rodata-relocs.ll
Stop producing .data.rel sections.
2015-11-18 06:02:15 +00:00
rot16.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rot32.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rot64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rotate2.ll
[X86] Regenerate rotate tests
2018-06-07 10:13:09 +00:00
rotate4.ll
[X86] Regenerate rotate tests
2018-06-07 10:13:09 +00:00
rotate_vec.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rotate-extract-vector.ll
[DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed
2018-07-30 16:50:00 +00:00
rotate-extract.ll
[DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed
2018-07-30 16:50:00 +00:00
rotate.ll
[X86] Regenerate rotate tests
2018-06-07 10:13:09 +00:00
rounding-ops.ll
[X86] Add isel patterns for folding loads when creating ROUND instructions from ffloor/fnearbyint/fceil/frint/ftrunc.
2018-06-12 00:48:57 +00:00
rrlist-livereg-corrutpion.ll
…
rtm-schedule.ll
[X86] Split up -march=icelake to -client & -server
2018-04-10 18:59:13 +00:00
rtm.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
sad_variations.ll
[X86][AVX] Add AVX1 PSAD tests
2018-02-26 15:55:25 +00:00
sad.ll
[X86] Teach combineLoopSADPattern to handle cases where there is no loop and the add has two absolute difference inputs
2018-08-22 23:19:01 +00:00
saddo-redundant-add.ll
…
safestack_inline.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
safestack_ssp.ll
…
safestack.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
sandybridge-loads.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sar_fold64.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
sar_fold.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sat-add.ll
[x86] test codegen for unsigned saturated add; NFC
2018-09-10 17:40:15 +00:00
sbb.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
scalar_sse_minmax.ll
…
scalar_widen_div.ll
[X86] Type legalize v2i32 div/rem by scalarizing rather than promoting
2018-09-13 06:13:37 +00:00
scalar-extract.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
scalar-fp-to-i64.ll
…
scalar-int-to-fp.ll
…
scalar-min-max-fill-operand.ll
…
scalarize-bitcast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
scatter-schedule.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
scavenger.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
scev-interchange.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
schedule-x86_32.ll
…
schedule-x86_64.ll
[X86] Improved sched model for X86 CMPXCHG* instructions.
2018-08-30 06:26:00 +00:00
schedule-x86-64-shld.ll
[X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware
2018-08-22 19:39:09 +00:00
scheduler-backtracking.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sdiv-exact.ll
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV
2018-08-15 09:35:12 +00:00
sdiv-pow2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
segmented-stacks-dynamic.ll
[x32] Fix segmented stacks support
2014-09-22 13:11:35 +00:00
segmented-stacks.ll
[X86,ARM] Retain split-stack prolog check for sibling calls
2018-06-26 14:11:30 +00:00
seh-catch-all-win32.ll
…
seh-catch-all.ll
[WinEH] Make llvm.x86.seh.recoverfp work on x64
2015-12-15 23:40:58 +00:00
seh-catchpad.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
seh-except-finally.ll
[WinEH] Make llvm.x86.seh.recoverfp work on x64
2015-12-15 23:40:58 +00:00
seh-exception-code.ll
[IR] Reformulate LLVM's EH funclet IR
2015-12-12 05:38:55 +00:00
seh-filter-no-personality.ll
…
seh-finally.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
seh-no-invokes.ll
…
seh-safe-div-win32.ll
…
seh-safe-div.ll
Do not select EhPad BB in MachineBlockPlacement when there is regular BB to schedule
2016-04-07 21:29:39 +00:00
seh-stack-realign.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
select_const.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
select_meta.ll
Fix some broken CHECK lines.
2017-01-22 20:28:56 +00:00
select-1-or-neg1.ll
…
select-mmx.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
select-with-and-or.ll
…
select.ll
[X86] Update test command line to not use 64-bit mode on a 32-bit only athlon cpu.
2018-08-30 06:01:03 +00:00
selectcc-to-shiftand.ll
[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
2018-07-15 16:27:07 +00:00
selectiondag-crash.ll
[DAG] Fix wrong canonicalization performed on shuffle nodes.
2015-01-24 11:54:29 +00:00
selectiondag-cse.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
selectiondag-debug-loc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
selectiondag-dominator.ll
[x86] Stop this test from dirtying the source tree when run.
2017-06-06 03:24:22 +00:00
selectiondag-order.ll
[DAG] Don't increase SDNodeOrder for dbg.value/declare.
2017-01-19 13:55:55 +00:00
setcc-combine.ll
[DAGCombine] Don't combine (and (setne X, 0), (setne X, -1)) --> (setuge (add X, 1), 2) for i1
2017-12-26 14:48:28 +00:00
setcc-logic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
setcc-lowering.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
setcc-narrowing.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
setcc-wide-types.ll
…
setcc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
setjmp-spills.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
setoeq.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
setuge.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sext-i1.ll
[DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors.
2018-03-01 22:32:25 +00:00
sext-load.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sext-ret-val.ll
Add more triples after r261235
2016-02-18 18:44:33 +00:00
sext-setcc-self.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sext-subreg.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sext-trunc.ll
Add more triples after r261235
2016-02-18 18:44:33 +00:00
sha-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
sha.ll
[X86] When post-processing the DAG to remove zero extending moves for YMM/ZMM, make sure the producing instruction is VEX/XOP/EVEX encoded.
2018-08-03 04:49:42 +00:00
shadow-call-stack.mir
ShadowCallStack/x86_64: Ignore pseudo-machine instructions
2018-04-10 01:31:01 +00:00
shadow-stack.ll
SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
2018-06-28 17:00:45 +00:00
shift-and.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-avx2-crash.ll
[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
2015-09-11 03:22:04 +00:00
shift-bmi2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-coalesce.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-codegen.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-combine-crash.ll
[DAG] Fix an assertion failure caused by an invalid cast in method 'BuildVectorSDNode::isConstantSplat'
2014-03-22 01:47:22 +00:00
shift-combine.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
shift-double-x86_64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-double.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
shift-folding.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-i128.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-i256.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-one.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-pair.ll
[X86] Teach X86DAGToDAGISel::shrinkAndImmediate to preserve upper 32 zeroes of a 64 bit mask.
2018-02-05 16:54:07 +00:00
shift-parts.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shift-pcmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shl_elim.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shl_undef.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
shl-anyext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shl-crash-on-legalize.ll
…
shl-i64.ll
…
shrink_vmul_sse.ll
…
shrink_vmul.ll
[X86][SSE] Remove PMULDQ/PMULUDQ by zero
2018-08-09 12:37:36 +00:00
shrink_wrap_dbg_value.mir
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
shrink-compare.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
shrink-fp-const1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shrink-fp-const2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
shrink-wrap-chkstk-x86_64.ll
…
shrink-wrap-chkstk.ll
…
shrink-wrapping-vla.ll
…
shrinkwrap-hang.ll
[ShrinkWrap] Fix FindIDom to only have one kind of failure.
2016-01-06 18:40:11 +00:00
shuffle-combine-crash-2.ll
…
shuffle-combine-crash.ll
…
shuffle-of-insert.ll
…
shuffle-of-splat-multiuses.ll
…
shuffle-strided-with-offset-128.ll
…
shuffle-strided-with-offset-256.ll
…
shuffle-strided-with-offset-512.ll
…
shuffle-vs-trunc-128.ll
…
shuffle-vs-trunc-256.ll
…
shuffle-vs-trunc-512.ll
…
sibcall-2.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
sibcall-3.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
sibcall-4.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
sibcall-5.ll
Update tests to use at least darwin9.
2016-06-29 14:51:10 +00:00
sibcall-6.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
sibcall-byval.ll
Update tests to use at least darwin9.
2016-06-29 14:51:10 +00:00
sibcall-win64.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
sibcall.ll
[X86] Adding the test pointing to the fail case of D45653
2018-08-27 11:56:32 +00:00
signbit-shift.ll
[DAGCombiner] transform sub-of-shifted-signbit to add
2018-07-30 22:21:37 +00:00
signed-truncation-check.ll
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
2018-09-02 13:56:22 +00:00
simple-register-allocation-read-undef.mir
…
simple-zext.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
sincos-opt.ll
[X86] Don't use fsin/fcos/fsincos instructions ever
2017-08-11 20:55:29 +00:00
sincos.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sink-blockfreq.ll
…
sink-cheap-instructions.ll
…
sink-gep-before-mem-inst.ll
…
sink-hoist.ll
…
sink-local-value.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
sink-out-of-loop.ll
…
sitofp.ll
[X86] Fix missing cfi from sitofp checks
2018-04-24 13:24:56 +00:00
sjlj-baseptr.ll
[X86] Restore X86 base pointer after call to llvm.eh.sjlj.setjmp
2014-12-04 00:56:38 +00:00
sjlj-eh.ll
…
sjlj-shadow-stack-liveness.mir
[X86] Fix liveness information when expanding X86::EH_SjLj_LongJmp64
2018-08-17 14:46:56 +00:00
sjlj.ll
…
slow-incdec.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
slow-pmulld.ll
[X86] Revert the SLM part of r328914.
2018-04-09 17:07:40 +00:00
slow-unaligned-mem.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
small-byval-memcpy.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
smul-with-overflow.ll
…
soft-fp-legal-in-HW-reg.ll
…
soft-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
soft-sitofp.ll
Do not try to use i8 and i16 versions of FP_TO_U/SINT soft float library calls
2015-12-15 12:55:50 +00:00
speculative-load-hardening-call-and-ret.ll
[x86/SLH] Teach SLH to harden against the "ret2spec" attack by
2018-09-04 10:59:10 +00:00
speculative-load-hardening-gather.ll
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
2018-09-04 12:38:00 +00:00
speculative-load-hardening-indirect.ll
[x86/SLH] Teach SLH to harden against the "ret2spec" attack by
2018-09-04 10:59:10 +00:00
speculative-load-hardening.ll
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
2018-09-04 12:38:00 +00:00
splat-const.ll
…
splat-for-size.ll
…
split-eh-lpad-edges.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
split-extend-vector-inreg.ll
[SelectionDAG] Add initial implementation of TargetLowering::SimplifyDemandedVectorElts
2018-02-15 12:14:15 +00:00
split-store.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
split-vector-bitcast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
split-vector-rem.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sqrt-fastmath-mir.ll
propagate fast math flags via IR on fma and sub expressions
2018-06-07 22:49:09 +00:00
sqrt-fastmath-tune.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sqrt-fastmath.ll
[X86] Enable reciprocal estimates for v16f32 vectors by using VRCP14PS/VRSQRT14PS
2018-05-06 17:48:21 +00:00
sqrt-partial.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sqrt.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
sret-implicit.ll
Re-land r237175: [X86] Always return the sret parameter in eax/rax ...
2015-05-18 23:35:09 +00:00
sse1.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
sse2-intrinsics-canonical.ll
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
2018-09-08 19:32:58 +00:00
sse2-intrinsics-fast-isel-x86_64.ll
…
sse2-intrinsics-fast-isel.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
sse2-intrinsics-x86_64-upgrade.ll
…
sse2-intrinsics-x86_64.ll
…
sse2-intrinsics-x86-upgrade.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
sse2-intrinsics-x86.ll
[X86] Lowering addus/subus intrinsics to native IR
2018-08-14 08:00:56 +00:00
sse2-schedule.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
sse2-vector-shifts.ll
…
sse2.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
sse3-avx-addsub-2.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
sse3-avx-addsub.ll
…
sse3-intrinsics-fast-isel.ll
…
sse3-intrinsics-x86.ll
…
sse3-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
sse3.ll
[SelectionDAG] Enable SimplifyDemandedVectorElts support for simplifying shuffle masks
2018-02-16 16:22:14 +00:00
sse4a-intrinsics-fast-isel.ll
…
sse4a-schedule.ll
[X86] Split WriteVecALU/WritePHAdd into XMM and YMM/ZMM scheduler classes
2018-05-03 13:27:10 +00:00
sse4a-upgrade.ll
…
sse4a.ll
[X86][SSE] Cleanup SSE4A/SSE41/SSE42 intrinsics tests
2018-06-02 17:33:26 +00:00
sse41-intrinsics-fast-isel.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
sse41-intrinsics-x86-upgrade.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
sse41-intrinsics-x86.ll
…
sse41-pmovxrm.ll
…
sse41-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
sse41.ll
[x86] try harder to use broadcast to load a scalar into vector reg
2018-08-25 14:56:05 +00:00
sse42-intrinsics-fast-isel-x86_64.ll
…
sse42-intrinsics-fast-isel.ll
…
sse42-intrinsics-x86_64.ll
…
sse42-intrinsics-x86.ll
…
sse42-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
sse_partial_update.ll
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
2018-08-02 16:48:01 +00:00
sse_reload_fold.ll
Convert the uses of '|&' to use '2>&1 |' instead, which works on old
2012-07-02 18:37:59 +00:00
sse-align-0.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
sse-align-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-3.ll
…
sse-align-4.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-5.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-6.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-7.ll
…
sse-align-8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-9.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-10.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-11.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-align-12.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse-commute.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
sse-cvttp2si.ll
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
2018-06-27 18:16:40 +00:00
sse-domains.ll
…
sse-fcopysign.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
sse-fsignum.ll
…
sse-intel-ocl.ll
[X86] Optimization for replacing LEA with MOV at frame index elimination time
2016-09-26 06:42:07 +00:00
sse-intrinsics-fast-isel-x86_64.ll
…
sse-intrinsics-fast-isel.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
sse-intrinsics-x86_64-upgrade.ll
…
sse-intrinsics-x86_64.ll
…
sse-intrinsics-x86-upgrade.ll
[X86] Add AVX512 equivalents of some isel patterns so we get EVEX instructions.
2018-07-12 22:14:10 +00:00
sse-intrinsics-x86.ll
…
sse-load-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sse-minmax.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse-only.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
sse-regcall.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
sse-scalar-fp-arith-unary.ll
…
sse-scalar-fp-arith.ll
[X86][SSE] Canonicalize scalar fp arithmetic shuffle patterns
2018-07-18 19:55:19 +00:00
sse-schedule.ll
[X86] Fix NOOP sched overrides on BDW/HSW/SKL.
2018-06-18 06:48:22 +00:00
sse-unaligned-mem-feature.ll
…
sse-varargs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ssp-data-layout.ll
Implemented stack symbol table ordering/packing optimization to improve data locality and code size from SP/FP offset encoding.
2016-02-15 23:44:13 +00:00
ssp-guard-spill.ll
…
ssse3-intrinsics-fast-isel.ll
…
ssse3-intrinsics-x86.ll
…
ssse3-schedule.ll
[X86] Fix skylake server scheduling info.
2018-06-11 14:37:53 +00:00
stack_guard_remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-align2.ll
[X86] Extend some Linux special cases to cover kFreeBSD.
2016-05-05 11:35:51 +00:00
stack-align-memcpy.ll
Use function attribute "stackrealign" to decide whether stack
2015-09-11 18:54:38 +00:00
stack-align.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stack-folding-3dnow.ll
[X86][3DNow] Added 3DNow! memory folding patterns + tests
2015-04-03 11:50:30 +00:00
stack-folding-adx-x86_64.ll
[X86] Remove isel patterns for ADCX instruction
2018-09-12 15:47:34 +00:00
stack-folding-adx.mir
[X86] Add stack folding MIR test for ADCX/ADOX.
2018-09-08 05:08:18 +00:00
stack-folding-bmi2.ll
[X86][BMI] Add BMI2 stack folding tests
2017-02-17 18:00:43 +00:00
stack-folding-bmi.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
stack-folding-fp-avx1.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-fp-avx512.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
stack-folding-fp-avx512vl.ll
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
2018-06-27 15:57:53 +00:00
stack-folding-fp-sse42.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-int-avx1.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-int-avx2.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-int-avx512.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-int-avx512vl.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-int-sse42.ll
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
2018-06-21 06:17:16 +00:00
stack-folding-lwp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
stack-folding-mmx.ll
[X86][MMX] Added missing stack folding tests for MMX/SSSE3 instructions
2015-09-06 17:50:15 +00:00
stack-folding-sha.ll
[X86][SHA] Add SHA stack folding tests
2017-02-17 19:24:55 +00:00
stack-folding-tbm.ll
[X86][TBM] Use realistic BEXTR control bits
2018-06-03 18:15:06 +00:00
stack-folding-x86_64.ll
[X86] Stack folding tests - just use mtriple - no need for mcpu in these tests
2015-10-25 11:42:46 +00:00
stack-folding-xop.ll
[X86][XOP] Support for VPERMIL2PD/VPERMIL2PS 2-input shuffle instructions
2016-06-03 08:06:03 +00:00
stack-probe-red-zone.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
stack-probe-size.ll
Support for emitting inline stack probes
2015-11-10 01:50:49 +00:00
stack-probes.ll
[X86] Add support for "probe-stack" attribute
2017-06-22 15:42:53 +00:00
stack-protector-dbginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
stack-protector-msvc.ll
Re-commit r319490 "XOR the frame pointer with the stack cookie when protecting the stack"
2017-12-05 20:22:20 +00:00
stack-protector-remarks.ll
[SSP] In opt remarks, stream Function directly
2017-03-09 06:10:27 +00:00
stack-protector-target.ll
Disable TLS for stack protector on Android API<17.
2017-02-23 21:06:35 +00:00
stack-protector-vreg-to-vreg-copy.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
stack-protector-weight.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
stack-protector.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
stack-size-section-function-sections.ll
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
2018-06-22 10:53:47 +00:00
stack-size-section.ll
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
2018-06-22 10:53:47 +00:00
stack-update-frame-opcode.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
StackColoring-dbg.ll
…
StackColoring.ll
…
stackguard-internal.ll
Also fix a typo. Need more coffee today.
2016-06-09 17:06:01 +00:00
stackmap-fast-isel.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
stackmap-frame-setup.ll
Add extra operand to CALLSEQ_START to keep frame part set up previously
2017-05-09 13:35:13 +00:00
stackmap-large-constants.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackmap-large-location-size.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackmap-liveness.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
stackmap-nops.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
stackmap-shadow-optimization.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
stackmap.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackpointer.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
statepoint-allocas.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
statepoint-call-lowering.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
statepoint-far-call.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-forward.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-gctransition-call-lowering.ll
…
statepoint-invoke.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
statepoint-live-in.ll
Revert change 335077 "[InlineSpiller] Fix a crash due to lack of forward progress from remat specifically for STATEPOINT"
2018-06-25 12:58:13 +00:00
statepoint-stack-usage.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
statepoint-stackmap-format.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-uniqueing.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-vector-bad-spill.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-vector.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
stdarg.ll
[X86][DAG] Switch X86 Target to post-legalized store merge
2017-08-11 13:21:35 +00:00
stdcall-notailcall.ll
[x86] Disambiguate RET[QL] and fix aliases for 16-bit mode
2014-01-08 12:58:07 +00:00
stdcall.ll
[x86] Disambiguate RET[QL] and fix aliases for 16-bit mode
2014-01-08 12:58:07 +00:00
store_op_load_fold2.ll
[DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
2018-03-19 20:19:46 +00:00
store_op_load_fold.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
store-empty-member.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
store-fp-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
store-global-address.ll
…
store-narrow.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
store-zero-and-minus-one.ll
[X86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
2018-08-06 18:44:26 +00:00
stores-merging.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
storetrunc-fp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
stride-nine-with-base-reg.ll
…
stride-reuse.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sttni.ll
[X86][SSE] Remove unnecessary -cpu from sttni tests
2018-05-30 14:11:57 +00:00
sub-with-overflow.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
sub.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subcarry.ll
[DAGcombine] Teach the combiner about -a = ~a + 1
2018-06-04 19:23:22 +00:00
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-6.ll
…
subvector-broadcast.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
sunkaddr-ext.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
swift-error.ll
X86: remove R12 from CSR on Windows x64 SwiftCC
2017-09-25 22:00:17 +00:00
swift-return.ll
…
swiftcc.ll
X86: treat SwiftCC as Win64_CC on Win64
2017-09-20 21:00:40 +00:00
swifterror.ll
ISel: Fix FastISel of swifterror values
2017-06-15 17:34:42 +00:00
swiftself.ll
X86: Use a callee save register for the swiftself parameter.
2016-04-13 21:43:21 +00:00
switch-bt.ll
[CodeGen] Peel off the dominant case in switch statement in lowering
2017-11-14 21:44:09 +00:00
switch-crit-edge-constant.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch-default-only.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch-density.ll
[Codegen] Decrease minimum jump table density.
2016-03-29 00:23:41 +00:00
switch-edge-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
switch-jump-table.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
switch-lower-peel-top-case.ll
…
switch-or.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch-order-weight.ll
Distribute the weight on the edge from switch to default statement to edges generated in lowering switch.
2015-09-01 01:42:16 +00:00
switch-zextload.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
SwitchLowering.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
swizzle-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
swizzle-avx2.ll
…
SwizzleShuff.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
system-intrinsics-64-xsave.ll
…
system-intrinsics-64-xsavec.ll
…
system-intrinsics-64-xsaveopt.ll
…
system-intrinsics-64-xsaves.ll
…
system-intrinsics-64.ll
…
system-intrinsics-xgetbv.ll
…
system-intrinsics-xsave.ll
…
system-intrinsics-xsavec.ll
…
system-intrinsics-xsaveopt.ll
…
system-intrinsics-xsaves.ll
…
system-intrinsics-xsetbv.ll
…
system-intrinsics.ll
[X86] Add fxsr feature flag for fxsave/fxrestore instructions.
2015-10-16 06:03:09 +00:00
tail-call-attrs.ll
[X86] Don't zero/sign-extend i1, i8, or i16 return values to 32 bits (PR22532)
2016-02-08 19:34:30 +00:00
tail-call-casts.ll
[X86] Enable forwarding bool arguments in tail calls (PR26305)
2016-03-03 02:06:32 +00:00
tail-call-conditional.mir
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
tail-call-got.ll
Disable x86 tail call optimizations that jump through GOT
2015-05-28 20:44:28 +00:00
tail-call-legality.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tail-call-mutable-memarg.ll
[X86] Fix latent bug in sibcall eligibility logic
2017-07-28 00:58:35 +00:00
tail-call-parameter-attrs-mismatch.ll
…
tail-call-win64.ll
Win64: Don't use REX prefix for direct tail calls
2016-09-08 23:35:10 +00:00
tail-dup-addr.ll
…
tail-dup-catchret.ll
…
tail-dup-debugloc.ll
…
tail-dup-merge-loop-headers.ll
…
tail-dup-no-other-successor.ll
…
tail-dup-repeat.ll
…
tail-merge-after-mbp.mir
…
tail-merge-debugloc.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
tail-merge-identical.ll
…
tail-merge-unreachable.ll
…
tail-merge-wineh.ll
…
tail-opts.ll
[X86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
2018-08-06 18:44:26 +00:00
tail-threshold.ll
…
tailcall-64.ll
[x86] Clean up and convert test to use generated CHECK lines.
2018-07-24 03:18:08 +00:00
tailcall-calleesave.ll
…
tailcall-cgp-dup.ll
…
tailcall-disable.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
tailcall-fastisel.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
tailcall-largecode.ll
Enable MI Sched for x86.
2013-10-15 23:33:07 +00:00
tailcall-mem-intrinsics.ll
…
tailcall-msvc-conventions.ll
X86ISelLowering: Support tail calls to/from callee pop functions
2015-10-24 16:47:10 +00:00
tailcall-multiret.ll
Do not insert a tail call when returning multiple values on X86
2014-08-20 19:00:37 +00:00
tailcall-readnone.ll
Test case for r246304.
2015-08-28 17:19:54 +00:00
tailcall-returndup-void.ll
…
tailcall-ri64.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
tailcall-stackalign.ll
[X86] Enable call frame optimization ("mov to push") not only for optsize (PR26325)
2016-03-30 23:38:01 +00:00
tailcall-structret.ll
Reapply "s/grep/FileCheck/ in some tests"
2013-02-14 03:45:08 +00:00
tailcall.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcallbyval64.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
tailcallbyval.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
tailcallfp2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcallfp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tailcallpic1.ll
Disable x86 tail call optimizations that jump through GOT
2015-05-28 20:44:28 +00:00
tailcallpic2.ll
Revert r195318 as it causes miscompilation (PR18029)
2013-11-22 10:30:39 +00:00
tailcallpic3.ll
Disable x86 tail call optimizations that jump through GOT
2015-05-28 20:44:28 +00:00
tailcallstack64.ll
ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not non-aliasing distinct objects
2015-05-08 23:52:00 +00:00
taildup-crash.ll
…
tailjmp_gotpcrel_relax_relocation.ll
…
targetLoweringGeneric.ll
…
tbm_patterns.ll
[DAGCombiner] Add one use check to fold (not (and x, y)) -> (or (not x), (not y))
2018-02-13 16:25:27 +00:00
tbm-intrinsics-fast-isel-x86_64.ll
…
tbm-intrinsics-fast-isel.ll
…
tbm-intrinsics-x86_64.ll
…
tbm-intrinsics.ll
…
tbm-schedule.ll
[X86] Don't hardcode scheduler class
2018-05-27 14:54:18 +00:00
test-nofold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
test-shrink-bug.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
test-shrink.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
test-vs-bittest.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
testb-je-fusion.ll
…
testl-commute.ll
[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem
2017-10-01 23:53:53 +00:00
this-return-64.ll
…
throws-cfi-fp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
throws-cfi-no-fp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
tls-addr-non-leaf-function.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
tls-android-negative.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
tls-android.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
tls-local-dynamic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tls-models.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tls-pic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tls-pie.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
tls-shrink-wrapping.ll
…
tls-windows-itanium.ll
X86: enable TLS on Windows itanium
2016-06-04 18:27:22 +00:00
tls.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
tlv-1.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
tlv-2.ll
Use pushq / popq instead of subq $8, %rsp / addq $8, %rsp to adjust stack in
2011-01-03 22:53:22 +00:00
tlv-3.ll
Testcase for PR17964
2013-11-17 10:53:19 +00:00
token_landingpad.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
trap.ll
Use a different encoding for debugtrap on PS4.
2015-01-26 19:09:27 +00:00
trunc-ext-ld-st.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
trunc-store.ll
[SelectionDAG] Fix codegen of vector stores with non byte-sized elements.
2018-01-20 16:05:10 +00:00
trunc-subvector.ll
[X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)
2018-07-19 21:52:06 +00:00
trunc-to-bool.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
TruncAssertSext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
TruncAssertZext.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
twoaddr-coalesce-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-coalesce-3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-coalesce.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-lea.ll
X86InstrInfo: Update liveness in classifyLea()
2016-08-09 01:47:26 +00:00
twoaddr-pass-sink.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
twoaddr-sink-terminator.ll
…
uint64-to-float.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
uint_to_fp-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
uint_to_fp-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
uint_to_fp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
umul-with-carry.ll
…
umul-with-overflow.ll
…
umulo-64-legalisation-lowering.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
umulo-128-legalisation-lowering.ll
[SelectionDAG] Improve the legalisation lowering of UMULO.
2018-08-16 18:39:39 +00:00
unaligned-32-byte-memops.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
unaligned-load.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
unaligned-spill-folding.ll
[X86] Add more opcodes to isFrameLoadOpcode/isFrameStoreOpcode. Mainly AVX-512 related.
2016-07-18 06:14:39 +00:00
undef-globals-bss.ll
…
undef-label.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
undef-ops.ll
[DAG] fix type of undef returned by getNode()
2018-02-13 14:55:07 +00:00
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
…
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
…
unknown-location.ll
[DWARF] Preserve column number when emitting 'line 0' record
2016-12-14 00:27:35 +00:00
unreachable-loop-sinking.ll
…
unreachable-mbb-undef-phi.mir
…
unreachable-trap.ll
…
unreachableblockelim.ll
…
unused_stackslots.ll
…
unwind-init.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
unwindraise.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
update-terminator-debugloc.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
update-terminator.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
urem-i8-constant.ll
…
urem-power-of-two.ll
…
urem-seteq-optsize.ll
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
2018-09-11 15:34:26 +00:00
urem-seteq-vec-nonsplat.ll
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
2018-09-11 15:34:26 +00:00
urem-seteq-vec-splat.ll
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
2018-09-11 15:34:26 +00:00
urem-seteq.ll
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
2018-09-11 15:34:26 +00:00
use-add-flags.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
utf8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
utf16-cfstrings.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
uwtables.ll
[X86] Remove powerpc cpu name and features from uwtables.ll
2018-08-30 06:01:01 +00:00
v2f32.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
v4f32-immediate.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
v4i32load-crash.ll
…
v8i1-masks.ll
…
vaargs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vaes-intrinsics-avx512-x86.ll
…
vaes-intrinsics-avx512vl-x86.ll
…
vaes-intrinsics-avx-x86.ll
…
var-permute-128.ll
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
2018-08-02 16:48:01 +00:00
var-permute-256.ll
…
var-permute-512.ll
…
vararg_no_start.ll
ARM / x86_64 varargs: Don't save regparms in prologue without va_start
2014-08-22 21:59:26 +00:00
vararg_tailcall.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
vararg-callee-cleanup.ll
…
variable-sized-darwin-bzero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
variadic-node-pic.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
vastart-defs-eflags.ll
…
vbinop-simplify-bug.ll
Update test/CodeGen/X86/vbinop-simplify-bug.ll.
2014-01-15 20:16:14 +00:00
vec3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_add.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_align_i256.ll
Add a triple to the test.
2013-03-15 00:10:23 +00:00
vec_align.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vec_anyext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_call.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_cast2.ll
[X86][SSE] Replace -cpu with equivalent -mattr for vec_cast tests
2018-05-30 14:01:21 +00:00
vec_cast3.ll
[X86][SSE] Replace -cpu with equivalent -mattr for vec_cast tests
2018-05-30 14:01:21 +00:00
vec_cast.ll
[X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for v1iX vectors.
2018-09-07 20:56:03 +00:00
vec_cmp_sint-128.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_cmp_uint-128.ll
[X86] Use min/max for vector ult/ugt compares if avoids a sign flip.
2018-02-11 17:11:40 +00:00
vec_compare-sse4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_compare.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_ctbits.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_ext_inreg.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_extract-avx.ll
[X86] Use 128-bit ops for 256-bit vzmovl patterns.
2018-07-15 18:51:07 +00:00
vec_extract-mmx.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_extract-sse4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_extract.ll
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
2018-08-02 16:48:01 +00:00
vec_fabs.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vec_floor.ll
[X86] Don't fold unaligned loads into SSE ROUNDPS/ROUNDPD for ceil/floor/nearbyint/rint/trunc.
2018-06-19 17:51:42 +00:00
vec_fneg.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_fp_to_int.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vec_fpext.ll
[X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)
2018-07-19 21:52:06 +00:00
vec_fptrunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_i64.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_ins_extract-1.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_ins_extract.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_insert-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_insert-3.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
vec_insert-4.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-5.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-7.ll
[TargetLowering] Add vector BITCAST support to SimplifyDemandedVectorElts
2018-03-06 22:32:01 +00:00
vec_insert-8.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-9.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_insert-mmx.ll
[X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)
2018-03-11 19:22:13 +00:00
vec_int_to_fp.ll
[X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)
2018-07-19 21:52:06 +00:00
vec_loadsingles.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_logical.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_minmax_match.ll
[X86] Use min/max for vector ult/ugt compares if avoids a sign flip.
2018-02-11 17:11:40 +00:00
vec_minmax_sint.ll
[X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for all legal types
2018-02-11 10:52:37 +00:00
vec_minmax_uint.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
vec_partial.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_reassociate.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_return.ll
…
vec_round.ll
Fix broken CHECK lines.
2014-01-11 21:06:00 +00:00
vec_sdiv_to_shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-4.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-6.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-7.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-8.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-A.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-B.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-C.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-D.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-F.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_set-H.ll
[X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)
2017-12-29 14:41:50 +00:00
vec_set.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_setcc-2.ll
[X86] Use min/max for vector ult/ugt compares if avoids a sign flip.
2018-02-11 17:11:40 +00:00
vec_setcc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift4.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
vec_shift5.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift6.ll
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
2018-07-10 07:58:33 +00:00
vec_shift7.ll
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
2018-07-17 09:45:35 +00:00
vec_shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shuf-insert.ll
Test commit - added a new line to vec_shuf-insert.ll.
2014-02-10 12:42:13 +00:00
vec_split.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_ss_load_fold.ll
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
2018-07-14 02:05:08 +00:00
vec_trunc_sext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_udiv_to_shift.ll
…
vec_uint_to_fp-fastmath.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_uint_to_fp.ll
AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data
2015-12-08 02:37:48 +00:00
vec_unsafe-fp-math.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_zero_cse.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_zero-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_zero.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec-copysign-avx512.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vec-copysign.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec-libcalls.ll
[SelectionDAG] unroll unsupported vector FP ops earlier to avoid libcalls on undef elements (PR38527)
2018-08-22 22:52:05 +00:00
vec-loadsingles-alignment.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
vec-trunc-store.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-bitreverse.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vector-blend.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
vector-compare-all_of.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vector-compare-any_of.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vector-compare-combines.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-compare-results.ll
[SelectionDAG][ARM][X86] Teach PromoteIntRes_SETCC to do a better job picking the result type for the setcc.
2018-03-15 23:04:11 +00:00
vector-compare-simplify.ll
[SelectionDAG] Support some SimplifySetCC cases for comparing against vector splats of constants.
2018-03-01 22:15:39 +00:00
vector-constrained-fp-intrinsics.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-extend-inreg.ll
[X86] Use 128-bit ops for 256-bit vzmovl patterns.
2018-07-15 18:51:07 +00:00
vector-gep.ll
getelementptr instruction, support index vector of EVT.
2016-05-01 13:29:12 +00:00
vector-half-conversions.ll
[x86] NFC. Reautogenerate test/CodeGen/X86/vector-half-conversions.ll
2018-06-01 13:51:53 +00:00
vector-idiv-sdiv-128.ll
[X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
2018-08-25 18:01:24 +00:00
vector-idiv-sdiv-256.ll
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
2018-08-27 17:20:41 +00:00
vector-idiv-sdiv-512.ll
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
2018-08-27 17:20:41 +00:00
vector-idiv-udiv-128.ll
[X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
2018-08-25 18:01:24 +00:00
vector-idiv-udiv-256.ll
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
2018-08-27 17:20:41 +00:00
vector-idiv-udiv-512.ll
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
2018-08-27 17:20:41 +00:00
vector-idiv-v2i32.ll
[X86] Type legalize v2i32 div/rem by scalarizing rather than promoting
2018-09-13 06:13:37 +00:00
vector-idiv.ll
[X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
2018-08-25 18:01:24 +00:00
vector-interleave.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-intrinsics.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-lzcnt-128.ll
…
vector-lzcnt-256.ll
…
vector-lzcnt-512.ll
…
vector-merge-store-fp-constants.ll
…
vector-mul.ll
Fix line endings. NFCI.
2018-07-09 20:52:07 +00:00
vector-narrow-binop.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-pcmp.ll
[X86][AVX2] Combine extract(broadcast(scalar_value)) --> scalar_value
2017-12-31 18:59:30 +00:00
vector-popcnt-128.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vector-popcnt-256.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vector-popcnt-512.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-reduce-add.ll
[X86][SSE] Use SplitOpsAndApply to improve HADD/HSUB lowering
2018-07-20 16:20:45 +00:00
vector-reduce-and.ll
[X86][SSE] Add integer and/or/xor vector.reduce tests
2018-04-05 17:29:51 +00:00
vector-reduce-fadd-fast.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fadd.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmax-nnan.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmax.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmin-nnan.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmin.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmul-fast.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-fmul.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
vector-reduce-mul.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
vector-reduce-or.ll
[X86][SSE] Add integer and/or/xor vector.reduce tests
2018-04-05 17:29:51 +00:00
vector-reduce-smax.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
vector-reduce-smin.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
vector-reduce-umax.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
vector-reduce-umin.ll
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
2018-09-09 14:13:22 +00:00
vector-reduce-xor.ll
[X86][SSE] Add integer and/or/xor vector.reduce tests
2018-04-05 17:29:51 +00:00
vector-rem.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-rotate-128.ll
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
2018-08-28 10:14:09 +00:00
vector-rotate-256.ll
[X86][SSE] Support v16i8/v32i8 vector rotations
2018-06-29 09:36:39 +00:00
vector-rotate-512.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-sext.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
vector-shift-ashr-128.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-ashr-256.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-ashr-512.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-lshr-128.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-lshr-256.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-lshr-512.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-shl-128.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-shl-256.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shift-shl-512.ll
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
2018-08-28 10:37:29 +00:00
vector-shuffle-128-v2.ll
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
2018-08-02 16:48:01 +00:00
vector-shuffle-128-v4.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
vector-shuffle-128-v8.ll
[x86] try harder to use broadcast to load a scalar into vector reg
2018-08-25 14:56:05 +00:00
vector-shuffle-128-v16.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vector-shuffle-256-v4.ll
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
2018-08-15 21:21:52 +00:00
vector-shuffle-256-v8.ll
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
2018-08-15 21:21:52 +00:00
vector-shuffle-256-v16.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
vector-shuffle-256-v32.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
vector-shuffle-512-v8.ll
[X86] Use 128-bit blends instead vmovss/vmovsd for 512-bit vzmovl patterns to match AVX.
2018-07-15 18:51:08 +00:00
vector-shuffle-512-v16.ll
[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
2018-08-03 07:01:10 +00:00
vector-shuffle-512-v32.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
vector-shuffle-512-v64.ll
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
2018-08-15 21:21:52 +00:00
vector-shuffle-avx512.ll
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
2018-08-15 21:21:52 +00:00
vector-shuffle-combining-avx2.ll
[X86][SSE] Avoid duplicate shuffle input sources in combineX86ShufflesRecursively
2018-08-14 17:22:37 +00:00
vector-shuffle-combining-avx512bw.ll
…
vector-shuffle-combining-avx512bwvl.ll
…
vector-shuffle-combining-avx512vbmi.ll
…
vector-shuffle-combining-avx.ll
…
vector-shuffle-combining-sse4a.ll
…
vector-shuffle-combining-sse41.ll
…
vector-shuffle-combining-ssse3.ll
[X86][SSE] Avoid duplicate shuffle input sources in combineX86ShufflesRecursively
2018-08-14 17:22:37 +00:00
vector-shuffle-combining-xop.ll
…
vector-shuffle-combining.ll
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
2018-08-15 21:21:52 +00:00
vector-shuffle-masked.ll
[X86] Add isel patterns for selecting masked SUBV_BROADCAST with bitcasts. Remove combineBitcastForMaskedOp.
2018-02-05 08:37:37 +00:00
vector-shuffle-mmx.ll
[X86][MMX] Improve handling of 64-bit MMX constants
2018-03-01 22:22:31 +00:00
vector-shuffle-sse1.ll
[X86] Remove the vector alignment requirement from the patterns added in r337320.
2018-07-17 23:26:20 +00:00
vector-shuffle-sse4a.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-shuffle-sse41.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-shuffle-v1.ll
…
vector-shuffle-v48.ll
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
2018-08-29 10:51:08 +00:00
vector-shuffle-variable-128.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
vector-shuffle-variable-256.ll
[X86] Remove some composite MOVSS/MOVSD isel patterns.
2018-07-11 04:51:40 +00:00
vector-sqrt.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
vector-trunc-math.ll
[X86] Teach combineTruncatedArithmetic to handle some cases of ISD::SUB
2018-08-20 20:57:35 +00:00
vector-trunc-packus.ll
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
2018-06-08 13:59:11 +00:00
vector-trunc-ssat.ll
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
2018-06-08 13:59:11 +00:00
vector-trunc-usat.ll
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
2018-06-08 13:59:11 +00:00
vector-trunc.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vector-truncate-combine.ll
Revert r307036 because of PR34919.
2017-10-12 00:24:52 +00:00
vector-tzcnt-128.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vector-tzcnt-256.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vector-tzcnt-512.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-unsigned-cmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-variable-idx2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-variable-idx.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-zext.ll
[X86] Fix a subtle bug in the custom execution domain fixing for blends.
2018-07-14 06:30:30 +00:00
vector-zmov.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vectorcall.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
verifier-generic-extend-truncate.mir
…
verifier-generic-types-1.mir
…
verifier-generic-types-2.mir
…
verifier-phi-fail0.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
verifier-phi.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
version_directive.ll
[Triple] Add a "macos" OS type that acts as a synonym for "macosx"
2017-05-03 10:42:35 +00:00
vfcmp.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
viabs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
virtual-registers-cleared-in-machine-functions-liveins.ll
…
visibility2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
visibility.ll
Print the visibility of available_externally functions.
2015-07-13 13:55:18 +00:00
vmaskmov-offset.ll
[SelectionDAG][X86] Fix incorrect offset generated for VMASKMOV
2018-02-14 15:55:24 +00:00
vmovq.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
volatile.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vortex-bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vpshufbitqbm-intrinsics.ll
…
vsel-cmp-load.ll
[x86] eliminate even more sign-bit tests with vector select
2018-06-13 12:28:32 +00:00
vselect-2.ll
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
2018-01-15 22:18:45 +00:00
vselect-avx.ll
[X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
2018-08-25 18:01:24 +00:00
vselect-constants.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vselect-minmax.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
vselect-packss.ll
[X86][SSE] truncateVectorWithPACK - Use src type instead of dst to select between PACK*SDW/PACK*SWB
2018-02-14 18:23:58 +00:00
vselect-pcmp.ll
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
2018-07-15 23:32:36 +00:00
vselect-zero.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vselect.ll
[X86] Correct SHRUNKBLEND creation to work correctly when there are multiple uses of the condition.
2018-02-20 17:58:17 +00:00
vshift_scalar.ll
Make the default triple optional by allowing an empty string
2015-09-16 05:34:32 +00:00
vshift_split2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vshift_split.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vshift-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-4.ll
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
2018-08-28 10:14:09 +00:00
vshift-5.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vshift-6.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vsplit-and.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vzero-excess.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
waitpkg-intrinsics.ll
[X86] WaitPKG instructions
2018-04-20 18:42:47 +00:00
warn-stack.ll
[SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARD
2016-04-19 19:40:37 +00:00
wbinvd-intrinsic.ll
…
wbnoinvd-intrinsic.ll
…
weak_def_can_be_hidden.ll
IR: Introduce local_unnamed_addr attribute.
2016-06-14 21:01:22 +00:00
weak-undef.ll
Handle undefined weak hidden symbols on all architectures.
2017-10-27 21:18:48 +00:00
weak.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
webkit-jscc.ll
[Win64] Only treat some functions as having the Win64 convention
2015-07-08 21:03:47 +00:00
wide-fma-contraction.ll
…
wide-integer-cmp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
wide-integer-fold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
widen_arith-1.ll
…
widen_arith-2.ll
…
widen_arith-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_arith-4.ll
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
2018-07-10 07:58:33 +00:00
widen_arith-5.ll
…
widen_arith-6.ll
…
widen_bitops-0.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
widen_bitops-1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_cast-1.ll
…
widen_cast-2.ll
…
widen_cast-3.ll
…
widen_cast-4.ll
…
widen_cast-5.ll
…
widen_cast-6.ll
…
widen_compare-1.ll
…
widen_conv-1.ll
…
widen_conv-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_conv-3.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
widen_conv-4.ll
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
2018-09-11 17:57:27 +00:00
widen_conversions.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_extract-1.ll
…
widen_load-0.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_load-1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
widen_load-2.ll
[X86][SSE] Add ISD::VECTOR_SHUFFLE to faux shuffle decoding (Reapplied)
2018-01-22 12:05:17 +00:00
widen_load-3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widen_shuffle-1.ll
…
WidenArith.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
widened-broadcast.ll
[X86][SSE] Simplify demanded elements from BROADCAST shuffle source.
2018-01-27 19:48:13 +00:00
win32_sret.ll
[FastISel] Sink local value materializations to first use
2018-03-14 21:54:21 +00:00
win32-bool.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
win32-eh-available-externally.ll
…
win32-eh-states.ll
…
win32-eh.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
win32-pic-jumptable.ll
…
win32-preemption.ll
Represent runtime preemption in the IR.
2017-10-26 15:00:26 +00:00
win32-seh-catchpad-realign.ll
…
win32-seh-catchpad.ll
…
win32-seh-nested-finally.ll
…
win32-spill-xmm.ll
…
win32-ssp.ll
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
2018-08-29 17:28:34 +00:00
win64_alloca_dynalloca.ll
…
win64_call_epi.ll
Revert "Revert "Revert r248959, "[WinEH] Emit int3 after noreturn calls on Win64"""
2015-10-09 01:13:17 +00:00
win64_eh_leaf2.ll
[WinEH] Adjust decision to emit SEH moves for leaf functions
2017-03-20 17:45:59 +00:00
win64_eh_leaf.ll
Mark functions as not having CFI once we finalize an x86 stack frame
2017-05-03 23:13:42 +00:00
win64_eh.ll
Win64: Don't emit unwind info for "leaf" functions (PR30337)
2016-09-22 19:50:05 +00:00
win64_frame.ll
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
2018-04-18 15:52:50 +00:00
win64_nonvol.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
win64_params.ll
[AArch64] Extend CallingConv::X86_64_Win64 to AArch64 as well
2017-07-17 20:05:19 +00:00
win64_sibcall.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
win64_vararg.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
win64-bool.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
win64-jumptable.ll
Revert "[COFF] Use 32-bit jump table entries in .rdata for Win64"
2016-12-29 17:07:10 +00:00
win64-long-double.ll
[X86] Properly implement the calling convention for f80 for mingw/x86_64
2018-03-20 06:19:38 +00:00
win64-nosse-csrs.ll
…
win_chkstk.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
win_coreclr_chkstk_liveins.mir
[X86] Preserve more liveness information in emitStackProbeInline
2018-07-31 16:41:12 +00:00
win_coreclr_chkstk.ll
[X86] Preserve more liveness information in emitStackProbeInline
2018-07-31 16:41:12 +00:00
win_cst_pool.ll
Revert "[COFF] Use comdat shared constants for MinGW as well"
2018-07-26 10:48:20 +00:00
win-alloca-expander.ll
…
win-catchpad-csrs.ll
[X86] Enable call frame optimization ("mov to push") not only for optsize (PR26325)
2016-03-30 23:38:01 +00:00
win-catchpad-nested-cxx.ll
[WinEH] Use operand bundles to describe call sites
2015-12-15 21:27:27 +00:00
win-catchpad-nested.ll
[WinEH] Use operand bundles to describe call sites
2015-12-15 21:27:27 +00:00
win-catchpad-varargs.ll
Implemented stack symbol table ordering/packing optimization to improve data locality and code size from SP/FP offset encoding.
2016-02-15 23:44:13 +00:00
win-catchpad.ll
Do not select EhPad BB in MachineBlockPlacement when there is regular BB to schedule
2016-04-07 21:29:39 +00:00
win-cleanuppad.ll
MCStreamer: Use "cfi" for CFI related temp labels.
2016-11-30 23:48:26 +00:00
win-funclet-cfi.ll
[WinEH] Use operand bundles to describe call sites
2015-12-15 21:27:27 +00:00
win-mixed-ehpersonality.ll
…
win-smallparams.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
windows-itanium-alloca.ll
X86: use the correct alloca symbol for Windows Itanium
2014-11-20 18:01:26 +00:00
wineh-coreclr.ll
Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.
2016-07-27 17:55:33 +00:00
wineh-exceptionpointer.ll
[WinEH] Use operand bundles to describe call sites
2015-12-15 21:27:27 +00:00
wineh-no-ehpads.ll
…
x32-cet-intrinsics.ll
…
x32-function_pointer-1.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
x32-function_pointer-2.ll
[x32] Fix function indirect calls
2014-09-17 07:09:23 +00:00
x32-function_pointer-3.ll
Fix typo "fuction" noticed in comments in AssumptionCache.h, and also all the other files that have the same typo. All comments, no functionality change! (Merely a "fuctionality" change.)
2015-07-29 22:32:47 +00:00
x32-indirectbr.ll
…
x32-landingpad.ll
…
x32-lea-1.ll
…
x32-movtopush64.ll
…
x32-va_start.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
x64-cet-intrinsics.ll
…
x86_64-mul-by-const.ll
…
x86-16.ll
[X86] Remove special handling for 16 bit for A asm constraints.
2017-04-16 20:13:08 +00:00
x86-32-intrcc.ll
…
x86-32-vector-calling-conv.ll
[X86] Add VPADD instructions to X86InstrInfo::isAssociativeAndCommutative.
2016-07-18 06:14:54 +00:00
x86-64-and-mask.ll
…
x86-64-arg.ll
…
x86-64-asm.ll
…
x86-64-baseptr.ll
[X86][x32] Save callee-save register used as base pointer for x32 ABI
2018-03-02 17:46:39 +00:00
x86-64-bittest-logic.ll
…
x86-64-call.ll
…
x86-64-disp.ll
…
x86-64-double-precision-shift-left.ll
…
x86-64-double-precision-shift-right.ll
…
x86-64-double-shifts-Oz-Os-O2.ll
…
x86-64-double-shifts-var.ll
[X86] Make Feature64Bit useful
2018-08-30 06:01:05 +00:00
x86-64-extend-shift.ll
…
x86-64-flags-intrinsics.ll
…
x86-64-gv-offset.ll
…
x86-64-intrcc-nosse.ll
…
x86-64-intrcc.ll
…
x86-64-jumps.ll
…
x86-64-mem.ll
…
x86-64-ms_abi-vararg.ll
…
x86-64-pic-1.ll
…
x86-64-pic-2.ll
…
x86-64-pic-3.ll
…
x86-64-pic-4.ll
…
x86-64-pic-5.ll
…
x86-64-pic-6.ll
…
x86-64-pic-7.ll
…
x86-64-pic-8.ll
…
x86-64-pic-9.ll
…
x86-64-pic-10.ll
…
x86-64-pic-11.ll
…
x86-64-pic-12.ll
…
x86-64-pic.ll
…
x86-64-plt-relative-reloc.ll
…
x86-64-psub.ll
…
x86-64-ptr-arg-simple.ll
…
x86-64-ret0.ll
…
x86-64-shortint.ll
…
x86-64-sret-return-2.ll
…
x86-64-sret-return.ll
…
x86-64-stack-and-frame-ptr.ll
…
x86-64-static-relo-movl.ll
…
x86-64-tls-1.ll
…
x86-64-varargs.ll
…
x86-big-ret.ll
…
x86-cmov-converter.ll
[FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests
2018-07-11 20:25:49 +00:00
x86-flags-intrinsics.ll
…
x86-fold-pshufb.ll
…
x86-framelowering-trap.ll
…
x86-inline-asm-validation.ll
X86: teach X86TargetLowering about L,M,O constraints
2015-01-11 04:39:24 +00:00
x86-interleaved-access.ll
[X86][SSE] Combine (some) target shuffles with multiple uses
2018-08-09 12:30:02 +00:00
x86-interleaved-check.ll
…
x86-interrupt_cc.ll
[llvm-mc] - Produce R_X86_64_PLT32 for "call/jmp foo".
2018-02-20 10:17:57 +00:00
x86-interrupt_cld.ll
Assure calling "cld" instruction in prologue of X86 interrupt handler function.
2016-05-13 12:46:57 +00:00
x86-interrupt_vzeroupper.ll
…
x86-mixed-alignment-dagcombine.ll
…
x86-no_caller_saved_registers-preserve.ll
…
x86-no_caller_saved_registers.ll
…
x86-plt-relative-reloc.ll
…
x86-repmov-copy-eflags.ll
…
x86-sanitizer-shrink-wrapping.ll
…
x86-setcc-int-to-fp-combine.ll
…
x86-shifts.ll
…
x86-shrink-wrap-unwind.ll
[Exception Handling] Unwind tables are required for all functions that have an EH personality.
2018-08-24 19:38:29 +00:00
x86-shrink-wrapping.ll
…
x86-store-gv-addr.ll
…
x86-upgrade-avx2-vbroadcast.ll
…
x86-upgrade-avx-vbroadcast.ll
…
x86-win64-shrink-wrapping.ll
…
x87-schedule.ll
[CodeGen] assume max/default throughput for unspecified instructions
2018-06-05 23:34:45 +00:00
x87.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
xaluo.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xchg-nofold.ll
…
xmm-r64.ll
…
xmulo.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
xop-ifma.ll
…
xop-intrinsics-fast-isel.ll
…
xop-intrinsics-x86_64-upgrade.ll
…
xop-intrinsics-x86_64.ll
…
xop-mask-comments.ll
…
xop-pcmov.ll
…
xop-schedule.ll
[X86] Split WriteVecALU/WriteVecLogic/WriteShuffle/WriteVarShuffle/WritePSADBW/WritePHAdd scheduler classes
2018-05-10 17:06:09 +00:00
xor-combine-debugloc.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
xor-icmp.ll
[X86] Only reorder srl/and on last DAG combiner run
2018-02-16 18:51:09 +00:00
xor-select-i1-combine.ll
…
xor.ll
[X86] Fix Windows i1 zeroext conventions to use i8 instead of i32
2018-03-26 18:49:48 +00:00
xray-attribute-instrumentation.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-custom-log.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-empty-firstmbb.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
xray-empty-function.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
xray-log-args.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-loop-detection.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-multiplerets-in-blocks.mir
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-section-group.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-selective-instrumentation-miss.ll
…
xray-selective-instrumentation.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-tail-call-sled.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xray-typed-event-log.ll
[XRay] Fix machine verifier issues in X86
2018-07-12 14:36:43 +00:00
xtest.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
zero-remat.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
zext-demanded.ll
[X86] Teach X86TargetLowering::targetShrinkDemandedConstant to set non-demanded bits if it helps created an and mask that can be matched as a zero extend.
2018-03-14 16:55:15 +00:00
zext-extract_subreg.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
zext-fold.ll
[x86] shrink 'and' immediate values by setting the high bits (PR35907)
2018-01-19 16:37:25 +00:00
zext-inreg-0.ll
…
zext-inreg-1.ll
…
zext-logicop-shift-load.ll
[CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
2018-06-05 21:03:52 +00:00
zext-sext.ll
DAGCombiner: Canonicalize select(and/or,x,y) depending on target.
2015-03-06 19:49:10 +00:00
zext-shl.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
zext-trunc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
zlib-longest-match.ll
…