43e94b15ea
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
50 lines
1.2 KiB
YAML
50 lines
1.2 KiB
YAML
# RUN: llc -mtriple=i386-- -run-pass scavenger-test -verify-machineinstrs -o - %s | FileCheck %s
|
|
---
|
|
# CHECK-LABEL: name: func0
|
|
name: func0
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; CHECK: [[REG0:\$e[a-z]+]] = MOV32ri 42
|
|
; CHECK: $ebp = COPY killed [[REG0]]
|
|
%0 : gr32 = MOV32ri 42
|
|
$ebp = COPY %0
|
|
...
|
|
---
|
|
# CHECK-LABEL: name: func2
|
|
name: func2
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; CHECK-NOT: $eax = MOV32ri 42
|
|
; CHECK: [[REG0:\$e[a-z]+]] = MOV32ri 42
|
|
; CHECK: $ebp = COPY killed [[REG0]]
|
|
$eax = MOV32ri 13
|
|
%0 : gr32 = MOV32ri 42
|
|
$ebp = COPY %0
|
|
|
|
; CHECK: [[REG1:\$e[a-z]+]] = MOV32ri 23
|
|
; CHECK: [[REG2:\$e[a-z]+]] = MOV32ri 7
|
|
; CHECK: [[REG1]] = ADD32ri8 [[REG1]], 5, implicit-def dead $eflags
|
|
%1 : gr32 = MOV32ri 23
|
|
%2 : gr32 = MOV32ri 7
|
|
%1 = ADD32ri8 %1, 5, implicit-def dead $eflags
|
|
|
|
NOOP implicit $ebp
|
|
|
|
; CHECK: NOOP implicit killed [[REG2]]
|
|
; CHECK: NOOP implicit killed [[REG1]]
|
|
NOOP implicit %2
|
|
NOOP implicit %1
|
|
RETQ $eax
|
|
...
|
|
---
|
|
# CHECK-LABEL: name: func3
|
|
name: func3
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; CHECK dead {{\$e[a-z]+}} = MOV32ri 42
|
|
dead %0 : gr32 = MOV32ri 42
|
|
...
|