dfd14adeb0
Summary:
Two utils methods have essentially the same functionality. This is an attempt to merge them into one.
1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred
2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor
Prior to the patch:
1. MergeBasicBlockIntoOnlyPred
Updates either DomTree or DeferredDominance
Moves all instructions from Pred to BB, deletes Pred
Asserts BB has single predecessor
If address was taken, replace the block address with constant 1 (?)
2. MergeBlockIntoPredecessor
Updates DomTree, LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
After the patch:
Method 2. MergeBlockIntoPredecessor is attempting to become the new default:
Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
Uses of MergeBasicBlockIntoOnlyPred that need to be replaced:
1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp
Updated in this patch. No challenges.
2. lib/CodeGen/CodeGenPrepare.cpp
Updated in this patch.
i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation.
ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks
Some interesting aspects:
- Since Pred is not deleted (BB is), the entry block does not need updating.
- The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred.
- isMergingEmptyBlockProfitable assumes BB is the one to be deleted.
- eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead.
- adding some test owner as subscribers for the interesting tests modified:
test/CodeGen/X86/avx-cmp.ll
test/CodeGen/AMDGPU/nested-loop-conditions.ll
test/CodeGen/AMDGPU/si-annotate-cf.ll
test/CodeGen/X86/hoist-spill.ll
test/CodeGen/X86/2006-11-17-IllegalMove.ll
3. lib/Transforms/Scalar/JumpThreading.cpp
Not covered in this patch. It is the only use case using the DeferredDominance.
I would defer to Brian Rzycki to make this replacement.
Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar
Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D48202
llvm-svn: 335183
174 lines
6.9 KiB
LLVM
174 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
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define <32 x i8> @funcA(<32 x i8> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcA:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: retq
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entry:
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%shuffle = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <32 x i8> %shuffle
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}
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define <16 x i16> @funcB(<16 x i16> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcB:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,5,6,7]
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: retq
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entry:
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%shuffle = shufflevector <16 x i16> %a, <16 x i16> undef, <16 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <16 x i16> %shuffle
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}
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define <4 x i64> @funcC(i64 %q) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcC:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmovq %rdi, %xmm0
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: retq
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entry:
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%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
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%vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1
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%vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2
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%vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32 3
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ret <4 x i64> %vecinit6.i
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}
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define <4 x double> @funcD(double %q) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcD:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: retq
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entry:
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%vecinit.i = insertelement <4 x double> undef, double %q, i32 0
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%vecinit2.i = insertelement <4 x double> %vecinit.i, double %q, i32 1
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%vecinit4.i = insertelement <4 x double> %vecinit2.i, double %q, i32 2
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%vecinit6.i = insertelement <4 x double> %vecinit4.i, double %q, i32 3
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ret <4 x double> %vecinit6.i
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}
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; Test this turns into a broadcast:
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; shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
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;
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define <8 x float> @funcE() nounwind {
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; CHECK-LABEL: funcE:
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; CHECK: # %bb.0: # %allocas
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: # implicit-def: $ymm0
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; CHECK-NEXT: jne .LBB4_2
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; CHECK-NEXT: # %bb.1: # %load.i1247
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: movq %rsp, %rbp
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; CHECK-NEXT: andq $-32, %rsp
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; CHECK-NEXT: subq $1312, %rsp # imm = 0x520
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; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%rsp), %ymm0
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; CHECK-NEXT: movq %rbp, %rsp
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: .LBB4_2: # %__load_and_broadcast_32.exit1249
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; CHECK-NEXT: retq
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allocas:
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%udx495 = alloca [18 x [18 x float]], align 32
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br label %for_test505.preheader
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for_test505.preheader: ; preds = %for_test505.preheader, %allocas
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br i1 undef, label %for_exit499, label %for_test505.preheader
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for_exit499: ; preds = %for_test505.preheader
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br i1 undef, label %__load_and_broadcast_32.exit1249, label %load.i1247
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load.i1247: ; preds = %for_exit499
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%ptr1227 = getelementptr [18 x [18 x float]], [18 x [18 x float]]* %udx495, i64 0, i64 1, i64 1
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%ptr.i1237 = bitcast float* %ptr1227 to i32*
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%val.i1238 = load i32, i32* %ptr.i1237, align 4
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%ret6.i1245 = insertelement <8 x i32> undef, i32 %val.i1238, i32 6
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%ret7.i1246 = insertelement <8 x i32> %ret6.i1245, i32 %val.i1238, i32 7
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%phitmp = bitcast <8 x i32> %ret7.i1246 to <8 x float>
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br label %__load_and_broadcast_32.exit1249
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__load_and_broadcast_32.exit1249: ; preds = %load.i1247, %for_exit499
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%load_broadcast12281250 = phi <8 x float> [ %phitmp, %load.i1247 ], [ undef, %for_exit499 ]
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ret <8 x float> %load_broadcast12281250
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}
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define <8 x float> @funcF(i32 %val) nounwind {
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; CHECK-LABEL: funcF:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovd %edi, %xmm0
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; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,0]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: retq
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%ret6 = insertelement <8 x i32> undef, i32 %val, i32 6
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%ret7 = insertelement <8 x i32> %ret6, i32 %val, i32 7
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%tmp = bitcast <8 x i32> %ret7 to <8 x float>
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ret <8 x float> %tmp
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}
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define <8 x float> @funcG(<8 x float> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcG:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
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; CHECK-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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ret <8 x float> %shuffle
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}
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define <8 x float> @funcH(<8 x float> %a) nounwind uwtable readnone ssp {
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; CHECK-LABEL: funcH:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,1,1,1,5,5,5,5]
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; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
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; CHECK-NEXT: retq
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entry:
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%shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <8 x float> %shuffle
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}
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define <2 x double> @splat_load_2f64_11(<2 x double>* %ptr) {
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; CHECK-LABEL: splat_load_2f64_11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
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; CHECK-NEXT: retq
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%x = load <2 x double>, <2 x double>* %ptr
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%x1 = shufflevector <2 x double> %x, <2 x double> undef, <2 x i32> <i32 1, i32 1>
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ret <2 x double> %x1
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}
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define <4 x double> @splat_load_4f64_2222(<4 x double>* %ptr) {
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; CHECK-LABEL: splat_load_4f64_2222:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vbroadcastsd 16(%rdi), %ymm0
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; CHECK-NEXT: retq
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%x = load <4 x double>, <4 x double>* %ptr
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%x1 = shufflevector <4 x double> %x, <4 x double> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
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ret <4 x double> %x1
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}
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define <4 x float> @splat_load_4f32_0000(<4 x float>* %ptr) {
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; CHECK-LABEL: splat_load_4f32_0000:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
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; CHECK-NEXT: retq
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%x = load <4 x float>, <4 x float>* %ptr
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%x1 = shufflevector <4 x float> %x, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
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ret <4 x float> %x1
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}
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define <8 x float> @splat_load_8f32_77777777(<8 x float>* %ptr) {
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; CHECK-LABEL: splat_load_8f32_77777777:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vbroadcastss 28(%rdi), %ymm0
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; CHECK-NEXT: retq
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%x = load <8 x float>, <8 x float>* %ptr
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%x1 = shufflevector <8 x float> %x, <8 x float> undef, <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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ret <8 x float> %x1
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}
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